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X-MS-Exchange-CrossTenant-AuthSource: LV3PR01MB8464.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Jan 2024 05:14:54.2632 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: caStonulxz76xgZt4J79kA/hmUHllOMVv42lVqJ0p61zIUubKZ7IrCYMRtZsLKsGP3thf5Ja/AIlwEUyTKB7vqfuxCnss6TIAd1Ra+EuqZvTvVReNMap2xet9pUCAfLD X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR01MB7294 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,rebecca@os.amperecomputing.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: HiEwK5UV8YRgNbApJUq5asnmx7686176AA= Content-Transfer-Encoding: quoted-printable Content-Type: text/plain X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=dchG03hD; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=none; arc=reject ("signature check failed: fail, {[1] = sig:microsoft.com:reject}") The generic watchdog offset register is 48 bits wide, and can be set by performing two 32-bit writes. Add support for writing the high 16 bits of the offset register and update the signature of the WatchdogWriteOffsetRegister function to take a UINT64 value. Signed-off-by: Rebecca Cran --- ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h | 6 +++++- ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c | 14 +++++++++----- 2 files changed, 14 insertions(+), 6 deletions(-) diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h b/ArmPkg/D= rivers/GenericWatchdogDxe/GenericWatchdog.h index 9bc3bf47047c..2a0634e7e9f1 100644 --- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h +++ b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h @@ -1,9 +1,12 @@ /** @file * +* Copyright (c) 2023, Ampere Computing LLC. All rights reserved.
* Copyright (c) 2013-2017, ARM Limited. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * +* See Generic Watchdog specification in Arm Base System Architecture 1.0C= : +* https://developer.arm.com/documentation/den0094/c/ **/ =20 #ifndef GENERIC_WATCHDOG_H_ @@ -14,7 +17,8 @@ =20 // Control Frame: #define GENERIC_WDOG_CONTROL_STATUS_REG ((UINTN)FixedPcdGet64 (PcdGen= ericWatchdogControlBase) + 0x000) -#define GENERIC_WDOG_OFFSET_REG ((UINTN)FixedPcdGet64 (PcdGen= ericWatchdogControlBase) + 0x008) +#define GENERIC_WDOG_OFFSET_REG_LOW ((UINTN)FixedPcdGet64 (PcdGen= ericWatchdogControlBase) + 0x008) +#define GENERIC_WDOG_OFFSET_REG_HIGH ((UINTN)FixedPcdGet64 (PcdGen= ericWatchdogControlBase) + 0x00C) #define GENERIC_WDOG_COMPARE_VALUE_REG_LOW ((UINTN)FixedPcdGet64 (PcdGen= ericWatchdogControlBase) + 0x010) #define GENERIC_WDOG_COMPARE_VALUE_REG_HIGH ((UINTN)FixedPcdGet64 (PcdGen= ericWatchdogControlBase) + 0x014) =20 diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c b/ArmPk= g/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c index 66c6c37c08b0..f8c39458a53a 100644 --- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c +++ b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c @@ -1,5 +1,6 @@ /** @file * +* Copyright (c) 2023, Ampere Computing LLC. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent @@ -35,16 +36,19 @@ STATIC UINTN mTimerFrequencyHz =3D 0; It is therefore stored here. 0 means the timer is not running. */ STATIC UINT64 mNumTimerTicks =3D 0; =20 +#define MAX_UINT48 0xFFFFFFFFFFFFULL + STATIC EFI_HARDWARE_INTERRUPT2_PROTOCOL *mInterruptProtocol; STATIC EFI_WATCHDOG_TIMER_NOTIFY mWatchdogNotify; =20 STATIC VOID WatchdogWriteOffsetRegister ( - UINT32 Value + UINT64 Value ) { - MmioWrite32 (GENERIC_WDOG_OFFSET_REG, Value); + MmioWrite32 (GENERIC_WDOG_OFFSET_REG_LOW, Value & MAX_UINT32); + MmioWrite32 (GENERIC_WDOG_OFFSET_REG_HIGH, (Value >> 32) & MAX_UINT16); } =20 STATIC @@ -211,17 +215,17 @@ WatchdogSetTimerPeriod ( /* If the number of required ticks is greater than the max the watchdog'= s offset register (WOR) can hold, we need to manually compute and set the compare register (WCV) */ - if (mNumTimerTicks > MAX_UINT32) { + if (mNumTimerTicks > MAX_UINT48) { /* We need to enable the watchdog *before* writing to the compare regi= ster, because enabling the watchdog causes an "explicit refresh", which clobbers the compare register (WCV). In order to make sure this doe= sn't trigger an interrupt, set the offset to max. */ - WatchdogWriteOffsetRegister (MAX_UINT32); + WatchdogWriteOffsetRegister (MAX_UINT48); WatchdogEnable (); SystemCount =3D ArmGenericTimerGetSystemCount (); WatchdogWriteCompareRegister (SystemCount + mNumTimerTicks); } else { - WatchdogWriteOffsetRegister ((UINT32)mNumTimerTicks); + WatchdogWriteOffsetRegister (mNumTimerTicks); WatchdogEnable (); } =20 --=20 2.34.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113215): https://edk2.groups.io/g/devel/message/113215 Mute This Topic: https://groups.io/mt/103538115/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-