From: "duntan" <dun.tan@intel.com>
To: devel@edk2.groups.io
Cc: Ray Ni <ray.ni@intel.com>, Laszlo Ersek <lersek@redhat.com>,
Rahul Kumar <rahul1.kumar@intel.com>,
Gerd Hoffmann <kraxel@redhat.com>
Subject: [edk2-devel] [PATCH] UefiCpuPkg:Limit PhysicalAddressBits in speicial case
Date: Wed, 10 Jan 2024 16:05:44 +0800 [thread overview]
Message-ID: <20240110080544.1350-1-dun.tan@intel.com> (raw)
When creating smm page table, limit maximum
supported physical address bits returned by
CalculateMaximumSupportAddress() to 48 if
5-Level Paging is disabled.
When 5-Level Paging is disabled and the
PhysicalAddressBits retrived from CPU HOB or
CpuId is bigger than 48, only [0, 2^48 -1]
range in 52-bit physical address is mapped
in page table.
Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
---
UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index ddd9be66b5..e6f174ca10 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -137,11 +137,13 @@ GetSubEntriesNum (
/**
Calculate the maximum support address.
+ @param[in] Is5LevelPagingNeeded If 5-level paging enabling is needed.
+
@return the maximum support address.
**/
UINT8
CalculateMaximumSupportAddress (
- VOID
+ BOOLEAN Is5LevelPagingNeeded
)
{
UINT32 RegEax;
@@ -164,6 +166,15 @@ CalculateMaximumSupportAddress (
}
}
+ //
+ // Only [0, 2^48 -1] in 52-bit physical addresses is mapped in page table
+ // when 5-Level Paging is disabled.
+ //
+ ASSERT (PhysicalAddressBits <= 52);
+ if (!Is5LevelPagingNeeded && (PhysicalAddressBits > 48)) {
+ PhysicalAddressBits = 48;
+ }
+
return PhysicalAddressBits;
}
@@ -197,7 +208,7 @@ SmmInitPageTable (
mCpuSmmRestrictedMemoryAccess = PcdGetBool (PcdCpuSmmRestrictedMemoryAccess);
m1GPageTableSupport = Is1GPageSupport ();
m5LevelPagingNeeded = Is5LevelPagingNeeded ();
- mPhysicalAddressBits = CalculateMaximumSupportAddress ();
+ mPhysicalAddressBits = CalculateMaximumSupportAddress (m5LevelPagingNeeded);
PatchInstructionX86 (gPatch5LevelPagingNeeded, m5LevelPagingNeeded, 1);
if (m5LevelPagingNeeded) {
mPagingMode = m1GPageTableSupport ? Paging5Level1GB : Paging5Level;
--
2.31.1.windows.1
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next reply other threads:[~2024-01-10 8:06 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-10 8:05 duntan [this message]
2024-01-10 9:08 ` [edk2-devel] [PATCH] UefiCpuPkg:Limit PhysicalAddressBits in speicial case Ni, Ray
2024-01-10 10:54 ` Gerd Hoffmann
2024-01-10 12:19 ` Laszlo Ersek
2024-01-11 1:56 ` duntan
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