From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 66114D8024B for ; Thu, 11 Jan 2024 00:04:24 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=7aBJqDdF9VK9sAdKZGEsqRGhQdWRAG2oaZYgfB7Q9sA=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1704931463; v=1; b=KOnC51pVgqFDOROad7A3fJBske+PREfIrQmjbtj/WuBVHmtVgj51G54neCrZW/JoSdA0rrvM DEZqBdCcEbFeFiYQefIX9stGXCMknUh/AfnL6QQ7sh/ex9IRKudpPPpf9+5BB7K/A0swRyzq2sk 76t6dPxCGAR3c8bghU+eg22M= X-Received: by 127.0.0.2 with SMTP id gJYlYY7687511xvzNu4cpcGb; Wed, 10 Jan 2024 16:04:23 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.9456.1704931457355042933 for ; Wed, 10 Jan 2024 16:04:17 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 07ED81576; Wed, 10 Jan 2024 16:05:03 -0800 (PST) X-Received: from u200865.usa.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E84043F5A1; Wed, 10 Jan 2024 16:04:16 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: ardb+tianocore@kernel.org, quic_llindhol@quicinc.com, Jeremy Linton Subject: [edk2-devel] [PATCH 6/7] Platform/RaspberryPi: Allow pin function selection at runtime Date: Wed, 10 Jan 2024 18:04:09 -0600 Message-ID: <20240111000412.2734985-7-jeremy.linton@arm.com> In-Reply-To: <20240111000412.2734985-1-jeremy.linton@arm.com> References: <20240111000412.2734985-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: parc64xX86sLe12SdyOHnCV2x7686176AA= Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=KOnC51pV; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=arm.com (policy=none) Update GpioLib slightly so that we can change the GPIO pin muxing at runtime. For the moment only the GpioPinFuncGet/Set() routines are used at runtime, and only by the Variable service. Signed-off-by: Jeremy Linton --- .../Broadcom/Bcm283x/Include/Library/GpioLib.h | 6 ++++++ .../Broadcom/Bcm283x/Library/GpioLib/GpioLib.c | 16 ++++++++++++++-- 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/Silicon/Broadcom/Bcm283x/Include/Library/GpioLib.h b/Silicon= /Broadcom/Bcm283x/Include/Library/GpioLib.h index 1f7d2204e0..79765be4fb 100644 --- a/Silicon/Broadcom/Bcm283x/Include/Library/GpioLib.h +++ b/Silicon/Broadcom/Bcm283x/Include/Library/GpioLib.h @@ -45,4 +45,10 @@ GpioSetPull ( IN UINTN Pud ); =20 +VOID +GpioSetupRuntime ( + VOID +); + + #endif /* __GPIO_LIB__ */ diff --git a/Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.c b/Silicon= /Broadcom/Bcm283x/Library/GpioLib/GpioLib.c index eaf53e5369..fc1f928e6b 100644 --- a/Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.c +++ b/Silicon/Broadcom/Bcm283x/Library/GpioLib/GpioLib.c @@ -15,10 +15,22 @@ #include #include #include +#include #include #include #include =20 + +STATIC EFI_PHYSICAL_ADDRESS GpioGfpSel0 =3D GPIO_GPFSEL0; + +VOID +GpioSetupRuntime ( + VOID + ) +{ + EfiConvertPointer (0x0, (VOID**)&GpioGfpSel0); +} + STATIC VOID GpioFSELModify ( @@ -30,7 +42,7 @@ GpioFSELModify ( UINT32 Val; EFI_PHYSICAL_ADDRESS Reg; =20 - Reg =3D RegIndex * sizeof (UINT32) + GPIO_GPFSEL0; + Reg =3D RegIndex * sizeof (UINT32) + GpioGfpSel0; =20 ASSERT (Reg <=3D GPIO_GPFSEL5); ASSERT ((~ModifyMask & FunctionMask) =3D=3D 0); @@ -77,7 +89,7 @@ GpioPinFuncGet ( =20 RegIndex =3D Pin / 10; SelIndex =3D Pin % 10; - Reg =3D RegIndex * sizeof (UINT32) + GPIO_GPFSEL0; + Reg =3D RegIndex * sizeof (UINT32) + GpioGfpSel0; =20 Val =3D MmioRead32 (Reg); Val >>=3D SelIndex * GPIO_FSEL_BITS_PER_PIN; --=20 2.43.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113555): https://edk2.groups.io/g/devel/message/113555 Mute This Topic: https://groups.io/mt/103653092/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-