From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 6F71EAC0CE1 for ; Tue, 16 Jan 2024 07:48:53 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=BouDWkqKGReq8NLDwsVy9ArSRkRHw/5XfnsUNiS/4kU=; c=relaxed/simple; d=groups.io; h=From:Date:Subject:MIME-Version:Message-Id:References:In-Reply-To:To:Cc:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Transfer-Encoding; s=20140610; t=1705391332; v=1; b=HC0y8o3QBOowOwA59PNxPBgFO5bDD3F85PFpY3gUXwh43Hu5c9cnXl2018P474nHtPNQ5GkL X34Dz3i5HEd9WHUyoa+nS/6kiuqXCkM3BlsS0cMVRzYvkOcsuIr3YJgsabcFWszezhYKD+bvEPe S2JSm1c7YX52LNcDwmxomXIE= X-Received: by 127.0.0.2 with SMTP id bjgAYY7687511x7X9NKXo9N0; Mon, 15 Jan 2024 23:48:52 -0800 X-Received: from muminek.juszkiewicz.com.pl (muminek.juszkiewicz.com.pl [213.251.184.221]) by mx.groups.io with SMTP id smtpd.web10.7822.1705391330464544401 for ; Mon, 15 Jan 2024 23:48:50 -0800 X-Received: from localhost (localhost [127.0.0.1]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTP id 9F7AD260A73; Tue, 16 Jan 2024 08:48:48 +0100 (CET) X-Virus-Scanned: Debian amavis at juszkiewicz.com.pl X-Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavis, port 10024) with ESMTP id dwXCwI0hzVAS; Tue, 16 Jan 2024 08:48:46 +0100 (CET) X-Received: from [192.168.210.114] (83.11.14.94.ipv4.supernova.orange.pl [83.11.14.94]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id C7960260AD4; Tue, 16 Jan 2024 08:48:44 +0100 (CET) From: "Marcin Juszkiewicz" Date: Tue, 16 Jan 2024 08:48:35 +0100 Subject: [edk2-devel] [PATCH edk2-platforms v2 4/4] Platform/SbsaQemu: move FdtHandlerLib to SbsaQemuHardwareInfoLib MIME-Version: 1.0 Message-Id: <20240116-no-dt-for-cpu-v2-4-6cf078d9ab76@linaro.org> References: <20240116-no-dt-for-cpu-v2-0-6cf078d9ab76@linaro.org> In-Reply-To: <20240116-no-dt-for-cpu-v2-0-6cf078d9ab76@linaro.org> To: devel@edk2.groups.io Cc: Leif Lindholm , Ard Biesheuvel , Graeme Gregory , Marcin Juszkiewicz Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,marcin.juszkiewicz@linaro.org List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: PRBTuBpzcoZGWYE3cl8Dqtl8x7686176AA= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=HC0y8o3Q; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=linaro.org (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io There is no need for EDK2 to know that there is DeviceTree around. All hardware information is read using functions from SbsaQemuHardwareInfoLib library. Library fallbacks to parsing DT if needed (used with too old TF-A). Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 1 - .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf | 33 ------- .../SbsaQemuHardwareInfoLib.inf | 2 + .../Qemu/SbsaQemu/Include/Library/FdtHelperLib.h | 36 ------- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 4 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c | 98 ----------------= -- .../SbsaQemuHardwareInfoLib.c | 104 ++++++++++++++++= ++++ 8 files changed, 110 insertions(+), 172 deletions(-) diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/S= bsaQemu.dsc index 07cb3490f4cf..bde61651da2e 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -126,7 +126,6 @@ [LibraryClasses.common] # ARM PL011 UART Driver PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf =20 - FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf SbsaQemuHardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareIn= foLib/SbsaQemuHardwareInfoLib.inf =20 diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.= inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf index 291743b19115..9bf0a13de5d1 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf @@ -1,7 +1,7 @@ ## @file # This driver modifies ACPI tables for the Qemu SBSA platform # -# Copyright (c) 2020, Linaro Ltd. All rights reserved. +# Copyright (c) Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -35,9 +35,9 @@ [LibraryClasses] BaseLib DebugLib DxeServicesLib - FdtHelperLib PcdLib PrintLib + SbsaQemuHardwareInfoLib UefiDriverEntryPoint UefiLib UefiRuntimeServicesTableLib diff --git a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf b/= Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf deleted file mode 100644 index 9c059f3e5851..000000000000 --- a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf +++ /dev/null @@ -1,33 +0,0 @@ -#/** @file -# -# Component description file for FdtHelperLib module -# -# Copyright (c) 2021, NUVIA Inc. All rights reserved. -# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -#**/ - -[Defines] - INF_VERSION =3D 1.29 - BASE_NAME =3D FdtHelperLib - FILE_GUID =3D 34e4396f-c2fc-4f9e-ad58-0f98e99e3875 - MODULE_TYPE =3D BASE - VERSION_STRING =3D 1.0 - LIBRARY_CLASS =3D FdtHelperLib - -[Sources.common] - FdtHelperLib.c - -[Packages] - EmbeddedPkg/EmbeddedPkg.dec - MdePkg/MdePkg.dec - Silicon/Qemu/SbsaQemu/SbsaQemu.dec - -[LibraryClasses] - DebugLib - FdtLib - PcdLib - -[FixedPcd] - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemu= HardwareInfoLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib= /SbsaQemuHardwareInfoLib.inf index 8c2def1878e6..5358dd339eb3 100644 --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwar= eInfoLib.inf +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwar= eInfoLib.inf @@ -27,6 +27,8 @@ [LibraryClasses] ArmSmcLib BaseMemoryLib DebugLib + FdtLib =20 [Pcd] + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h b/Silicon= /Qemu/SbsaQemu/Include/Library/FdtHelperLib.h deleted file mode 100644 index ea9159857215..000000000000 --- a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h +++ /dev/null @@ -1,36 +0,0 @@ -/** @file -* FdtHelperLib.h -* -* Copyright (c) 2021, NUVIA Inc. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* -**/ - -#ifndef FDT_HELPER_LIB_ -#define FDT_HELPER_LIB_ - -/** - Get MPIDR for a given cpu from device tree passed by Qemu. - - @param [in] CpuId Index of cpu to retrieve MPIDR value for. - - @retval MPIDR value of CPU at index -**/ -UINT64 -FdtHelperGetMpidr ( - IN UINTN CpuId - ); - -/** Walks through the Device Tree created by Qemu and counts the number - of CPUs present in it. - - @return The number of CPUs present. -**/ -EFIAPI -UINT32 -FdtHelperCountCpus ( - VOID - ); - -#endif /* FDT_HELPER_LIB_ */ diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.= c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index 7ef314ae9f67..c446581b746e 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -15,10 +15,10 @@ #include #include #include -#include #include #include #include +#include #include #include #include @@ -297,7 +297,7 @@ AddMadtTable ( CopyMem (New, &Gicc, sizeof (EFI_ACPI_6_0_GIC_STRUCTURE)); GiccPtr =3D (EFI_ACPI_6_0_GIC_STRUCTURE *) New; GiccPtr->AcpiProcessorUid =3D CoreIndex; - GiccPtr->MPIDR =3D FdtHelperGetMpidr (CoreIndex); + GiccPtr->MPIDR =3D SbsaQemuGetMpidr (CoreIndex); New +=3D sizeof (EFI_ACPI_6_0_GIC_STRUCTURE); } =20 diff --git a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c b/Si= licon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c deleted file mode 100644 index 7fdfb055db76..000000000000 --- a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c +++ /dev/null @@ -1,98 +0,0 @@ -/** @file -* FdtHelperLib.c -* -* Copyright (c) 2021, NUVIA Inc. All rights reserved. -* Copyright (c) 2020, Linaro Ltd. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* -**/ - -#include -#include -#include -#include -#include - -STATIC INT32 mFdtFirstCpuOffset; -STATIC INT32 mFdtCpuNodeSize; - -/** - Get MPIDR for a given cpu from device tree passed by Qemu. - - @param [in] CpuId Index of cpu to retrieve MPIDR value for. - - @retval MPIDR value of CPU at index -**/ -UINT64 -FdtHelperGetMpidr ( - IN UINTN CpuId - ) -{ - VOID *DeviceTreeBase; - CONST UINT64 *RegVal; - INT32 Len; - - DeviceTreeBase =3D (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress); - ASSERT (DeviceTreeBase !=3D NULL); - - RegVal =3D fdt_getprop (DeviceTreeBase, - mFdtFirstCpuOffset + (CpuId * mFdtCpuNodeSize), - "reg", - &Len); - if (!RegVal) { - DEBUG ((DEBUG_ERROR, "Couldn't find reg property for CPU:%d\n", CpuId)= ); - return 0; - } - - return (fdt64_to_cpu (ReadUnaligned64 (RegVal))); -} - -/** Walks through the Device Tree created by Qemu and counts the number - of CPUs present in it. - - @return The number of CPUs present. -**/ -EFIAPI -UINT32 -FdtHelperCountCpus ( - VOID - ) -{ - VOID *DeviceTreeBase; - INT32 Node; - INT32 Prev; - INT32 CpuNode; - UINT32 CpuCount; - - DeviceTreeBase =3D (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress); - ASSERT (DeviceTreeBase !=3D NULL); - - // Make sure we have a valid device tree blob - ASSERT (fdt_check_header (DeviceTreeBase) =3D=3D 0); - - CpuNode =3D fdt_path_offset (DeviceTreeBase, "/cpus"); - if (CpuNode <=3D 0) { - DEBUG ((DEBUG_ERROR, "Unable to locate /cpus in device tree\n")); - return 0; - } - - CpuCount =3D 0; - - // Walk through /cpus node and count the number of subnodes. - // The count of these subnodes corresponds to the number of - // CPUs created by Qemu. - Prev =3D fdt_first_subnode (DeviceTreeBase, CpuNode); - mFdtFirstCpuOffset =3D Prev; - while (1) { - CpuCount++; - Node =3D fdt_next_subnode (DeviceTreeBase, Prev); - if (Node < 0) { - break; - } - mFdtCpuNodeSize =3D Node - Prev; - Prev =3D Node; - } - - return CpuCount; -} diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemu= HardwareInfoLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/S= bsaQemuHardwareInfoLib.c index 4df973fda75e..900493e02d7f 100644 --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwar= eInfoLib.c +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwar= eInfoLib.c @@ -11,8 +11,112 @@ #include #include #include +#include #include =20 +/** + Get MPIDR for a given cpu from device tree passed by Qemu. + + @param [in] CpuId Index of cpu to retrieve MPIDR value for. + + @retval MPIDR value of CPU at index +**/ +UINT64 +FdtHelperGetMpidr ( + IN UINTN CpuId + ) +{ + VOID *DeviceTreeBase; + INT32 Node; + INT32 Prev; + UINT32 CpuCount; + CONST UINT64 *RegVal; + + DeviceTreeBase =3D (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress); + ASSERT (DeviceTreeBase !=3D NULL); + + // Make sure we have a valid device tree blob + ASSERT (fdt_check_header (DeviceTreeBase) =3D=3D 0); + + Node =3D fdt_path_offset (DeviceTreeBase, "/cpus"); + if (Node <=3D 0) { + DEBUG ((DEBUG_ERROR, "Unable to locate /cpus in device tree\n")); + return 0; + } + + CpuCount =3D 0; + + Prev =3D fdt_first_subnode (DeviceTreeBase, Node); + while (1) { + + if (CpuCount =3D=3D CpuId) { + RegVal =3D fdt_getprop (DeviceTreeBase, Prev, "reg", NULL); + if (!RegVal) { + DEBUG ((DEBUG_ERROR, "Couldn't find reg property for CPU:%d\n", Cp= uId)); + return 0; + } + return (fdt64_to_cpu (ReadUnaligned64 (RegVal))); + } + + Node =3D fdt_next_subnode (DeviceTreeBase, Prev); + if (Node < 0) { + break; + } + Prev =3D Node; + CpuCount++; + } + + return 0; /* We did not found MPIDR */ + +} + +/** Walks through the Device Tree created by Qemu and counts the number + of CPUs present in it. + + @return The number of CPUs present. +**/ +EFIAPI +UINT32 +FdtHelperCountCpus ( + VOID + ) +{ + VOID *DeviceTreeBase; + INT32 Node; + INT32 Prev; + UINT32 CpuCount; + + DeviceTreeBase =3D (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress); + ASSERT (DeviceTreeBase !=3D NULL); + + // Make sure we have a valid device tree blob + ASSERT (fdt_check_header (DeviceTreeBase) =3D=3D 0); + + Node =3D fdt_path_offset (DeviceTreeBase, "/cpus"); + if (Node <=3D 0) { + DEBUG ((DEBUG_ERROR, "Unable to locate /cpus in device tree\n")); + return 0; + } + + CpuCount =3D 0; + + // Walk through /cpus node and count the number of subnodes. + // The count of these subnodes corresponds to the number of + // CPUs created by Qemu. + Prev =3D fdt_first_subnode (DeviceTreeBase, Node); + while (1) { + CpuCount++; + Node =3D fdt_next_subnode (DeviceTreeBase, Prev); + if (Node < 0) { + break; + } + Prev =3D Node; + } + + return CpuCount; +} + + /** Get CPU count from information passed by Qemu. =20 --=20 2.43.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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