From: "duke.zhai via groups.io" <duke.zhai=amd.com@groups.io>
To: <devel@edk2.groups.io>
Cc: Eric Xing <eric.xing@amd.com>, Ken Yao <ken.yao@amd.com>,
Igniculus Fu <igniculus.fu@amd.com>,
Abner Chang <abner.chang@amd.com>
Subject: [edk2-devel] [PATCH 33/33] AMD/VanGoghBoard: Improvement coding style.
Date: Thu, 18 Jan 2024 14:50:46 +0800 [thread overview]
Message-ID: <20240118065046.961-34-duke.zhai@amd.com> (raw)
In-Reply-To: <20240118065046.961-1-duke.zhai@amd.com>
From: Duke Zhai <Duke.Zhai@amd.com>
BZ #:4640
Improve coding style for EDk2 patch check rule.
Add readme.md for ChachaniBoardPkg introduction.
Signed-off-by: Duke Zhai <duke.zhai@amd.com>
Cc: Eric Xing <eric.xing@amd.com>
Cc: Ken Yao <ken.yao@amd.com>
Cc: Igniculus Fu <igniculus.fu@amd.com>
Cc: Abner Chang <abner.chang@amd.com>
---
.../AmdPlatformPkg/Universal/LogoDxe/Logo.c | 2 +-
.../AgesaPublic/Include/FchRegistersCommon.h | 32 ++---
.../Acpi/AcpiTables/Facs/Facs.h | 10 +-
.../Acpi/AcpiTables/Fadt/Fadt.h | 55 ++++-----
.../Acpi/AcpiTables/Hpet/Hpet.h | 45 ++++---
.../Acpi/AcpiTables/Madt/Madt.h | 90 +++++++-------
.../Acpi/AcpiTables/Mcfg/Mcfg.h | 22 ++--
.../PlatformBootManager.c | 18 +--
.../PlatformBootManagerLib/PlatformConsole.c | 2 +-
.../FspWrapperHobProcessLibSample.c | 116 +++++++++---------
.../SecRamInitData.c | 8 +-
.../edk2/MdeModulePkg/Universal/PCD/Dxe/Pcd.c | 2 +-
.../edk2/MdeModulePkg/Universal/PCD/Pei/Pcd.c | 10 +-
.../PcatRealTimeClockRuntimeDxe/PcRtc.c | 2 +-
.../DxeTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c | 2 +-
.../PeiTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c | 2 +-
.../AmdFtpm/Tpm2DeviceLib/Tpm2DeviceLibFtpm.c | 2 +-
.../DxeTcg2PhysicalPresenceLib.c | 48 ++++----
.../Tcg/AmdFtpm/FtpmTcg2Smm/Tcg2Smm.c | 18 +--
.../Tcg/Tcg2Config/Tcg2ConfigPeim.c | 6 +-
.../SecurityPkg/Tcg/Tcg2Config/TpmDetection.c | 9 +-
.../SmmCpuFeaturesLibCommon.c | 5 +-
Platform/AMD/VanGoghBoard/Readme.md | 67 ++++++++++
Platform/AMD/VanGoghBoard/ReleaseNote.txt | 14 +++
.../Universal/PlatformInitPei/BootMode.c | 8 +-
.../PlatformInitPei/MemoryCallback.c | 16 +--
.../Universal/PlatformInitPei/MemoryInstall.c | 106 ++++++++--------
.../Universal/PlatformInitPei/MemoryPeim.c | 12 +-
.../Universal/PlatformSmbiosDxe/SmbiosTable.c | 4 +-
.../FvbServices/FwBlockService.c | 27 ++--
.../Include/Library/SmbiosLib.h | 1 +
.../Smm/AcpiSmm/AcpiSmmPlatform.c | 1 -
.../Smm/SmmAccessPei/SmmAccessPei.c | 2 -
33 files changed, 420 insertions(+), 344 deletions(-)
create mode 100644 Platform/AMD/VanGoghBoard/Readme.md
create mode 100644 Platform/AMD/VanGoghBoard/ReleaseNote.txt
diff --git a/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c b/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c
index 8e3d89380b..4463ba58eb 100644
--- a/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c
+++ b/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c
@@ -98,7 +98,7 @@ LogoDxeDisplayEventCallback (
IN VOID *Context
)
{
- DEBUG((DEBUG_INFO, "AMD logo is displaying.\n"));
+ DEBUG ((DEBUG_INFO, "AMD logo is displaying.\n"));
BootLogoEnableLogo ();
gBS->CloseEvent (Event);
diff --git a/Platform/AMD/VanGoghBoard/AgesaPublic/Include/FchRegistersCommon.h b/Platform/AMD/VanGoghBoard/AgesaPublic/Include/FchRegistersCommon.h
index 6079fcab75..a69a4791cd 100644
--- a/Platform/AMD/VanGoghBoard/AgesaPublic/Include/FchRegistersCommon.h
+++ b/Platform/AMD/VanGoghBoard/AgesaPublic/Include/FchRegistersCommon.h
@@ -5,19 +5,19 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-#define R_FCH_ACPI_PM1_STATUS 0x00
-#define R_FCH_ACPI_PM1_ENABLE 0x02
-#define R_FCH_ACPI_PM_CONTROL 0x04
-#define ACPI_MMIO_BASE 0xFED80000ul
-#define SMI_BASE 0x200 // DWORD
-#define PMIO_BASE 0x300 // DWORD
-#define FCH_SMI_REG80 0x80 // SmiStatus0
-#define FCH_SMI_REG84 0x84 // SmiStatus1
-#define FCH_SMI_REG88 0x88 // SmiStatus2
-#define FCH_SMI_REG8C 0x8C // SmiStatus3
-#define FCH_SMI_REG90 0x90 // SmiStatus4
-#define FCH_SMI_REG98 0x98 // SmiTrig
-#define FCH_SMI_REGA0 0xA0
-#define FCH_SMI_REGB0 0xB0
-#define FCH_SMI_REGC4 0xC4
-#define FCH_PMIOA_REG60 0x60 // AcpiPm1EvtBlk
\ No newline at end of file
+#define R_FCH_ACPI_PM1_STATUS 0x00
+#define R_FCH_ACPI_PM1_ENABLE 0x02
+#define R_FCH_ACPI_PM_CONTROL 0x04
+#define ACPI_MMIO_BASE 0xFED80000ul
+#define SMI_BASE 0x200 // DWORD
+#define PMIO_BASE 0x300 // DWORD
+#define FCH_SMI_REG80 0x80 // SmiStatus0
+#define FCH_SMI_REG84 0x84 // SmiStatus1
+#define FCH_SMI_REG88 0x88 // SmiStatus2
+#define FCH_SMI_REG8C 0x8C // SmiStatus3
+#define FCH_SMI_REG90 0x90 // SmiStatus4
+#define FCH_SMI_REG98 0x98 // SmiTrig
+#define FCH_SMI_REGA0 0xA0
+#define FCH_SMI_REGB0 0xB0
+#define FCH_SMI_REGC4 0xC4
+#define FCH_PMIOA_REG60 0x60 // AcpiPm1EvtBlk
diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Facs/Facs.h b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Facs/Facs.h
index daf97dd581..96d6cd5255 100644
--- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Facs/Facs.h
+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Facs/Facs.h
@@ -34,12 +34,12 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
// FACS Definitions
//
-#define EFI_ACPI_FIRMWARE_WAKING_VECTOR 0x00000000
-#define EFI_ACPI_GLOBAL_LOCK 0x00000000
+#define EFI_ACPI_FIRMWARE_WAKING_VECTOR 0x00000000
+#define EFI_ACPI_GLOBAL_LOCK 0x00000000
-#define EFI_ACPI_FIRMWARE_CONTROL_STRUCTURE_FLAGS 0x00000000
-#define EFI_ACPI_X_FIRMWARE_WAKING_VECTOR 0x0000000000000000
+#define EFI_ACPI_FIRMWARE_CONTROL_STRUCTURE_FLAGS 0x00000000
+#define EFI_ACPI_X_FIRMWARE_WAKING_VECTOR 0x0000000000000000
-#define EFI_ACPI_OSPM_FLAGS 0x00000000
+#define EFI_ACPI_OSPM_FLAGS 0x00000000
#endif
diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Fadt/Fadt.h b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Fadt/Fadt.h
index 968a4b0fa5..94eeca8569 100644
--- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Fadt/Fadt.h
+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Fadt/Fadt.h
@@ -16,35 +16,35 @@
//
// ACPI table information used to initialize tables.
//
-#define EFI_ACPI_OEM_ID 'A','M','D',' ',' ',' ' // OEMID 6 bytes long
-#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('E','D','K','2',' ',' ',' ',' ') // OEM table id 8 bytes long
-#define EFI_ACPI_OEM_REVISION 0x00000002
-#define EFI_ACPI_CREATOR_ID SIGNATURE_32(' ',' ',' ',' ')
-#define EFI_ACPI_CREATOR_REVISION 0x01000013
+#define EFI_ACPI_OEM_ID 'A','M','D',' ',' ',' ' // OEMID 6 bytes long
+#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('E','D','K','2',' ',' ',' ',' ') // OEM table id 8 bytes long
+#define EFI_ACPI_OEM_REVISION 0x00000002
+#define EFI_ACPI_CREATOR_ID SIGNATURE_32(' ',' ',' ',' ')
+#define EFI_ACPI_CREATOR_REVISION 0x01000013
//
// FADT Definitions
//
-#define SCI_INT_VECTOR 0x0009
-#define SMI_CMD_IO_PORT 0x000000B0 // SMI Port 0xB0
-#define ACPI_ENABLE 0x0A0
-#define ACPI_DISABLE 0x0A1
+#define SCI_INT_VECTOR 0x0009
+#define SMI_CMD_IO_PORT 0x000000B0 // SMI Port 0xB0
+#define ACPI_ENABLE 0x0A0
+#define ACPI_DISABLE 0x0A1
-#define PM1a_EVT_BLK 0x00000400
-#define PM1b_EVT_BLK 0x00000000
-#define PM1a_CNT_BLK 0x00000404
-#define PM1b_CNT_BLK 0x00000000
-#define PM2_CNT_BLK 0x00000800
-#define PM_TMR_BLK 0x00000408
-#define GPE0_BLK 0x00000420
-#define GPE1_BLK 0x00000000
-#define PM1_EVT_LEN 0x04
-#define PM1_CNT_LEN 0x02
-#define PM2_CNT_LEN 0x01
-#define PM_TM_LEN 0x04
-#define GPE0_BLK_LEN 0x08
-#define GPE1_BLK_LEN 0x00
-#define GPE1_BASE 0x00
+#define PM1a_EVT_BLK 0x00000400
+#define PM1b_EVT_BLK 0x00000000
+#define PM1a_CNT_BLK 0x00000404
+#define PM1b_CNT_BLK 0x00000000
+#define PM2_CNT_BLK 0x00000800
+#define PM_TMR_BLK 0x00000408
+#define GPE0_BLK 0x00000420
+#define GPE1_BLK 0x00000000
+#define PM1_EVT_LEN 0x04
+#define PM1_CNT_LEN 0x02
+#define PM2_CNT_LEN 0x01
+#define PM_TM_LEN 0x04
+#define GPE0_BLK_LEN 0x08
+#define GPE1_BLK_LEN 0x00
+#define GPE1_BASE 0x00
#define RESERVED 0x00
#define P_LVL2_LAT 0x0064
@@ -57,9 +57,8 @@
#define MON_ALRM 0x00
#define CENTURY 0x00
#define IAPC_BOOT_ARCH EFI_ACPI_2_0_LEGACY_DEVICES
-//#define FLAG (EFI_ACPI_1_0_WBINVD | EFI_ACPI_1_0_PROC_C1 | EFI_ACPI_1_0_SLP_BUTTON | EFI_ACPI_1_0_RTC_S4)
-#define FLAG 0x0000C5AD
-#define FLAG2 (EFI_ACPI_2_0_WBINVD | EFI_ACPI_2_0_PROC_C1 | EFI_ACPI_2_0_PWR_BUTTON | EFI_ACPI_2_0_SLP_BUTTON | EFI_ACPI_2_0_RTC_S4 | EFI_ACPI_2_0_RESET_REG_SUP | EFI_ACPI_3_0_USE_PLATFORM_CLOCK)
-
+// #define FLAG (EFI_ACPI_1_0_WBINVD | EFI_ACPI_1_0_PROC_C1 | EFI_ACPI_1_0_SLP_BUTTON | EFI_ACPI_1_0_RTC_S4)
+#define FLAG 0x0000C5AD
+#define FLAG2 (EFI_ACPI_2_0_WBINVD | EFI_ACPI_2_0_PROC_C1 | EFI_ACPI_2_0_PWR_BUTTON | EFI_ACPI_2_0_SLP_BUTTON | EFI_ACPI_2_0_RTC_S4 | EFI_ACPI_2_0_RESET_REG_SUP | EFI_ACPI_3_0_USE_PLATFORM_CLOCK)
#endif
diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Hpet/Hpet.h b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Hpet/Hpet.h
index e28a473f39..d10009bb0f 100644
--- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Hpet/Hpet.h
+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Hpet/Hpet.h
@@ -16,12 +16,11 @@
//
// ACPI table information used to initialize tables.
//
-#define EFI_ACPI_OEM_ID 'A','M','D',' ',' ',' ' // OEMID 6 bytes long
-#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('E','D','K','2',' ',' ',' ',' ') // OEM table id 8 bytes long
-#define EFI_ACPI_OEM_REVISION 0x00000002
-#define EFI_ACPI_CREATOR_ID SIGNATURE_32(' ',' ',' ',' ')
-#define EFI_ACPI_CREATOR_REVISION 0x01000013
-
+#define EFI_ACPI_OEM_ID 'A','M','D',' ',' ',' ' // OEMID 6 bytes long
+#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('E','D','K','2',' ',' ',' ',' ') // OEM table id 8 bytes long
+#define EFI_ACPI_OEM_REVISION 0x00000002
+#define EFI_ACPI_CREATOR_ID SIGNATURE_32(' ',' ',' ',' ')
+#define EFI_ACPI_CREATOR_REVISION 0x01000013
//
// HPET structure
@@ -29,12 +28,12 @@
#define EFI_ACPI_5_0_HIGH_PRECISION_EVENT_TIMER_TABLE_REVISION 0x00
#define EFI_ACPI_5_0_HPET_EVENT_TIMER_BLOCK_ID 0x10228201
- // [31:16] 0x1022 - PCI Vendor ID of 1st Timer Block
- // [15] 0x01 - Legacy Replacement IRQ Routing Capable
- // [14] 0x00 - Reserved
- // [13] 0x00 - COUNT_SIZE_CAP counter size
- // [12:08] 0x02 - Number of Comparators in 1st Timer Block
- // [07:00] 0x01 - Hardware Rev ID
+// [31:16] 0x1022 - PCI Vendor ID of 1st Timer Block
+// [15] 0x01 - Legacy Replacement IRQ Routing Capable
+// [14] 0x00 - Reserved
+// [13] 0x00 - COUNT_SIZE_CAP counter size
+// [12:08] 0x02 - Number of Comparators in 1st Timer Block
+// [07:00] 0x01 - Hardware Rev ID
#define EFI_ACPI_5_0_HPET_BASE_ADDRESS_SPACE_ID 0x00
#define EFI_ACPI_5_0_HPET_BASE_ADDRESS_REGISTER_BIT_WIDTH 0x00
#define EFI_ACPI_5_0_HPET_BASE_ADDRESS_REGISTER_BIT_OFFSET 0x00
@@ -52,18 +51,18 @@
//
typedef struct {
// ACPI Common header
- EFI_ACPI_DESCRIPTION_HEADER Header;
+ EFI_ACPI_DESCRIPTION_HEADER Header;
// HPET
- UINT32 EventTimerBlockID; // Offset 0x24
- UINT8 BaseAddress_SpaceID;
- UINT8 BaseAddress_RegisterBitWidth;
- UINT8 BaseAddress_RegisterBitOffset;
- UINT8 Reserved0[1];
- UINT32 BaseAddressLower32bit; // Offset 0x28
- UINT32 Reserved1[1];
- UINT8 HpetNumber; // Offset 0x34
- UINT16 MinClockTick; // Offset 0x35
- UINT8 PageProtectionAndOemAttribute;// Offset 0x37
+ UINT32 EventTimerBlockID; // Offset 0x24
+ UINT8 BaseAddress_SpaceID;
+ UINT8 BaseAddress_RegisterBitWidth;
+ UINT8 BaseAddress_RegisterBitOffset;
+ UINT8 Reserved0[1];
+ UINT32 BaseAddressLower32bit; // Offset 0x28
+ UINT32 Reserved1[1];
+ UINT8 HpetNumber; // Offset 0x34
+ UINT16 MinClockTick; // Offset 0x35
+ UINT8 PageProtectionAndOemAttribute; // Offset 0x37
} EFI_ACPI_5_0_HIGH_PRECISION_EVENT_TIMER_TABLE;
#pragma pack ()
diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Madt/Madt.h b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Madt/Madt.h
index cd3e965142..d5b728b98d 100644
--- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Madt/Madt.h
+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Madt/Madt.h
@@ -40,46 +40,45 @@ Abstract:
// Statements that include other files
//
#include <IndustryStandard/Acpi.h>
-//#include <AcpiHeaderDefaultValue.h>
+// #include <AcpiHeaderDefaultValue.h>
//
// ACPI table information used to initialize tables.
//
-#define EFI_ACPI_OEM_ID 'A','M','D',' ',' ',' ' // OEMID 6 bytes long
-#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('E','D','K','2',' ',' ',' ',' ') // OEM table id 8 bytes long
-#define EFI_ACPI_OEM_REVISION 0x00000002
-#define EFI_ACPI_CREATOR_ID SIGNATURE_32(' ',' ',' ',' ')
-#define EFI_ACPI_CREATOR_REVISION 0x01000013
+#define EFI_ACPI_OEM_ID 'A','M','D',' ',' ',' ' // OEMID 6 bytes long
+#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('E','D','K','2',' ',' ',' ',' ') // OEM table id 8 bytes long
+#define EFI_ACPI_OEM_REVISION 0x00000002
+#define EFI_ACPI_CREATOR_ID SIGNATURE_32(' ',' ',' ',' ')
+#define EFI_ACPI_CREATOR_REVISION 0x01000013
//
// Local APIC address
//
-#define EFI_ACPI_LOCAL_APIC_ADDRESS 0xFEE00000
-//#define EFI_IO_APIC_ADDRESS 0xFEC00000
+#define EFI_ACPI_LOCAL_APIC_ADDRESS 0xFEE00000
+// #define EFI_IO_APIC_ADDRESS 0xFEC00000
//
// Multiple APIC Flags are defined in AcpiX.0.h
//
-#define EFI_ACPI_5_0_MULTIPLE_APIC_FLAGS (EFI_ACPI_5_0_PCAT_COMPAT)
+#define EFI_ACPI_5_0_MULTIPLE_APIC_FLAGS (EFI_ACPI_5_0_PCAT_COMPAT)
//
// Define the number of each table type.
// This is where the table layout is modified.
//
+#define EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT 16
-#define EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT 16
-
-#define EFI_ACPI_IO_APIC_COUNT 2
+#define EFI_ACPI_IO_APIC_COUNT 2
#define EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT 2
#define EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT 0
-#define EFI_ACPI_LOCAL_APIC_NMI_COUNT 16
+#define EFI_ACPI_LOCAL_APIC_NMI_COUNT 16
-#define EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT 0
-#define EFI_ACPI_IO_SAPIC_COUNT 0
-#define EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT 0
-#define EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT 0
+#define EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT 0
+#define EFI_ACPI_IO_SAPIC_COUNT 0
+#define EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT 0
+#define EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT 0
//
// MADT structure
@@ -93,44 +92,43 @@ Abstract:
// ACPI 5.0 Table structure
//
typedef struct {
- EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
+ EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
-#if EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT > 0
- EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE LocalApic[EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT];
-#endif
+ #if EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT > 0
+ EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE LocalApic[EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT];
+ #endif
-#if EFI_ACPI_IO_APIC_COUNT > 0
- EFI_ACPI_5_0_IO_APIC_STRUCTURE IoApic[EFI_ACPI_IO_APIC_COUNT];
-#endif
+ #if EFI_ACPI_IO_APIC_COUNT > 0
+ EFI_ACPI_5_0_IO_APIC_STRUCTURE IoApic[EFI_ACPI_IO_APIC_COUNT];
+ #endif
-#if EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT > 0
- EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE Iso[EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT];
-#endif
+ #if EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT > 0
+ EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE Iso[EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT];
+ #endif
-#if EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT > 0
- EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE NmiSource[EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT];
-#endif
+ #if EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT > 0
+ EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE NmiSource[EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT];
+ #endif
-#if EFI_ACPI_LOCAL_APIC_NMI_COUNT > 0
- EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE LocalApicNmi[EFI_ACPI_LOCAL_APIC_NMI_COUNT];
-#endif
+ #if EFI_ACPI_LOCAL_APIC_NMI_COUNT > 0
+ EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE LocalApicNmi[EFI_ACPI_LOCAL_APIC_NMI_COUNT];
+ #endif
-#if EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT > 0
- EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE LocalApicOverride[EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT];
-#endif
+ #if EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT > 0
+ EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE LocalApicOverride[EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT];
+ #endif
-#if EFI_ACPI_IO_SAPIC_COUNT > 0
- EFI_ACPI_5_0_IO_SAPIC_STRUCTURE IoSapic[EFI_ACPI_IO_SAPIC_COUNT];
-#endif
+ #if EFI_ACPI_IO_SAPIC_COUNT > 0
+ EFI_ACPI_5_0_IO_SAPIC_STRUCTURE IoSapic[EFI_ACPI_IO_SAPIC_COUNT];
+ #endif
-#if EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT > 0
- EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE LocalSapic[EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT];
-#endif
-
-#if EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT > 0
- EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE PlatformInterruptSources[EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT];
-#endif
+ #if EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT > 0
+ EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE LocalSapic[EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT];
+ #endif
+ #if EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT > 0
+ EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE PlatformInterruptSources[EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT];
+ #endif
} EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE;
#pragma pack ()
diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Mcfg/Mcfg.h b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Mcfg/Mcfg.h
index 045a84fe91..9969ac09d8 100644
--- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Mcfg/Mcfg.h
+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Mcfg/Mcfg.h
@@ -35,11 +35,11 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
// ACPI table information used to initialize tables.
//
-#define EFI_ACPI_OEM_ID 'A','M','D',' ',' ',' ' // OEMID 6 bytes long
-#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('E','D','K','2',' ',' ',' ',' ') // OEM table id 8 bytes long
-#define EFI_ACPI_OEM_REVISION 0x00000002
-#define EFI_ACPI_CREATOR_ID SIGNATURE_32(' ',' ',' ',' ')
-#define EFI_ACPI_CREATOR_REVISION 0x01000013
+#define EFI_ACPI_OEM_ID 'A','M','D',' ',' ',' ' // OEMID 6 bytes long
+#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('E','D','K','2',' ',' ',' ',' ') // OEM table id 8 bytes long
+#define EFI_ACPI_OEM_REVISION 0x00000002
+#define EFI_ACPI_CREATOR_ID SIGNATURE_32(' ',' ',' ',' ')
+#define EFI_ACPI_CREATOR_REVISION 0x01000013
//
// MCFG Definitions
@@ -48,7 +48,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
// Define the number of allocation structures so that we can build the table structure.
//
-#define EFI_ACPI_ALLOCATION_STRUCTURE_COUNT 1
+#define EFI_ACPI_ALLOCATION_STRUCTURE_COUNT 1
//
// MCFG structure
@@ -63,11 +63,11 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
// MCFG Table structure
//
typedef struct {
- EFI_ACPI_DESCRIPTION_HEADER Header;
- UINT64 Reserved;
- #if EFI_ACPI_ALLOCATION_STRUCTURE_COUNT > 0
- EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE AllocationStructure[EFI_ACPI_ALLOCATION_STRUCTURE_COUNT];
- #endif
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 Reserved;
+ #if EFI_ACPI_ALLOCATION_STRUCTURE_COUNT > 0
+ EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE AllocationStructure[EFI_ACPI_ALLOCATION_STRUCTURE_COUNT];
+ #endif
} EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE;
#pragma pack ()
diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBootManagerLib/PlatformBootManager.c b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBootManagerLib/PlatformBootManager.c
index a647e92054..a13836c035 100644
--- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBootManagerLib/PlatformBootManager.c
+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBootManagerLib/PlatformBootManager.c
@@ -357,7 +357,7 @@ PlatformBdsForceActiveVga (
EFI_DEVICE_PATH_PROTOCOL *IGpuDevicePath;
EFI_DEVICE_PATH_PROTOCOL *DGpuDevicePath;
- DEBUG ((EFI_D_INFO, "PlatformBdsForceActiveVga enter\n"));
+ DEBUG ((DEBUG_INFO, "PlatformBdsForceActiveVga enter\n"));
Status = EFI_SUCCESS;
DevicePathFirst = NULL;
@@ -373,25 +373,25 @@ PlatformBdsForceActiveVga (
ASSERT_EFI_ERROR (Status);
if ((IGpuDevicePath == NULL) && (DGpuDevicePath == NULL)) {
- DEBUG ((EFI_D_INFO, "No valid IGPU and DGPU\n"));
+ DEBUG ((DEBUG_INFO, "No valid IGPU and DGPU\n"));
return EFI_UNSUPPORTED;
}
if ((IGpuDevicePath != NULL) && (DGpuDevicePath == NULL)) {
- DEBUG ((EFI_D_INFO, "Only IGPU is valid\n"));
- // DEBUG ((EFI_D_INFO,"Only IGPU is valid, Update IGPU ...\n"));
+ DEBUG ((DEBUG_INFO, "Only IGPU is valid\n"));
+ // DEBUG ((DEBUG_INFO,"Only IGPU is valid, Update IGPU ...\n"));
DevicePathFirst = IGpuDevicePath;
DevicePathSecond = DGpuDevicePath;
goto UpdateConOut;
} else if ((IGpuDevicePath == NULL) && (DGpuDevicePath != NULL)) {
- DEBUG ((EFI_D_INFO, "Only DGPU is valid\n"));
- // DEBUG ((EFI_D_INFO,"Only DGPU is valid, Update DGPU ...\n"));
+ DEBUG ((DEBUG_INFO, "Only DGPU is valid\n"));
+ // DEBUG ((DEBUG_INFO,"Only DGPU is valid, Update DGPU ...\n"));
DevicePathFirst = DGpuDevicePath;
DevicePathSecond = IGpuDevicePath;
goto UpdateConOut;
} else if ((IGpuDevicePath != NULL) && (DGpuDevicePath != NULL)) {
- DEBUG ((EFI_D_INFO, "DGPU and IGPU are valid, active DGPU\n"));
- // DEBUG ((EFI_D_INFO,"Only DGPU is valid, Update DGPU ...\n"));
+ DEBUG ((DEBUG_INFO, "DGPU and IGPU are valid, active DGPU\n"));
+ // DEBUG ((DEBUG_INFO,"Only DGPU is valid, Update DGPU ...\n"));
DevicePathFirst = DGpuDevicePath;
DevicePathSecond = IGpuDevicePath;
goto UpdateConOut;
@@ -685,7 +685,7 @@ ExposeOver4GMemoryEventCallback (
LIST_ENTRY *TmpLink;
LIST_ENTRY NonTestedMemRanList;
- DEBUG ((EFI_D_INFO, "ExposeOver4GMemoryEventCallback\n"));
+ DEBUG ((DEBUG_INFO, "ExposeOver4GMemoryEventCallback\n"));
TmpLink = NULL;
NoFound = TRUE;
diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBootManagerLib/PlatformConsole.c b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBootManagerLib/PlatformConsole.c
index 0715fcc86e..b6d8bd9120 100644
--- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBootManagerLib/PlatformConsole.c
+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBootManagerLib/PlatformConsole.c
@@ -379,7 +379,7 @@ DetectAndPreparePlatformPciDevicePath (
NULL
);
ASSERT_EFI_ERROR (Status);
- DEBUG ((EFI_D_INFO, "InstallProtocolInterface gAmdCpmAllPciIoProtocolsInstalledProtocolGuid %r\n", Status));
+ DEBUG ((DEBUG_INFO, "InstallProtocolInterface gAmdCpmAllPciIoProtocolsInstalledProtocolGuid %r\n", Status));
return EFI_SUCCESS;
}
diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/PeiFspWrapperHobProcessLibSample/FspWrapperHobProcessLibSample.c b/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/PeiFspWrapperHobProcessLibSample/FspWrapperHobProcessLibSample.c
index c2b09ec52f..3339f98e51 100644
--- a/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/PeiFspWrapperHobProcessLibSample/FspWrapperHobProcessLibSample.c
+++ b/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/PeiFspWrapperHobProcessLibSample/FspWrapperHobProcessLibSample.c
@@ -294,15 +294,15 @@ InstallEfiMemory (
);
ASSERT_EFI_ERROR (Status);
- DEBUG ((EFI_D_INFO, "NumRanges: %d\n", NumRanges));
+ DEBUG ((DEBUG_INFO, "NumRanges: %d\n", NumRanges));
- DEBUG ((EFI_D_INFO, "GetMemoryMap:\n"));
+ DEBUG ((DEBUG_INFO, "GetMemoryMap:\n"));
for (Index = 0; Index < NumRanges; Index++) {
- DEBUG ((EFI_D_INFO, "Index: %d ", Index));
- DEBUG ((EFI_D_INFO, "RangeLength: 0x%016lX\t", MemoryMap[Index].RangeLength));
- DEBUG ((EFI_D_INFO, "PhysicalAddress: 0x%016lX\t", MemoryMap[Index].PhysicalAddress));
- DEBUG ((EFI_D_INFO, "CpuAddress: 0x%016lX\t", MemoryMap[Index].CpuAddress));
- DEBUG ((EFI_D_INFO, "Type: %d\n", MemoryMap[Index].Type));
+ DEBUG ((DEBUG_INFO, "Index: %d ", Index));
+ DEBUG ((DEBUG_INFO, "RangeLength: 0x%016lX\t", MemoryMap[Index].RangeLength));
+ DEBUG ((DEBUG_INFO, "PhysicalAddress: 0x%016lX\t", MemoryMap[Index].PhysicalAddress));
+ DEBUG ((DEBUG_INFO, "CpuAddress: 0x%016lX\t", MemoryMap[Index].CpuAddress));
+ DEBUG ((DEBUG_INFO, "Type: %d\n", MemoryMap[Index].Type));
}
//
@@ -327,9 +327,9 @@ InstallEfiMemory (
PeiMemoryIndex = 0;
for (Index = 0; Index < NumRanges; Index++) {
- DEBUG ((EFI_D_INFO, "Found 0x%lx bytes at ", MemoryMap[Index].RangeLength));
- DEBUG ((EFI_D_INFO, "0x%lx.\t", MemoryMap[Index].PhysicalAddress));
- DEBUG ((EFI_D_INFO, "Type: %d.\n", MemoryMap[Index].Type));
+ DEBUG ((DEBUG_INFO, "Found 0x%lx bytes at ", MemoryMap[Index].RangeLength));
+ DEBUG ((DEBUG_INFO, "0x%lx.\t", MemoryMap[Index].PhysicalAddress));
+ DEBUG ((DEBUG_INFO, "Type: %d.\n", MemoryMap[Index].Type));
if ((MemoryMap[Index].Type == DualChannelDdrMainMemory) &&
(MemoryMap[Index].PhysicalAddress + MemoryMap[Index].RangeLength < MAX_ADDRESS) &&
@@ -381,7 +381,7 @@ InstallEfiMemory (
if (Status == EFI_SUCCESS) {
CapsuleBuffer = LargeMemRangeBuf;
CapsuleBufferLength = LargeMemRangeBufLen;
- DEBUG ((EFI_D_INFO, "CapsuleBuffer: %x, CapsuleBufferLength: %x\n", CapsuleBuffer, CapsuleBufferLength));
+ DEBUG ((DEBUG_INFO, "CapsuleBuffer: %x, CapsuleBufferLength: %x\n", CapsuleBuffer, CapsuleBufferLength));
//
// Call the Capsule PPI Coalesce function to coalesce the capsule data.
@@ -580,7 +580,7 @@ InstallEfiMemory (
//
CopyMem (&DescriptorAcpiVariable, &SmramHobDescriptorBlock->Descriptor[SmramRanges-1], sizeof (EFI_SMRAM_DESCRIPTOR));
DescriptorAcpiVariable.CpuStart += RESERVED_CPU_S3_SAVE_OFFSET;
- DEBUG ((EFI_D_INFO, "gEfiAcpiVariableGuid CpuStart: 0x%X\n", (UINTN)DescriptorAcpiVariable.CpuStart));
+ DEBUG ((DEBUG_INFO, "gEfiAcpiVariableGuid CpuStart: 0x%X\n", (UINTN)DescriptorAcpiVariable.CpuStart));
BuildGuidDataHob (
&gEfiAcpiVariableGuid,
&DescriptorAcpiVariable,
@@ -644,19 +644,19 @@ InstallS3Memory (
FspHobList
);
ASSERT_EFI_ERROR (Status);
- DEBUG ((EFI_D_INFO, "NumRanges = 0x%x\n", NumRanges));
+ DEBUG ((DEBUG_INFO, "NumRanges = 0x%x\n", NumRanges));
//
// Install physical memory descriptor hobs for each memory range.
//
SmramRanges = 0;
- DEBUG ((EFI_D_INFO, "GetMemoryMap:\n"));
+ DEBUG ((DEBUG_INFO, "GetMemoryMap:\n"));
for (Index = 0; Index < NumRanges; Index++) {
- DEBUG ((EFI_D_INFO, "Index: %d ", Index));
- DEBUG ((EFI_D_INFO, "RangeLength: 0x%016lX\t", MemoryMap[Index].RangeLength));
- DEBUG ((EFI_D_INFO, "PhysicalAddress: 0x%016lX\t", MemoryMap[Index].PhysicalAddress));
- DEBUG ((EFI_D_INFO, "CpuAddress: 0x%016lX\t", MemoryMap[Index].CpuAddress));
- DEBUG ((EFI_D_INFO, "Type: %d\n", MemoryMap[Index].Type));
+ DEBUG ((DEBUG_INFO, "Index: %d ", Index));
+ DEBUG ((DEBUG_INFO, "RangeLength: 0x%016lX\t", MemoryMap[Index].RangeLength));
+ DEBUG ((DEBUG_INFO, "PhysicalAddress: 0x%016lX\t", MemoryMap[Index].PhysicalAddress));
+ DEBUG ((DEBUG_INFO, "CpuAddress: 0x%016lX\t", MemoryMap[Index].CpuAddress));
+ DEBUG ((DEBUG_INFO, "Type: %d\n", MemoryMap[Index].Type));
if ((MemoryMap[Index].PhysicalAddress > 0x100000) &&
((MemoryMap[Index].Type == DualChannelDdrSmramCacheable) ||
(MemoryMap[Index].Type == DualChannelDdrSmramNonCacheable)))
@@ -666,7 +666,7 @@ InstallS3Memory (
}
ASSERT (SmramRanges > 0);
- DEBUG ((EFI_D_INFO, "SmramRanges = 0x%x\n", SmramRanges));
+ DEBUG ((DEBUG_INFO, "SmramRanges = 0x%x\n", SmramRanges));
//
// Allocate one extra EFI_SMRAM_DESCRIPTOR to describe a page of SMRAM memory that contains a pointer
@@ -677,22 +677,22 @@ InstallS3Memory (
BufferSize += ((SmramRanges) * sizeof (EFI_SMRAM_DESCRIPTOR));
}
- DEBUG ((EFI_D_INFO, "BufferSize = 0x%x\n", BufferSize));
+ DEBUG ((DEBUG_INFO, "BufferSize = 0x%x\n", BufferSize));
Hob.Raw = BuildGuidHob (
&gEfiSmmPeiSmramMemoryReserveGuid,
BufferSize
);
ASSERT (Hob.Raw);
- DEBUG ((EFI_D_INFO, "gEfiSmmPeiSmramMemoryReserveGuid/SmramHobDescriptorBlock: 0x%X \n", (UINTN)Hob.Raw));
+ DEBUG ((DEBUG_INFO, "gEfiSmmPeiSmramMemoryReserveGuid/SmramHobDescriptorBlock: 0x%X \n", (UINTN)Hob.Raw));
SmramHobDescriptorBlock = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)(Hob.Raw);
SmramHobDescriptorBlock->NumberOfSmmReservedRegions = SmramRanges + 1;
SmramIndex = 0;
for (Index = 0; Index < NumRanges; Index++) {
- DEBUG ((EFI_D_INFO, "Index: 0x%X \t", Index));
- DEBUG ((EFI_D_INFO, "SmramIndex: 0x%X \n", SmramIndex));
+ DEBUG ((DEBUG_INFO, "Index: 0x%X \t", Index));
+ DEBUG ((DEBUG_INFO, "SmramIndex: 0x%X \n", SmramIndex));
if ((MemoryMap[Index].PhysicalAddress > 0x100000) &&
((MemoryMap[Index].Type == DualChannelDdrSmramCacheable) ||
(MemoryMap[Index].Type == DualChannelDdrSmramNonCacheable))
@@ -710,11 +710,11 @@ InstallS3Memory (
SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState = EFI_SMRAM_CLOSED;
}
- DEBUG ((EFI_D_INFO, "SmramIndex: 0x%X \n", SmramIndex));
- DEBUG ((EFI_D_INFO, "PhysicalStart: 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalStart));
- DEBUG ((EFI_D_INFO, "CpuStart : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].CpuStart));
- DEBUG ((EFI_D_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize));
- DEBUG ((EFI_D_INFO, "RegionState : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState));
+ DEBUG ((DEBUG_INFO, "SmramIndex: 0x%X \n", SmramIndex));
+ DEBUG ((DEBUG_INFO, "PhysicalStart: 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalStart));
+ DEBUG ((DEBUG_INFO, "CpuStart : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].CpuStart));
+ DEBUG ((DEBUG_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize));
+ DEBUG ((DEBUG_INFO, "RegionState : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState));
if ( SmramIndex == SmramRanges - 1) {
//
// one extra EFI_SMRAM_DESCRIPTOR for a page of SMRAM memory
@@ -726,14 +726,14 @@ InstallS3Memory (
SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize = MemoryMap[Index].RangeLength - EFI_PAGE_SIZE;
SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState = SmramHobDescriptorBlock->Descriptor[SmramIndex-1].RegionState;
SmramHobDescriptorBlock->Descriptor[SmramIndex-1].RegionState |= EFI_ALLOCATED;
- DEBUG ((EFI_D_INFO, "SmramIndex: 0x%X \n", SmramIndex));
- DEBUG ((EFI_D_INFO, "PhysicalStart: 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalStart));
- DEBUG ((EFI_D_INFO, "CpuStart : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].CpuStart));
- DEBUG ((EFI_D_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize));
- DEBUG ((EFI_D_INFO, "RegionState : 0x%X\n\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState));
-
- DEBUG ((EFI_D_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex-1].PhysicalSize));
- DEBUG ((EFI_D_INFO, "RegionState : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex-1].RegionState));
+ DEBUG ((DEBUG_INFO, "SmramIndex: 0x%X \n", SmramIndex));
+ DEBUG ((DEBUG_INFO, "PhysicalStart: 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalStart));
+ DEBUG ((DEBUG_INFO, "CpuStart : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].CpuStart));
+ DEBUG ((DEBUG_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize));
+ DEBUG ((DEBUG_INFO, "RegionState : 0x%X\n\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState));
+
+ DEBUG ((DEBUG_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex-1].PhysicalSize));
+ DEBUG ((DEBUG_INFO, "RegionState : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex-1].RegionState));
}
SmramIndex++;
@@ -745,7 +745,7 @@ InstallS3Memory (
//
CopyMem (&DescriptorAcpiVariable, &SmramHobDescriptorBlock->Descriptor[SmramRanges-1], sizeof (EFI_SMRAM_DESCRIPTOR));
DescriptorAcpiVariable.CpuStart += RESERVED_CPU_S3_SAVE_OFFSET;
- DEBUG ((EFI_D_INFO, "gEfiAcpiVariableGuid CpuStart: 0x%X\n", (UINTN)DescriptorAcpiVariable.CpuStart));
+ DEBUG ((DEBUG_INFO, "gEfiAcpiVariableGuid CpuStart: 0x%X\n", (UINTN)DescriptorAcpiVariable.CpuStart));
BuildGuidDataHob (
&gEfiAcpiVariableGuid,
&DescriptorAcpiVariable,
@@ -757,20 +757,20 @@ InstallS3Memory (
// install it as PEI Memory.
//
- DEBUG ((EFI_D_INFO, "TSEG Base = 0x%08x\n", SmramHobDescriptorBlock->Descriptor[SmramRanges].PhysicalStart));
- DEBUG ((EFI_D_INFO, "SmramRanges = 0x%x\n", SmramRanges));
+ DEBUG ((DEBUG_INFO, "TSEG Base = 0x%08x\n", SmramHobDescriptorBlock->Descriptor[SmramRanges].PhysicalStart));
+ DEBUG ((DEBUG_INFO, "SmramRanges = 0x%x\n", SmramRanges));
S3MemoryRangeData = (RESERVED_ACPI_S3_RANGE *)(UINTN)
(SmramHobDescriptorBlock->Descriptor[SmramRanges].PhysicalStart + RESERVED_ACPI_S3_RANGE_OFFSET);
- DEBUG ((EFI_D_INFO, "S3MemoryRangeData = 0x%08x\n", (UINTN)S3MemoryRangeData));
+ DEBUG ((DEBUG_INFO, "S3MemoryRangeData = 0x%08x\n", (UINTN)S3MemoryRangeData));
- DEBUG ((EFI_D_INFO, "S3MemoryRangeData->AcpiReservedMemoryBase = 0x%X\n", (UINTN)S3MemoryRangeData->AcpiReservedMemoryBase));
- DEBUG ((EFI_D_INFO, "S3MemoryRangeData->AcpiReservedMemorySize = 0x%X\n", (UINTN)S3MemoryRangeData->AcpiReservedMemorySize));
- DEBUG ((EFI_D_INFO, "S3MemoryRangeData->SystemMemoryLength = 0x%X\n", (UINTN)S3MemoryRangeData->SystemMemoryLength));
+ DEBUG ((DEBUG_INFO, "S3MemoryRangeData->AcpiReservedMemoryBase = 0x%X\n", (UINTN)S3MemoryRangeData->AcpiReservedMemoryBase));
+ DEBUG ((DEBUG_INFO, "S3MemoryRangeData->AcpiReservedMemorySize = 0x%X\n", (UINTN)S3MemoryRangeData->AcpiReservedMemorySize));
+ DEBUG ((DEBUG_INFO, "S3MemoryRangeData->SystemMemoryLength = 0x%X\n", (UINTN)S3MemoryRangeData->SystemMemoryLength));
S3MemoryBase = (UINTN)(S3MemoryRangeData->AcpiReservedMemoryBase);
- DEBUG ((EFI_D_INFO, "S3MemoryBase = 0x%08x\n", S3MemoryBase));
+ DEBUG ((DEBUG_INFO, "S3MemoryBase = 0x%08x\n", S3MemoryBase));
S3MemorySize = (UINTN)(S3MemoryRangeData->AcpiReservedMemorySize);
- DEBUG ((EFI_D_INFO, "S3MemorySize = 0x%08x\n", S3MemorySize));
+ DEBUG ((DEBUG_INFO, "S3MemorySize = 0x%08x\n", S3MemorySize));
Status = PeiServicesInstallPeiMemory (S3MemoryBase, S3MemorySize);
ASSERT_EFI_ERROR (Status);
@@ -795,7 +795,7 @@ InstallS3Memory (
S3MemoryRangeData->SystemMemoryLength - 0x100000
);
- DEBUG ((EFI_D_INFO, "MemoryBegin: 0x%lX, MemoryLength: 0x%lX\n", 0x100000, S3MemoryRangeData->SystemMemoryLength - 0x100000));
+ DEBUG ((DEBUG_INFO, "MemoryBegin: 0x%lX, MemoryLength: 0x%lX\n", 0x100000, S3MemoryRangeData->SystemMemoryLength - 0x100000));
for (Index = 0; Index < NumRanges; Index++) {
if ((MemoryMap[Index].Type == DualChannelDdrMainMemory) &&
@@ -814,10 +814,10 @@ InstallS3Memory (
MemoryMap[Index].PhysicalAddress,
MemoryMap[Index].RangeLength
);
- DEBUG ((EFI_D_INFO, "MemoryBegin: 0x%lX, MemoryLength: 0x%lX\n", MemoryMap[Index].PhysicalAddress, MemoryMap[Index].RangeLength));
+ DEBUG ((DEBUG_INFO, "MemoryBegin: 0x%lX, MemoryLength: 0x%lX\n", MemoryMap[Index].PhysicalAddress, MemoryMap[Index].RangeLength));
- DEBUG ((EFI_D_INFO, "Build resource HOB for Legacy Region on S3 patch :"));
- DEBUG ((EFI_D_INFO, " Memory Base:0x%lX Length:0x%lX\n", MemoryMap[Index].PhysicalAddress, MemoryMap[Index].RangeLength));
+ DEBUG ((DEBUG_INFO, "Build resource HOB for Legacy Region on S3 patch :"));
+ DEBUG ((DEBUG_INFO, " Memory Base:0x%lX Length:0x%lX\n", MemoryMap[Index].PhysicalAddress, MemoryMap[Index].RangeLength));
}
}
@@ -894,7 +894,7 @@ GetPlatformMemorySize (
*MemorySize = PEI_MIN_MEMORY_SIZE;
for (Index = 0; Index < DataSize / sizeof (EFI_MEMORY_TYPE_INFORMATION); Index++) {
- DEBUG ((EFI_D_INFO, "Index %d, Page: %d\n", Index, MemoryData[Index].NumberOfPages));
+ DEBUG ((DEBUG_INFO, "Index %d, Page: %d\n", Index, MemoryData[Index].NumberOfPages));
*MemorySize += MemoryData[Index].NumberOfPages * EFI_PAGE_SIZE;
}
@@ -908,7 +908,7 @@ GetPlatformMemorySize (
);
}
- DEBUG ((EFI_D_INFO, "GetPlatformMemorySize, MemorySize: 0x%lX\n", *MemorySize));
+ DEBUG ((DEBUG_INFO, "GetPlatformMemorySize, MemorySize: 0x%lX\n", *MemorySize));
return EFI_SUCCESS;
}
@@ -941,7 +941,7 @@ PostFspmHobProcess (
ASSERT_EFI_ERROR (Status);
if (BootMode == BOOT_ON_S3_RESUME) {
- DEBUG ((EFI_D_INFO, "Following BOOT_ON_S3_RESUME boot path.\n"));
+ DEBUG ((DEBUG_INFO, "Following BOOT_ON_S3_RESUME boot path.\n"));
Status = InstallS3Memory (PeiServices, BootMode, FspHobList);
ASSERT_EFI_ERROR (Status);
@@ -1032,7 +1032,7 @@ GetAvailableMemoryRanges (
{
EFI_PEI_HOB_POINTERS Hob;
- DEBUG ((EFI_D_INFO, "GetAvailableMemoryRanges++\n"));
+ DEBUG ((DEBUG_INFO, "GetAvailableMemoryRanges++\n"));
if ((*NumRanges) < MAX_RANGES) {
return EFI_BUFFER_TOO_SMALL;
}
@@ -1050,7 +1050,7 @@ GetAvailableMemoryRanges (
MemoryMap[*NumRanges].Type = DualChannelDdrReservedMemory;
(*NumRanges)++;
DEBUG ((
- EFI_D_INFO,
+ DEBUG_INFO,
" GetAvailableMemoryRanges Base:0x%016lX, Size: 0x%016lX\n", \
Hob.ResourceDescriptor->PhysicalStart, \
Hob.ResourceDescriptor->ResourceLength
@@ -1072,7 +1072,7 @@ GetReservedMemoryRanges (
{
EFI_PEI_HOB_POINTERS Hob;
- DEBUG ((EFI_D_INFO, "GetReservedMemoryRanges\n"));
+ DEBUG ((DEBUG_INFO, "GetReservedMemoryRanges\n"));
if ((*NumRanges) < MAX_RANGES) {
return EFI_BUFFER_TOO_SMALL;
}
@@ -1090,7 +1090,7 @@ GetReservedMemoryRanges (
MemoryMap[*NumRanges].Type = DualChannelDdrReservedMemory;
(*NumRanges)++;
DEBUG ((
- EFI_D_INFO,
+ DEBUG_INFO,
" GetReservedMemoryRanges Base:0x%016lX, Size: 0x%016lX\n", \
Hob.ResourceDescriptor->PhysicalStart, \
Hob.ResourceDescriptor->ResourceLength
@@ -1375,7 +1375,7 @@ SetPeiCacheMode (
break;
}
- DEBUG ((EFI_D_INFO, "Base=%lx, Mask=%lx\n", MtrrSetting.Variables.Mtrr[Index].Base, MtrrSetting.Variables.Mtrr[Index].Mask));
+ DEBUG ((DEBUG_INFO, "Base=%lx, Mask=%lx\n", MtrrSetting.Variables.Mtrr[Index].Base, MtrrSetting.Variables.Mtrr[Index].Mask));
}
//
diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c b/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
index ed6917b27b..5e7f051bb6 100644
--- a/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
+++ b/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
@@ -10,10 +10,10 @@
#include <FspEas.h>
typedef struct {
- EFI_PHYSICAL_ADDRESS MicrocodeRegionBase;
- UINT64 MicrocodeRegionSize;
- EFI_PHYSICAL_ADDRESS CodeRegionBase;
- UINT64 CodeRegionSize;
+ EFI_PHYSICAL_ADDRESS MicrocodeRegionBase;
+ UINT64 MicrocodeRegionSize;
+ EFI_PHYSICAL_ADDRESS CodeRegionBase;
+ UINT64 CodeRegionSize;
} FSPT_CORE_UPD;
typedef struct {
diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Universal/PCD/Dxe/Pcd.c b/Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Universal/PCD/Dxe/Pcd.c
index cce92be6a6..e4d5a78147 100644
--- a/Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Universal/PCD/Dxe/Pcd.c
+++ b/Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Universal/PCD/Dxe/Pcd.c
@@ -39,7 +39,7 @@ CheckPcdInFsp (
&& ( CompareGuid (InputGuid, &gEfiAmdAgesaModulePkgTokenSpaceGuid) // AgesaModulePkg
|| CompareGuid (InputGuid, &gEfiAmdAgesaPkgTokenSpaceGuid) // AgesaPkg
|| CompareGuid (InputGuid, &gAmdFspPkgGuid) // FspPkg
- || CompareGuid (InputGuid, &gAmdCpmPkgTokenSpaceGuid))) // AmdCpmPkg
+ || CompareGuid (InputGuid, &gAmdCpmPkgTokenSpaceGuid))) // AmdCpmPkg
{
return TRUE;
}
diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Universal/PCD/Pei/Pcd.c b/Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Universal/PCD/Pei/Pcd.c
index 129f03e684..26e0ec5311 100644
--- a/Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Universal/PCD/Pei/Pcd.c
+++ b/Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Universal/PCD/Pei/Pcd.c
@@ -30,11 +30,11 @@ CheckPcdInFsp (
IN CONST EFI_GUID *InputGuid
)
{
- if ((FixedPcdGet8 (PcdFspModeSelection) == 0) // Dispatch mode
- && (CompareGuid (InputGuid, &gEfiAmdAgesaModulePkgTokenSpaceGuid) // AgesaModulePkg
- || CompareGuid (InputGuid, &gEfiAmdAgesaPkgTokenSpaceGuid) // AgesaPkg
- || CompareGuid (InputGuid, &gAmdFspPkgGuid) // FspPkg
- || CompareGuid (InputGuid, &gAmdCpmPkgTokenSpaceGuid))) // AmdCpmPkg
+ if ( (FixedPcdGet8 (PcdFspModeSelection) == 0) // Dispatch mode
+ && ( CompareGuid (InputGuid, &gEfiAmdAgesaModulePkgTokenSpaceGuid) // AgesaModulePkg
+ || CompareGuid (InputGuid, &gEfiAmdAgesaPkgTokenSpaceGuid) // AgesaPkg
+ || CompareGuid (InputGuid, &gAmdFspPkgGuid) // FspPkg
+ || CompareGuid (InputGuid, &gAmdCpmPkgTokenSpaceGuid))) // AmdCpmPkg
{
return TRUE;
}
diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c b/Platform/AMD/VanGoghBoard/Override/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
index 37ba9d8b5d..14bac8d3bf 100644
--- a/Platform/AMD/VanGoghBoard/Override/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
+++ b/Platform/AMD/VanGoghBoard/Override/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
@@ -1349,7 +1349,7 @@ PcRtcAcpiTableChangeCallback (
if (!EFI_ERROR (Status)) {
Century = (UINT8)(Time.Year / 100);
Century = DecimalToBcd8 (Century);
- DEBUG ((EFI_D_INFO, "PcRtc: Write 0x%x to CMOS location 0x%x\n", Century, mModuleGlobal.CenturyRtcAddress));
+ DEBUG ((DEBUG_INFO, "PcRtc: Write 0x%x to CMOS location 0x%x\n", Century, mModuleGlobal.CenturyRtcAddress));
RtcWrite (mModuleGlobal.CenturyRtcAddress, Century);
}
}
diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/DxeTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/DxeTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c
index 9ea87fafd4..236707b158 100644
--- a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/DxeTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c
+++ b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/DxeTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c
@@ -75,7 +75,7 @@ Tpm2SubmitCommand (
EFI_STATUS Status = EFI_SUCCESS;
if ((NULL == InputParameterBlock) || (NULL == OutputParameterBlock) || (0 == InputParameterBlockSize)) {
- DEBUG ((EFI_D_ERROR, "Buffer == NULL or InputParameterBlockSize == 0\n"));
+ DEBUG ((DEBUG_ERROR, "Buffer == NULL or InputParameterBlockSize == 0\n"));
Status = EFI_INVALID_PARAMETER;
return Status;
}
diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/PeiTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/PeiTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c
index 32f63b78ee..7dd571665c 100644
--- a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/PeiTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c
+++ b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/PeiTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c
@@ -84,7 +84,7 @@ Tpm2SubmitCommand (
EFI_STATUS Status = EFI_SUCCESS;
if ((NULL == InputParameterBlock) || (NULL == OutputParameterBlock) || (0 == InputParameterBlockSize)) {
- DEBUG ((EFI_D_ERROR, "Buffer == NULL or InputParameterBlockSize == 0\n"));
+ DEBUG ((DEBUG_ERROR, "Buffer == NULL or InputParameterBlockSize == 0\n"));
Status = EFI_INVALID_PARAMETER;
return Status;
}
diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/Tpm2DeviceLib/Tpm2DeviceLibFtpm.c b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/Tpm2DeviceLib/Tpm2DeviceLibFtpm.c
index daf75fa1b3..8c4c952c0e 100644
--- a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/Tpm2DeviceLib/Tpm2DeviceLibFtpm.c
+++ b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/Tpm2DeviceLib/Tpm2DeviceLibFtpm.c
@@ -69,7 +69,7 @@ Tpm2SubmitCommand (
EFI_STATUS Status = EFI_SUCCESS;
if ((NULL == InputParameterBlock) || (NULL == OutputParameterBlock) || (0 == InputParameterBlockSize)) {
- DEBUG ((EFI_D_ERROR, "Buffer == NULL or InputParameterBlockSize == 0\n"));
+ DEBUG ((DEBUG_ERROR, "Buffer == NULL or InputParameterBlockSize == 0\n"));
Status = EFI_INVALID_PARAMETER;
return Status;
}
diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/DxeTcg2PhysicalPresenceLib/DxeTcg2PhysicalPresenceLib.c b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/DxeTcg2PhysicalPresenceLib/DxeTcg2PhysicalPresenceLib.c
index 053f565562..bb2aac9af3 100644
--- a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/DxeTcg2PhysicalPresenceLib/DxeTcg2PhysicalPresenceLib.c
+++ b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/DxeTcg2PhysicalPresenceLib/DxeTcg2PhysicalPresenceLib.c
@@ -100,16 +100,16 @@ Tpm2CommandClear (
CopyMem (LocalAuthSession.hmac.buffer, PlatformAuth->buffer, PlatformAuth->size);
}
- DEBUG ((EFI_D_INFO, "Tpm2ClearControl ... \n"));
+ DEBUG ((DEBUG_INFO, "Tpm2ClearControl ... \n"));
Status = Tpm2ClearControl (TPM_RH_PLATFORM, AuthSession, NO);
- DEBUG ((EFI_D_INFO, "Tpm2ClearControl - %r\n", Status));
+ DEBUG ((DEBUG_INFO, "Tpm2ClearControl - %r\n", Status));
if (EFI_ERROR (Status)) {
goto Done;
}
- DEBUG ((EFI_D_INFO, "Tpm2Clear ... \n"));
+ DEBUG ((DEBUG_INFO, "Tpm2Clear ... \n"));
Status = Tpm2Clear (TPM_RH_PLATFORM, AuthSession);
- DEBUG ((EFI_D_INFO, "Tpm2Clear - %r\n", Status));
+ DEBUG ((DEBUG_INFO, "Tpm2Clear - %r\n", Status));
Done:
ZeroMem (&LocalAuthSession.hmac, sizeof (LocalAuthSession.hmac));
@@ -143,7 +143,7 @@ Tpm2CommandChangeEps (
}
Status = Tpm2ChangeEPS (TPM_RH_PLATFORM, AuthSession);
- DEBUG ((EFI_D_INFO, "Tpm2ChangeEPS - %r\n", Status));
+ DEBUG ((DEBUG_INFO, "Tpm2ChangeEPS - %r\n", Status));
ZeroMem (&LocalAuthSession.hmac, sizeof (LocalAuthSession.hmac));
return Status;
@@ -808,7 +808,7 @@ Tcg2ExecutePendingTpmRequest (
//
// Print confirm text and wait for approval.
//
- DEBUG ((EFI_D_INFO, "Print confirm text and wait for approval.\n"));
+ DEBUG ((DEBUG_INFO, "Print confirm text and wait for approval.\n"));
RequestConfirmed = TRUE;
// RequestConfirmed = Tcg2UserConfirm (TcgPpData->PPRequest, TcgPpData->PPRequestParameter);
}
@@ -863,12 +863,12 @@ Tcg2ExecutePendingTpmRequest (
TcgPpData
);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "Fail to set variable %S, %r\n", TCG2_PHYSICAL_PRESENCE_VARIABLE, Status));
+ DEBUG ((DEBUG_ERROR, "Fail to set variable %S, %r\n", TCG2_PHYSICAL_PRESENCE_VARIABLE, Status));
return;
}
if (TcgPpData->PPResponse == TCG_PP_OPERATION_RESPONSE_USER_ABORT) {
- DEBUG ((EFI_D_INFO, "User abort the TPM action \n"));
+ DEBUG ((DEBUG_INFO, "User abort the TPM action \n"));
return;
}
@@ -912,7 +912,7 @@ Tcg2ExecutePendingTpmRequest (
}
// Print (L"Rebooting system to make TPM2 settings in effect\n");
- DEBUG ((EFI_D_INFO, "Rebooting system to make TPM2 settings in effect\n"));
+ DEBUG ((DEBUG_INFO, "Rebooting system to make TPM2 settings in effect\n"));
gRT->ResetSystem (EfiResetCold, EFI_SUCCESS, 0, NULL);
ASSERT (FALSE);
}
@@ -954,7 +954,7 @@ Tcg2PhysicalPresenceLibProcessRequest (
&gEfiTcg2PhysicalPresenceGuid
);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "[TPM2] Error when lock variable %s, Status = %r\n", TCG2_PHYSICAL_PRESENCE_FLAGS_VARIABLE, Status));
+ DEBUG ((DEBUG_ERROR, "[TPM2] Error when lock variable %s, Status = %r\n", TCG2_PHYSICAL_PRESENCE_FLAGS_VARIABLE, Status));
ASSERT_EFI_ERROR (Status);
}
}
@@ -965,7 +965,7 @@ Tcg2PhysicalPresenceLibProcessRequest (
// Check S4 resume
//
// if (GetBootModeHob () == BOOT_ON_S4_RESUME) {
- // DEBUG ((EFI_D_INFO, "S4 Resume, Skip TPM PP process!\n"));
+ // DEBUG ((DEBUG_INFO, "S4 Resume, Skip TPM PP process!\n"));
// return ;
// }
@@ -990,7 +990,7 @@ Tcg2PhysicalPresenceLibProcessRequest (
&PpiFlags
);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "[TPM2] Set physical presence flag failed, Status = %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "[TPM2] Set physical presence flag failed, Status = %r\n", Status));
return;
}
@@ -1019,18 +1019,18 @@ Tcg2PhysicalPresenceLibProcessRequest (
&TcgPpData
);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "[TPM2] Set physical presence variable failed, Status = %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "[TPM2] Set physical presence variable failed, Status = %r\n", Status));
return;
}
}
- DEBUG ((EFI_D_INFO, "[TPM2] Flags=%x, PPRequest=%x (LastPPRequest=%x)\n", PpiFlags.PPFlags, TcgPpData.PPRequest, TcgPpData.LastPPRequest));
+ DEBUG ((DEBUG_INFO, "[TPM2] Flags=%x, PPRequest=%x (LastPPRequest=%x)\n", PpiFlags.PPFlags, TcgPpData.PPRequest, TcgPpData.LastPPRequest));
//
// Execute pending TPM request.
//
Tcg2ExecutePendingTpmRequest (PlatformAuth, &TcgPpData, &PpiFlags);
- DEBUG ((EFI_D_INFO, "[TPM2] PPResponse = %x (LastPPRequest=%x, Flags=%x)\n", TcgPpData.PPResponse, TcgPpData.LastPPRequest, PpiFlags.PPFlags));
+ DEBUG ((DEBUG_INFO, "[TPM2] PPResponse = %x (LastPPRequest=%x, Flags=%x)\n", TcgPpData.PPResponse, TcgPpData.LastPPRequest, PpiFlags.PPFlags));
}
/**
@@ -1061,7 +1061,7 @@ Tcg2PhysicalPresenceLibNeedUserConfirm (
// Check S4 resume
//
// if (GetBootModeHob () == BOOT_ON_S4_RESUME) {
- // DEBUG ((EFI_D_INFO, "S4 Resume, Skip TPM PP process!\n"));
+ // DEBUG ((DEBUG_INFO, "S4 Resume, Skip TPM PP process!\n"));
// return FALSE;
// }
@@ -1077,7 +1077,7 @@ Tcg2PhysicalPresenceLibNeedUserConfirm (
&TcgPpData
);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "[TPM2] GetVariable %S, %r\n", TCG2_PHYSICAL_PRESENCE_VARIABLE, Status));
+ DEBUG ((DEBUG_ERROR, "[TPM2] GetVariable %S, %r\n", TCG2_PHYSICAL_PRESENCE_VARIABLE, Status));
return FALSE;
}
@@ -1090,7 +1090,7 @@ Tcg2PhysicalPresenceLibNeedUserConfirm (
&PpiFlags
);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "[TPM2] GetVariable %S, %r\n", TCG2_PHYSICAL_PRESENCE_FLAGS_VARIABLE, Status));
+ DEBUG ((DEBUG_ERROR, "[TPM2] GetVariable %S, %r\n", TCG2_PHYSICAL_PRESENCE_FLAGS_VARIABLE, Status));
return FALSE;
}
@@ -1138,7 +1138,7 @@ Tcg2PhysicalPresenceLibReturnOperationResponseToOsFunction (
UINTN DataSize;
EFI_TCG2_PHYSICAL_PRESENCE PpData;
- DEBUG ((EFI_D_INFO, "[TPM2] ReturnOperationResponseToOsFunction\n"));
+ DEBUG ((DEBUG_INFO, "[TPM2] ReturnOperationResponseToOsFunction\n"));
//
// Get the Physical Presence variable
@@ -1154,7 +1154,7 @@ Tcg2PhysicalPresenceLibReturnOperationResponseToOsFunction (
if (EFI_ERROR (Status)) {
*MostRecentRequest = 0;
*Response = 0;
- DEBUG ((EFI_D_ERROR, "[TPM2] Get PP variable failure! Status = %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "[TPM2] Get PP variable failure! Status = %r\n", Status));
return TCG_PP_RETURN_TPM_OPERATION_RESPONSE_FAILURE;
}
@@ -1189,7 +1189,7 @@ Tcg2PhysicalPresenceLibSubmitRequestToPreOSFunction (
EFI_TCG2_PHYSICAL_PRESENCE PpData;
EFI_TCG2_PHYSICAL_PRESENCE_FLAGS Flags;
- DEBUG ((EFI_D_INFO, "[TPM2] SubmitRequestToPreOSFunction, Request = %x, %x\n", OperationRequest, RequestParameter));
+ DEBUG ((DEBUG_INFO, "[TPM2] SubmitRequestToPreOSFunction, Request = %x, %x\n", OperationRequest, RequestParameter));
//
// Get the Physical Presence variable
@@ -1203,7 +1203,7 @@ Tcg2PhysicalPresenceLibSubmitRequestToPreOSFunction (
&PpData
);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "[TPM2] Get PP variable failure! Status = %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "[TPM2] Get PP variable failure! Status = %r\n", Status));
return TCG_PP_SUBMIT_REQUEST_TO_PREOS_GENERAL_FAILURE;
}
@@ -1227,7 +1227,7 @@ Tcg2PhysicalPresenceLibSubmitRequestToPreOSFunction (
&PpData
);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "[TPM2] Set PP variable failure! Status = %r\n", Status));
+ DEBUG ((DEBUG_ERROR, "[TPM2] Set PP variable failure! Status = %r\n", Status));
return TCG_PP_SUBMIT_REQUEST_TO_PREOS_GENERAL_FAILURE;
}
}
@@ -1266,7 +1266,7 @@ Tcg2PhysicalPresenceLibGetManagementFlags (
EFI_TCG2_PHYSICAL_PRESENCE_FLAGS PpiFlags;
UINTN DataSize;
- DEBUG ((EFI_D_INFO, "[TPM2] GetManagementFlags\n"));
+ DEBUG ((DEBUG_INFO, "[TPM2] GetManagementFlags\n"));
DataSize = sizeof (EFI_TCG2_PHYSICAL_PRESENCE_FLAGS);
Status = gRT->GetVariable (
diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/AmdFtpm/FtpmTcg2Smm/Tcg2Smm.c b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/AmdFtpm/FtpmTcg2Smm/Tcg2Smm.c
index f38749298a..b27e515da9 100644
--- a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/AmdFtpm/FtpmTcg2Smm/Tcg2Smm.c
+++ b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/AmdFtpm/FtpmTcg2Smm/Tcg2Smm.c
@@ -345,7 +345,7 @@ UpdatePPVersion (
{
if (AsciiStrCmp ((CHAR8 *)DataPtr, PHYSICAL_PRESENCE_VERSION_TAG) == 0) {
Status = AsciiStrCpyS ((CHAR8 *)DataPtr, PHYSICAL_PRESENCE_VERSION_SIZE, PPVer);
- DEBUG ((EFI_D_INFO, "TPM2 Physical Presence Interface Version update status 0x%x\n", Status));
+ DEBUG ((DEBUG_INFO, "TPM2 Physical Presence Interface Version update status 0x%x\n", Status));
return Status;
}
}
@@ -687,8 +687,8 @@ PublishAcpiTable (
ASSERT (Table->OemTableId == SIGNATURE_64 ('T', 'p', 'm', '2', 'T', 'a', 'b', 'l'));
CopyMem (Table->OemId, PcdGetPtr (PcdAcpiDefaultOemId), sizeof (Table->OemId));
- DEBUG ((EFI_D_INFO, "FtpmControlArea: 0x%lX\n", (UINTN)(VOID *)mFtpmControlArea));
- DEBUG ((EFI_D_INFO, "CommandSize: 0x%lX, ResponseSize: 0x%lX \n", mFtpmControlArea->CommandSize, mFtpmControlArea->ResponseSize));
+ DEBUG ((DEBUG_INFO, "FtpmControlArea: 0x%lX\n", (UINTN)(VOID *)mFtpmControlArea));
+ DEBUG ((DEBUG_INFO, "CommandSize: 0x%lX, ResponseSize: 0x%lX \n", mFtpmControlArea->CommandSize, mFtpmControlArea->ResponseSize));
Status = AssignMemory32Fixed (Table, (UINT32)mFtpmControlArea->CommandAddress, (UINT32)mFtpmControlArea->ResponseAddress);
ASSERT_EFI_ERROR (Status);
@@ -813,18 +813,18 @@ InitializeTcgSmm (
EFI_SMM_SW_REGISTER_CONTEXT SwContext;
EFI_HANDLE SwHandle;
- DEBUG ((EFI_D_INFO, "InitializeTcgSmm Entry \n"));
+ DEBUG ((DEBUG_INFO, "InitializeTcgSmm Entry \n"));
if (!CompareGuid (PcdGetPtr (PcdTpmInstanceGuid), &gEfiTpmDeviceInstanceTpm20DtpmGuid)) {
- DEBUG ((EFI_D_ERROR, "No TPM2 DTPM instance required!\n"));
+ DEBUG ((DEBUG_ERROR, "No TPM2 DTPM instance required!\n"));
return EFI_UNSUPPORTED;
}
// if (!GetFtpmControlArea(&mFtpmControlArea)) {
- // DEBUG ((EFI_D_ERROR, "Get fTPM Control Area failed!\n"));
+ // DEBUG ((DEBUG_ERROR, "Get fTPM Control Area failed!\n"));
// return EFI_UNSUPPORTED;
// }
mFtpmControlArea = (VOID *)(UINTN)PcdGet64 (PcdTpmBaseAddress);
- DEBUG ((EFI_D_INFO, "Get PcdTpmBaseAddress:%x\n", mFtpmControlArea));
+ DEBUG ((DEBUG_INFO, "Get PcdTpmBaseAddress:%x\n", mFtpmControlArea));
Status = PublishAcpiTable ();
ASSERT_EFI_ERROR (Status);
@@ -841,7 +841,7 @@ InitializeTcgSmm (
}
mTcgNvs->PhysicalPresence.SoftwareSmi = (UINT8)SwContext.SwSmiInputValue;
- DEBUG ((EFI_D_INFO, "PhysicalPresence SoftwareSmi: 0x%X\n", (UINT8)SwContext.SwSmiInputValue));
+ DEBUG ((DEBUG_INFO, "PhysicalPresence SoftwareSmi: 0x%X\n", (UINT8)SwContext.SwSmiInputValue));
SwContext.SwSmiInputValue = (UINTN)-1;
Status = SwDispatch->Register (SwDispatch, MemoryClearCallback, &SwContext, &SwHandle);
@@ -851,7 +851,7 @@ InitializeTcgSmm (
}
mTcgNvs->MemoryClear.SoftwareSmi = (UINT8)SwContext.SwSmiInputValue;
- DEBUG ((EFI_D_INFO, "MemoryClear SoftwareSmi: 0x%X\n", (UINT8)SwContext.SwSmiInputValue));
+ DEBUG ((DEBUG_INFO, "MemoryClear SoftwareSmi: 0x%X\n", (UINT8)SwContext.SwSmiInputValue));
//
// Locate SmmVariableProtocol.
diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPeim.c b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPeim.c
index bbbcba6e8b..07967017c9 100644
--- a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPeim.c
+++ b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPeim.c
@@ -113,11 +113,11 @@ Tcg2ConfigPeimEntryPoint (
//
// Although we have SetupVariable info, we still need detect TPM device manually.
//
- DEBUG ((EFI_D_INFO, "Tcg2Configuration.TpmDevice from Setup: %x\n", Tcg2Configuration.TpmDevice));
+ DEBUG ((DEBUG_INFO, "Tcg2Configuration.TpmDevice from Setup: %x\n", Tcg2Configuration.TpmDevice));
if (PcdGetBool (PcdTpmAutoDetection)) {
TpmDevice = DetectTpmDevice (Tcg2Configuration.TpmDevice);
- DEBUG ((EFI_D_INFO, "TpmDevice final: %x\n", TpmDevice));
+ DEBUG ((DEBUG_INFO, "TpmDevice final: %x\n", TpmDevice));
if (TpmDevice != TPM_DEVICE_NULL) {
Tcg2Configuration.TpmDevice = TpmDevice;
}
@@ -138,7 +138,7 @@ Tcg2ConfigPeimEntryPoint (
Size = sizeof (mTpmInstanceId[Index].TpmInstanceGuid);
Status = PcdSetPtrS (PcdTpmInstanceGuid, &Size, &mTpmInstanceId[Index].TpmInstanceGuid);
ASSERT_EFI_ERROR (Status);
- DEBUG ((EFI_D_INFO, "TpmDevice PCD: %g\n", &mTpmInstanceId[Index].TpmInstanceGuid));
+ DEBUG ((DEBUG_INFO, "TpmDevice PCD: %g\n", &mTpmInstanceId[Index].TpmInstanceGuid));
break;
}
}
diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/Tcg2Config/TpmDetection.c b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/Tcg2Config/TpmDetection.c
index e301295256..2901fba395 100644
--- a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/Tcg2Config/TpmDetection.c
+++ b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/Tcg2Config/TpmDetection.c
@@ -65,12 +65,11 @@ DetectTpmDevice (
Status = PeiServicesGetBootMode (&BootMode);
ASSERT_EFI_ERROR (Status);
-
//
// In S3, we rely on normal boot Detection, because we save to ReadOnly Variable in normal boot.
//
if (BootMode == BOOT_ON_S3_RESUME) {
- DEBUG ((EFI_D_INFO, "DetectTpmDevice: S3 mode\n"));
+ DEBUG ((DEBUG_INFO, "DetectTpmDevice: S3 mode\n"));
Status = PeiServicesLocatePpi (&gEfiPeiReadOnlyVariable2PpiGuid, 0, NULL, (VOID **)&VariablePpi);
ASSERT_EFI_ERROR (Status);
@@ -89,13 +88,13 @@ DetectTpmDevice (
(Tcg2DeviceDetection.TpmDeviceDetected >= TPM_DEVICE_MIN) &&
(Tcg2DeviceDetection.TpmDeviceDetected <= TPM_DEVICE_MAX))
{
- DEBUG ((EFI_D_INFO, "TpmDevice from DeviceDetection: %x\n", Tcg2DeviceDetection.TpmDeviceDetected));
+ DEBUG ((DEBUG_INFO, "TpmDevice from DeviceDetection: %x\n", Tcg2DeviceDetection.TpmDeviceDetected));
Status = Tpm2Startup (TPM_SU_STATE);
return Tcg2DeviceDetection.TpmDeviceDetected;
}
}
- DEBUG ((EFI_D_INFO, "DetectTpmDevice:\n"));
+ DEBUG ((DEBUG_INFO, "DetectTpmDevice:\n"));
Status = Tpm2RequestUseTpm ();
if (EFI_ERROR (Status)) {
@@ -106,7 +105,7 @@ DetectTpmDevice (
}
Status = Tpm2Startup (TPM_SU_CLEAR);
- DEBUG ((EFI_D_INFO, "Tpm2Startup: %r\n", Status));
+ DEBUG ((DEBUG_INFO, "Tpm2Startup: %r\n", Status));
if (EFI_ERROR (Status)) {
return TPM_DEVICE_NULL;
}
diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c b/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c
index 7b07425336..298e074a29 100644
--- a/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c
+++ b/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c
@@ -7,6 +7,7 @@
**/
/* This file includes code originally published under the following license. */
+
/** @file
Implementation shared across all library instances.
@@ -215,12 +216,13 @@ SmmCpuFeaturesInitializeProcessor (
//
// Configure SMBASE.
//
- CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
+ CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
if (mSmmSaveStateRegisterLma == EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT) {
CpuState->x86.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex];
} else {
CpuState->x64.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex];
}
+
//
// Intel(R) 64 and IA-32 Architectures Software Developer's Manual
// Volume 3C, Section 35.2 MSRs in the Intel(R) Core(TM) 2 Processor Family
@@ -240,6 +242,7 @@ SmmCpuFeaturesInitializeProcessor (
}
}
}
+
//
// If SMRR is supported, then program SMRR base/mask MSRs.
// The EFI_MSR_SMRR_PHYS_MASK_VALID bit is not set until the first normal SMI.
diff --git a/Platform/AMD/VanGoghBoard/Readme.md b/Platform/AMD/VanGoghBoard/Readme.md
new file mode 100644
index 0000000000..59f5e92361
--- /dev/null
+++ b/Platform/AMD/VanGoghBoard/Readme.md
@@ -0,0 +1,67 @@
+This document introduces how AMD create a EDK II based sample platform BIOS for AMD Chachani-based reference board.
+Customer can reference this document to study EDK2 BIOS integration.
+
+# How to build
+
+## The below steps are verified on Microsoft Windows 10 64-bit.
+1.Install latest Microsoft Visual Studio 2017 Professional version(15.9.40 or newer) in the build machine ,make sure
+ that Desktop development with C++ was selected when installing. And selected MSVC & Windows 10 SDK tool when installing.
+2.Install Python 3.9.x (python-3.9.13-amd64.exe), make sure path is "C:\Python39".
+3.Install NASM (nasm-2.15.05-installer-x64.exe), and make sure path is "C:\Nasm". (http://www.nasm.us/)
+4.Download and extract iasl-win-20130117.zip from https://acpica.org/sites/acpica/files/iasl-win-20130117.zip,
+ and copy iasl.exe to C:\ASL.
+5.Download and install ActivePerl-5.24.3.2404-MSWin32-x64-404865.exe, copy folders Perl64\bin and Perl64\lib to correct path
+ at Buildrom.bat.
+6.Download and install OpenSSL https://github.com/openssl/openssl/archive/OpenSSL_1_0_1e.zip. And make sure OPENSSL_PATH set
+ the correct path at GenCapsule.bat.
+
+## Linux build environment preparation
+
+### Common Environment
+Just like Windows environment, you need to install several common tools: IASL & NASM. You may refer to your distribution's
+instructions. E.g., apt install iasl nasm in Ubuntu, or pacman -S iasl nasm in Archlinux/SteamOS.Some distributions lacks
+developer packages by default. E.g., on Ubuntu, you may install uuid-dev explicitly by apt install uuid-dev.Python3 is
+built-in for most Linux distributions. You may install it manually if your distribution lacks of it.
+
+### GCC Environment
+GCC is built-in for most Linux distributions. Use gcc --version to check its version and ensure its major version > 5.
+Also, make sure binutils is installed. Use ld --version to check its version. If gcc & binutils are not installed,
+you may refer to your distribution's instructions.
+
+### Clang Environment
+For license reason, Clang is NOT included in most distributions. You may install manually with your distribution's instructions.
+E.g., apt install llvm clang lld in Ubuntu, or pacman -S llvm clang lld in Archlinux/SteamOS.
+Use clang --version to check Clang's version and ensure its major version > 9.
+Use lld-link --version to check LLD's version and ensure its major version > 9.
+
+## Obtaining source code
+1. Create a new folder (directory) on your local development machine for use as your workspace. This example
+ uses `/work/git/tianocore`, modify as appropriate for your needs.
+ ```
+ $ export WORKSPACE=/work/git/tianocore
+ $ mkdir -p $WORKSPACE
+ $ cd $WORKSPACE
+ ```
+
+2. Into that folder, clone:
+ 1. [edk2](https://github.com/tianocore/edk2)
+ 2. [edk2-platforms](https://github.com/tianocore/edk2-platforms)
+ 3. [edk2-non-osi](https://github.com/tianocore/edk2-non-osi)
+ ```
+ $ git clone https://github.com/tianocore/edk2.git
+ $ git checkout <branch name> (Please follow ReleaseNote.txt to checkout the specified version)
+ $ git submodule update --init
+ ...
+ $ git clone https://github.com/tianocore/edk2-platforms.git
+ $ git submodule update --init
+ ...
+ $ git clone https://github.com/tianocore/edk2-non-osi.git
+ $ git checkout <branch name> (Please follow ReleaseNote.txt to checkout the specified version)
+ ```
+## Manual building
+
+### Windows building
+Copy GoZ_ChachaniInt.bat to $WORKSPACE and run it , then execute command “buildrom.bat†to generate final BIOS binary 'ChachaniIntUDK.FD'.
+
+### Linux building
+Copy build.sh to $WORKSPACE and run it to generate final BIOS binary 'ChachaniIntUDK.FD'.
diff --git a/Platform/AMD/VanGoghBoard/ReleaseNote.txt b/Platform/AMD/VanGoghBoard/ReleaseNote.txt
new file mode 100644
index 0000000000..911dcb7e88
--- /dev/null
+++ b/Platform/AMD/VanGoghBoard/ReleaseNote.txt
@@ -0,0 +1,14 @@
+****************************************************************************
+Chachani reference BIOS Release Notes
+
+Version: UCC3B16.3824 for VanGogh
+ScanID: SWCSD-7813
+
+Date: Jan 19 2024
+
+tianocore/edk2 version: edk2-stable202208
+tianocore/edk2-non-osi version: 1f4d7849f2344aa770f4de5224188654ae5b0e50
+----------------------------------------------------------------------------
+- Description:
+
+1. Initial ChachaniBoard reference BIOS.
\ No newline at end of file
diff --git a/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/BootMode.c b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/BootMode.c
index 9102ae2b86..9cefd4e871 100644
--- a/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/BootMode.c
+++ b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/BootMode.c
@@ -60,7 +60,7 @@ ValidateFvHeader (
EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader;
if (BOOT_IN_RECOVERY_MODE == *BootMode) {
- DEBUG ((EFI_D_INFO, "Boot mode recovery\n"));
+ DEBUG ((DEBUG_INFO, "Boot mode recovery\n"));
return EFI_SUCCESS;
}
@@ -144,7 +144,7 @@ UpdateBootMode (
//
if (ValidateFvHeader (&NewBootMode) != EFI_SUCCESS) {
NewBootMode = BOOT_IN_RECOVERY_MODE;
- DEBUG ((EFI_D_ERROR, "RECOVERY from corrupt FV\n"));
+ DEBUG ((DEBUG_ERROR, "RECOVERY from corrupt FV\n"));
}
if (NewBootMode == BOOT_IN_RECOVERY_MODE) {
@@ -184,7 +184,7 @@ UpdateBootMode (
if (Status == EFI_SUCCESS) {
if (Capsule->CheckCapsuleUpdate ((EFI_PEI_SERVICES **)PeiServices) == EFI_SUCCESS) {
NewBootMode = BOOT_ON_FLASH_UPDATE;
- DEBUG ((EFI_D_ERROR, "Setting BootMode to %x\n", BOOT_ON_FLASH_UPDATE));
+ DEBUG ((DEBUG_ERROR, "Setting BootMode to %x\n", BOOT_ON_FLASH_UPDATE));
(*PeiServices)->InstallPpi (PeiServices, &CapsulePpi);
}
@@ -233,7 +233,7 @@ UpdateBootMode (
strBootMode = L"Unknown boot mode";
} // switch (BootMode)
- DEBUG ((EFI_D_INFO, "Setting BootMode to %s\n", strBootMode));
+ DEBUG ((DEBUG_INFO, "Setting BootMode to %s\n", strBootMode));
Status = (*PeiServices)->SetBootMode (
PeiServices,
NewBootMode
diff --git a/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryCallback.c b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryCallback.c
index 9ab78b7135..f10ff6a027 100644
--- a/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryCallback.c
+++ b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryCallback.c
@@ -93,12 +93,12 @@ S3PostScriptTableCallback (
);
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "PeiServicesLocatePpi gPeiSmmControlPpiGuid: %r \n", Status));
+ DEBUG ((DEBUG_ERROR, "PeiServicesLocatePpi gPeiSmmControlPpiGuid: %r \n", Status));
return Status;
}
SmiCommand = PcdGet8 (PcdFchOemBeforePciRestoreSwSmi);
- DEBUG ((EFI_D_INFO, "Trigger SW SMI PcdFchOemBeforePciRestoreSwSmi: 0x%X\n", SmiCommand));
+ DEBUG ((DEBUG_INFO, "Trigger SW SMI PcdFchOemBeforePciRestoreSwSmi: 0x%X\n", SmiCommand));
SmiCommandSize = sizeof (SmiCommand);
Status = SmmControl->Trigger (
(EFI_PEI_SERVICES **)GetPeiServicesTablePointer (),
@@ -146,12 +146,12 @@ S3EndOfPeiSignalCallback (
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "PeiServicesLocatePpi gPeiSmmControlPpiGuid: %r \n", Status));
+ DEBUG ((DEBUG_ERROR, "PeiServicesLocatePpi gPeiSmmControlPpiGuid: %r \n", Status));
return Status;
}
SmiCommand = PcdGet8 (AcpiRestoreSwSmi);
- DEBUG ((EFI_D_INFO, "Trigger SW SMI AcpiRestoreSwSmi: 0x%X\n", SmiCommand));
+ DEBUG ((DEBUG_INFO, "Trigger SW SMI AcpiRestoreSwSmi: 0x%X\n", SmiCommand));
SmiCommandSize = sizeof (SmiCommand);
Status = SmmControl->Trigger (
(EFI_PEI_SERVICES **)GetPeiServicesTablePointer (),
@@ -164,7 +164,7 @@ S3EndOfPeiSignalCallback (
ASSERT_EFI_ERROR (Status);
SmiCommand = PcdGet8 (PcdFchOemAfterPciRestoreSwSmi);
- DEBUG ((EFI_D_INFO, "Trigger SW SMI PcdFchOemAfterPciRestoreSwSmi: 0x%X\n", SmiCommand));
+ DEBUG ((DEBUG_INFO, "Trigger SW SMI PcdFchOemAfterPciRestoreSwSmi: 0x%X\n", SmiCommand));
SmiCommandSize = sizeof (SmiCommand);
Status = SmmControl->Trigger (
(EFI_PEI_SERVICES **)GetPeiServicesTablePointer (),
@@ -253,7 +253,7 @@ MemoryDiscoveredPpiNotifyCallback (
AsmCpuid (0x80000001, &RegEax, NULL, NULL, NULL);
if (((RegEax >> 20) & 0xFF) == 0x8) {
// For F17: Reserved memory from BootFvBase - (BootFvBase+BootFvSize-1)
- DEBUG ((EFI_D_INFO, "Family 17: Reserved memory for BFV\n"));
+ DEBUG ((DEBUG_INFO, "Family 17: Reserved memory for BFV\n"));
BuildMemoryAllocationHob (
PcdGet32 (PcdMemoryFvRecoveryBase),
PcdGet32 (PcdFlashFvRecoverySize),
@@ -261,7 +261,7 @@ MemoryDiscoveredPpiNotifyCallback (
);
}
- DEBUG ((EFI_D_INFO, "PcdMemoryFvRecoveryBase: %x,PcdFlashFvMainBase: %x\n", PcdGet32 (PcdMemoryFvRecoveryBase), PcdGet32 (PcdFlashFvMainBase)));
+ DEBUG ((DEBUG_INFO, "PcdMemoryFvRecoveryBase: %x,PcdFlashFvMainBase: %x\n", PcdGet32 (PcdMemoryFvRecoveryBase), PcdGet32 (PcdFlashFvMainBase)));
if ((BootMode != BOOT_ON_S3_RESUME) && (BootMode != BOOT_IN_RECOVERY_MODE)) {
#ifndef FV_RECOVERY_MAIN_COMBINE_SUPPORT
@@ -294,7 +294,7 @@ MemoryDiscoveredPpiNotifyCallback (
FixedPcdGet32 (PcdFlashAreaBaseAddress),
FixedPcdGet32 (PcdFlashAreaSize)
);
- DEBUG ((EFI_D_INFO, "FLASH_BASE_ADDRESS : 0x%x\n", FixedPcdGet32 (PcdFlashAreaBaseAddress)));
+ DEBUG ((DEBUG_INFO, "FLASH_BASE_ADDRESS : 0x%x\n", FixedPcdGet32 (PcdFlashAreaBaseAddress)));
//
// Create a CPU hand-off information
diff --git a/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryInstall.c b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryInstall.c
index f58645f2cd..7c1d0924b5 100644
--- a/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryInstall.c
+++ b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryInstall.c
@@ -280,15 +280,15 @@ InstallEfiMemory (
);
ASSERT_EFI_ERROR (Status);
- DEBUG ((EFI_D_INFO, "NumRanges: %d\n", NumRanges));
+ DEBUG ((DEBUG_INFO, "NumRanges: %d\n", NumRanges));
- DEBUG ((EFI_D_INFO, "GetMemoryMap:\n"));
+ DEBUG ((DEBUG_INFO, "GetMemoryMap:\n"));
for (Index = 0; Index < NumRanges; Index++) {
- DEBUG ((EFI_D_INFO, "Index: %d ", Index));
- DEBUG ((EFI_D_INFO, "RangeLength: 0x%016lX\t", MemoryMap[Index].RangeLength));
- DEBUG ((EFI_D_INFO, "PhysicalAddress: 0x%016lX\t", MemoryMap[Index].PhysicalAddress));
- DEBUG ((EFI_D_INFO, "CpuAddress: 0x%016lX\t", MemoryMap[Index].CpuAddress));
- DEBUG ((EFI_D_INFO, "Type: %d\n", MemoryMap[Index].Type));
+ DEBUG ((DEBUG_INFO, "Index: %d ", Index));
+ DEBUG ((DEBUG_INFO, "RangeLength: 0x%016lX\t", MemoryMap[Index].RangeLength));
+ DEBUG ((DEBUG_INFO, "PhysicalAddress: 0x%016lX\t", MemoryMap[Index].PhysicalAddress));
+ DEBUG ((DEBUG_INFO, "CpuAddress: 0x%016lX\t", MemoryMap[Index].CpuAddress));
+ DEBUG ((DEBUG_INFO, "Type: %d\n", MemoryMap[Index].Type));
}
//
@@ -313,9 +313,9 @@ InstallEfiMemory (
PeiMemoryIndex = 0;
for (Index = 0; Index < NumRanges; Index++) {
- DEBUG ((EFI_D_INFO, "Found 0x%lx bytes at ", MemoryMap[Index].RangeLength));
- DEBUG ((EFI_D_INFO, "0x%lx.\t", MemoryMap[Index].PhysicalAddress));
- DEBUG ((EFI_D_INFO, "Type: %d.\n", MemoryMap[Index].Type));
+ DEBUG ((DEBUG_INFO, "Found 0x%lx bytes at ", MemoryMap[Index].RangeLength));
+ DEBUG ((DEBUG_INFO, "0x%lx.\t", MemoryMap[Index].PhysicalAddress));
+ DEBUG ((DEBUG_INFO, "Type: %d.\n", MemoryMap[Index].Type));
if ((MemoryMap[Index].Type == DualChannelDdrMainMemory) &&
(MemoryMap[Index].PhysicalAddress + MemoryMap[Index].RangeLength < MAX_ADDRESS) &&
@@ -367,7 +367,7 @@ InstallEfiMemory (
if (Status == EFI_SUCCESS) {
CapsuleBuffer = LargeMemRangeBuf;
CapsuleBufferLength = LargeMemRangeBufLen;
- DEBUG ((EFI_D_INFO, "CapsuleBuffer: %x, CapsuleBufferLength: %x\n", CapsuleBuffer, CapsuleBufferLength));
+ DEBUG ((DEBUG_INFO, "CapsuleBuffer: %x, CapsuleBufferLength: %x\n", CapsuleBuffer, CapsuleBufferLength));
//
// Call the Capsule PPI Coalesce function to coalesce the capsule data.
@@ -568,7 +568,7 @@ InstallEfiMemory (
//
CopyMem (&DescriptorAcpiVariable, &SmramHobDescriptorBlock->Descriptor[SmramRanges-1], sizeof (EFI_SMRAM_DESCRIPTOR));
DescriptorAcpiVariable.CpuStart += RESERVED_CPU_S3_SAVE_OFFSET;
- DEBUG ((EFI_D_INFO, "gEfiAcpiVariableGuid CpuStart: 0x%X\n", (UINTN)DescriptorAcpiVariable.CpuStart));
+ DEBUG ((DEBUG_INFO, "gEfiAcpiVariableGuid CpuStart: 0x%X\n", (UINTN)DescriptorAcpiVariable.CpuStart));
BuildGuidDataHob (
&gEfiAcpiVariableGuid,
&DescriptorAcpiVariable,
@@ -630,19 +630,19 @@ InstallS3Memory (
&NumRanges
);
ASSERT_EFI_ERROR (Status);
- DEBUG ((EFI_D_INFO, "NumRanges = 0x%x\n", NumRanges));
+ DEBUG ((DEBUG_INFO, "NumRanges = 0x%x\n", NumRanges));
//
// Install physical memory descriptor hobs for each memory range.
//
SmramRanges = 0;
- DEBUG ((EFI_D_INFO, "GetMemoryMap:\n"));
+ DEBUG ((DEBUG_INFO, "GetMemoryMap:\n"));
for (Index = 0; Index < NumRanges; Index++) {
- DEBUG ((EFI_D_INFO, "Index: %d ", Index));
- DEBUG ((EFI_D_INFO, "RangeLength: 0x%016lX\t", MemoryMap[Index].RangeLength));
- DEBUG ((EFI_D_INFO, "PhysicalAddress: 0x%016lX\t", MemoryMap[Index].PhysicalAddress));
- DEBUG ((EFI_D_INFO, "CpuAddress: 0x%016lX\t", MemoryMap[Index].CpuAddress));
- DEBUG ((EFI_D_INFO, "Type: %d\n", MemoryMap[Index].Type));
+ DEBUG ((DEBUG_INFO, "Index: %d ", Index));
+ DEBUG ((DEBUG_INFO, "RangeLength: 0x%016lX\t", MemoryMap[Index].RangeLength));
+ DEBUG ((DEBUG_INFO, "PhysicalAddress: 0x%016lX\t", MemoryMap[Index].PhysicalAddress));
+ DEBUG ((DEBUG_INFO, "CpuAddress: 0x%016lX\t", MemoryMap[Index].CpuAddress));
+ DEBUG ((DEBUG_INFO, "Type: %d\n", MemoryMap[Index].Type));
if ((MemoryMap[Index].PhysicalAddress > 0x100000) &&
((MemoryMap[Index].Type == DualChannelDdrSmramCacheable) ||
(MemoryMap[Index].Type == DualChannelDdrSmramNonCacheable)))
@@ -652,7 +652,7 @@ InstallS3Memory (
}
ASSERT (SmramRanges > 0);
- DEBUG ((EFI_D_INFO, "SmramRanges = 0x%x\n", SmramRanges));
+ DEBUG ((DEBUG_INFO, "SmramRanges = 0x%x\n", SmramRanges));
//
// Allocate one extra EFI_SMRAM_DESCRIPTOR to describe a page of SMRAM memory that contains a pointer
@@ -663,22 +663,22 @@ InstallS3Memory (
BufferSize += ((SmramRanges) * sizeof (EFI_SMRAM_DESCRIPTOR));
}
- DEBUG ((EFI_D_INFO, "BufferSize = 0x%x\n", BufferSize));
+ DEBUG ((DEBUG_INFO, "BufferSize = 0x%x\n", BufferSize));
Hob.Raw = BuildGuidHob (
&gEfiSmmPeiSmramMemoryReserveGuid,
BufferSize
);
ASSERT (Hob.Raw);
- DEBUG ((EFI_D_INFO, "gEfiSmmPeiSmramMemoryReserveGuid/SmramHobDescriptorBlock: 0x%X \n", (UINTN)Hob.Raw));
+ DEBUG ((DEBUG_INFO, "gEfiSmmPeiSmramMemoryReserveGuid/SmramHobDescriptorBlock: 0x%X \n", (UINTN)Hob.Raw));
SmramHobDescriptorBlock = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)(Hob.Raw);
SmramHobDescriptorBlock->NumberOfSmmReservedRegions = SmramRanges + 1;
SmramIndex = 0;
for (Index = 0; Index < NumRanges; Index++) {
- DEBUG ((EFI_D_INFO, "Index: 0x%X \t", Index));
- DEBUG ((EFI_D_INFO, "SmramIndex: 0x%X \n", SmramIndex));
+ DEBUG ((DEBUG_INFO, "Index: 0x%X \t", Index));
+ DEBUG ((DEBUG_INFO, "SmramIndex: 0x%X \n", SmramIndex));
if ((MemoryMap[Index].PhysicalAddress > 0x100000) &&
((MemoryMap[Index].Type == DualChannelDdrSmramCacheable) ||
(MemoryMap[Index].Type == DualChannelDdrSmramNonCacheable))
@@ -696,11 +696,11 @@ InstallS3Memory (
SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState = EFI_SMRAM_CLOSED;
}
- DEBUG ((EFI_D_INFO, "SmramIndex: 0x%X \n", SmramIndex));
- DEBUG ((EFI_D_INFO, "PhysicalStart: 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalStart));
- DEBUG ((EFI_D_INFO, "CpuStart : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].CpuStart));
- DEBUG ((EFI_D_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize));
- DEBUG ((EFI_D_INFO, "RegionState : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState));
+ DEBUG ((DEBUG_INFO, "SmramIndex: 0x%X \n", SmramIndex));
+ DEBUG ((DEBUG_INFO, "PhysicalStart: 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalStart));
+ DEBUG ((DEBUG_INFO, "CpuStart : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].CpuStart));
+ DEBUG ((DEBUG_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize));
+ DEBUG ((DEBUG_INFO, "RegionState : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState));
if ( SmramIndex == SmramRanges - 1) {
//
// one extra EFI_SMRAM_DESCRIPTOR for a page of SMRAM memory
@@ -712,14 +712,14 @@ InstallS3Memory (
SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize = MemoryMap[Index].RangeLength - EFI_PAGE_SIZE;
SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState = SmramHobDescriptorBlock->Descriptor[SmramIndex-1].RegionState;
SmramHobDescriptorBlock->Descriptor[SmramIndex-1].RegionState |= EFI_ALLOCATED;
- DEBUG ((EFI_D_INFO, "SmramIndex: 0x%X \n", SmramIndex));
- DEBUG ((EFI_D_INFO, "PhysicalStart: 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalStart));
- DEBUG ((EFI_D_INFO, "CpuStart : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].CpuStart));
- DEBUG ((EFI_D_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize));
- DEBUG ((EFI_D_INFO, "RegionState : 0x%X\n\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState));
-
- DEBUG ((EFI_D_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex-1].PhysicalSize));
- DEBUG ((EFI_D_INFO, "RegionState : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex-1].RegionState));
+ DEBUG ((DEBUG_INFO, "SmramIndex: 0x%X \n", SmramIndex));
+ DEBUG ((DEBUG_INFO, "PhysicalStart: 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalStart));
+ DEBUG ((DEBUG_INFO, "CpuStart : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].CpuStart));
+ DEBUG ((DEBUG_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize));
+ DEBUG ((DEBUG_INFO, "RegionState : 0x%X\n\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState));
+
+ DEBUG ((DEBUG_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex-1].PhysicalSize));
+ DEBUG ((DEBUG_INFO, "RegionState : 0x%X\n", (UINTN)SmramHobDescriptorBlock->Descriptor[SmramIndex-1].RegionState));
}
SmramIndex++;
@@ -731,7 +731,7 @@ InstallS3Memory (
//
CopyMem (&DescriptorAcpiVariable, &SmramHobDescriptorBlock->Descriptor[SmramRanges-1], sizeof (EFI_SMRAM_DESCRIPTOR));
DescriptorAcpiVariable.CpuStart += RESERVED_CPU_S3_SAVE_OFFSET;
- DEBUG ((EFI_D_INFO, "gEfiAcpiVariableGuid CpuStart: 0x%X\n", (UINTN)DescriptorAcpiVariable.CpuStart));
+ DEBUG ((DEBUG_INFO, "gEfiAcpiVariableGuid CpuStart: 0x%X\n", (UINTN)DescriptorAcpiVariable.CpuStart));
BuildGuidDataHob (
&gEfiAcpiVariableGuid,
&DescriptorAcpiVariable,
@@ -743,20 +743,20 @@ InstallS3Memory (
// install it as PEI Memory.
//
- DEBUG ((EFI_D_INFO, "TSEG Base = 0x%08x\n", SmramHobDescriptorBlock->Descriptor[SmramRanges].PhysicalStart));
- DEBUG ((EFI_D_INFO, "SmramRanges = 0x%x\n", SmramRanges));
+ DEBUG ((DEBUG_INFO, "TSEG Base = 0x%08x\n", SmramHobDescriptorBlock->Descriptor[SmramRanges].PhysicalStart));
+ DEBUG ((DEBUG_INFO, "SmramRanges = 0x%x\n", SmramRanges));
S3MemoryRangeData = (RESERVED_ACPI_S3_RANGE *)(UINTN)
(SmramHobDescriptorBlock->Descriptor[SmramRanges].PhysicalStart + RESERVED_ACPI_S3_RANGE_OFFSET);
- DEBUG ((EFI_D_INFO, "S3MemoryRangeData = 0x%08x\n", (UINTN)S3MemoryRangeData));
+ DEBUG ((DEBUG_INFO, "S3MemoryRangeData = 0x%08x\n", (UINTN)S3MemoryRangeData));
- DEBUG ((EFI_D_INFO, "S3MemoryRangeData->AcpiReservedMemoryBase = 0x%X\n", (UINTN)S3MemoryRangeData->AcpiReservedMemoryBase));
- DEBUG ((EFI_D_INFO, "S3MemoryRangeData->AcpiReservedMemorySize = 0x%X\n", (UINTN)S3MemoryRangeData->AcpiReservedMemorySize));
- DEBUG ((EFI_D_INFO, "S3MemoryRangeData->SystemMemoryLength = 0x%X\n", (UINTN)S3MemoryRangeData->SystemMemoryLength));
+ DEBUG ((DEBUG_INFO, "S3MemoryRangeData->AcpiReservedMemoryBase = 0x%X\n", (UINTN)S3MemoryRangeData->AcpiReservedMemoryBase));
+ DEBUG ((DEBUG_INFO, "S3MemoryRangeData->AcpiReservedMemorySize = 0x%X\n", (UINTN)S3MemoryRangeData->AcpiReservedMemorySize));
+ DEBUG ((DEBUG_INFO, "S3MemoryRangeData->SystemMemoryLength = 0x%X\n", (UINTN)S3MemoryRangeData->SystemMemoryLength));
S3MemoryBase = (UINTN)(S3MemoryRangeData->AcpiReservedMemoryBase);
- DEBUG ((EFI_D_INFO, "S3MemoryBase = 0x%08x\n", S3MemoryBase));
+ DEBUG ((DEBUG_INFO, "S3MemoryBase = 0x%08x\n", S3MemoryBase));
S3MemorySize = (UINTN)(S3MemoryRangeData->AcpiReservedMemorySize);
- DEBUG ((EFI_D_INFO, "S3MemorySize = 0x%08x\n", S3MemorySize));
+ DEBUG ((DEBUG_INFO, "S3MemorySize = 0x%08x\n", S3MemorySize));
Status = PeiServicesInstallPeiMemory (S3MemoryBase, S3MemorySize);
ASSERT_EFI_ERROR (Status);
@@ -781,7 +781,7 @@ InstallS3Memory (
S3MemoryRangeData->SystemMemoryLength - 0x100000
);
- DEBUG ((EFI_D_INFO, "MemoryBegin: 0x%lX, MemoryLength: 0x%lX\n", 0x100000, S3MemoryRangeData->SystemMemoryLength - 0x100000));
+ DEBUG ((DEBUG_INFO, "MemoryBegin: 0x%lX, MemoryLength: 0x%lX\n", 0x100000, S3MemoryRangeData->SystemMemoryLength - 0x100000));
for (Index = 0; Index < NumRanges; Index++) {
if ((MemoryMap[Index].Type == DualChannelDdrMainMemory) &&
@@ -800,10 +800,10 @@ InstallS3Memory (
MemoryMap[Index].PhysicalAddress,
MemoryMap[Index].RangeLength
);
- DEBUG ((EFI_D_INFO, "MemoryBegin: 0x%lX, MemoryLength: 0x%lX\n", MemoryMap[Index].PhysicalAddress, MemoryMap[Index].RangeLength));
+ DEBUG ((DEBUG_INFO, "MemoryBegin: 0x%lX, MemoryLength: 0x%lX\n", MemoryMap[Index].PhysicalAddress, MemoryMap[Index].RangeLength));
- DEBUG ((EFI_D_INFO, "Build resource HOB for Legacy Region on S3 patch :"));
- DEBUG ((EFI_D_INFO, " Memory Base:0x%lX Length:0x%lX\n", MemoryMap[Index].PhysicalAddress, MemoryMap[Index].RangeLength));
+ DEBUG ((DEBUG_INFO, "Build resource HOB for Legacy Region on S3 patch :"));
+ DEBUG ((DEBUG_INFO, " Memory Base:0x%lX Length:0x%lX\n", MemoryMap[Index].PhysicalAddress, MemoryMap[Index].RangeLength));
}
}
@@ -890,7 +890,7 @@ GetPlatformMemorySize (
*MemorySize = PEI_MIN_MEMORY_SIZE;
for (Index = 0; Index < DataSize / sizeof (EFI_MEMORY_TYPE_INFORMATION); Index++) {
- DEBUG ((EFI_D_INFO, "Index %d, Page: %d\n", Index, MemoryData[Index].NumberOfPages));
+ DEBUG ((DEBUG_INFO, "Index %d, Page: %d\n", Index, MemoryData[Index].NumberOfPages));
*MemorySize += MemoryData[Index].NumberOfPages * EFI_PAGE_SIZE;
}
@@ -904,7 +904,7 @@ GetPlatformMemorySize (
);
}
- DEBUG ((EFI_D_INFO, "GetPlatformMemorySize, MemorySize: 0x%lX\n", *MemorySize));
+ DEBUG ((DEBUG_INFO, "GetPlatformMemorySize, MemorySize: 0x%lX\n", *MemorySize));
return EFI_SUCCESS;
}
@@ -937,7 +937,7 @@ MemoryInfoHobPpiNotifyCallback (
ASSERT_EFI_ERROR (Status);
if (BootMode == BOOT_ON_S3_RESUME) {
- DEBUG ((EFI_D_INFO, "Following BOOT_ON_S3_RESUME boot path.\n"));
+ DEBUG ((DEBUG_INFO, "Following BOOT_ON_S3_RESUME boot path.\n"));
Status = InstallS3Memory (PeiServices, BootMode);
ASSERT_EFI_ERROR (Status);
diff --git a/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryPeim.c b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryPeim.c
index 5f6aefa9b1..9461050604 100644
--- a/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryPeim.c
+++ b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryPeim.c
@@ -178,7 +178,7 @@ SetPeiCacheMode (
break;
}
- DEBUG ((EFI_D_INFO, "Base=%lx, Mask=%lx\n", MtrrSetting.Variables.Mtrr[Index].Base, MtrrSetting.Variables.Mtrr[Index].Mask));
+ DEBUG ((DEBUG_INFO, "Base=%lx, Mask=%lx\n", MtrrSetting.Variables.Mtrr[Index].Base, MtrrSetting.Variables.Mtrr[Index].Mask));
}
//
@@ -291,7 +291,7 @@ GetAvailableMemoryRanges (
AMD_MEMORY_RANGE_DESCRIPTOR *Range;
UINT32 Index;
- DEBUG ((EFI_D_INFO, "GetAvailableMemoryRanges++\n"));
+ DEBUG ((DEBUG_INFO, "GetAvailableMemoryRanges++\n"));
if ((*NumRanges) < MAX_RANGES) {
return EFI_BUFFER_TOO_SMALL;
}
@@ -312,7 +312,7 @@ GetAvailableMemoryRanges (
MemoryMap[*NumRanges].RangeLength = Range->Size;
MemoryMap[*NumRanges].Type = DualChannelDdrMainMemory;
(*NumRanges)++;
- DEBUG ((EFI_D_INFO, " Base:0x%016lX, Size: 0x%016lX\n", Range->Base, Range->Size));
+ DEBUG ((DEBUG_INFO, " Base:0x%016lX, Size: 0x%016lX\n", Range->Base, Range->Size));
}
}
}
@@ -344,7 +344,7 @@ GetReservedMemoryRanges (
AMD_MEMORY_RANGE_DESCRIPTOR *Range;
UINT32 Index;
- DEBUG ((EFI_D_INFO, "GetReservedMemoryRanges\n"));
+ DEBUG ((DEBUG_INFO, "GetReservedMemoryRanges\n"));
if ((*NumRanges) < MAX_RANGES) {
return EFI_BUFFER_TOO_SMALL;
}
@@ -366,7 +366,7 @@ GetReservedMemoryRanges (
MemoryMap[*NumRanges].RangeLength = Range->Size;
MemoryMap[*NumRanges].Type = DualChannelDdrReservedMemory;
(*NumRanges)++;
- DEBUG ((EFI_D_INFO, " GetReservedMemoryRanges Base:0x%016lX, Size: 0x%016lX\n", Range->Base, Range->Size));
+ DEBUG ((DEBUG_INFO, " GetReservedMemoryRanges Base:0x%016lX, Size: 0x%016lX\n", Range->Base, Range->Size));
}
if (Range->Attribute == AMD_MEMORY_ATTRIBUTE_UMA) {
@@ -375,7 +375,7 @@ GetReservedMemoryRanges (
MemoryMap[*NumRanges].RangeLength = Range->Size;
MemoryMap[*NumRanges].Type = DualChannelDdrReservedMemory;
(*NumRanges)++;
- DEBUG ((EFI_D_INFO, " GetReservedMemoryRanges Base:0x%016lX, Size: 0x%016lX\n", Range->Base, Range->Size));
+ DEBUG ((DEBUG_INFO, " GetReservedMemoryRanges Base:0x%016lX, Size: 0x%016lX\n", Range->Base, Range->Size));
}
}
}
diff --git a/Platform/AMD/VanGoghBoard/Universal/PlatformSmbiosDxe/SmbiosTable.c b/Platform/AMD/VanGoghBoard/Universal/PlatformSmbiosDxe/SmbiosTable.c
index 29b16380a1..b88ef38b85 100644
--- a/Platform/AMD/VanGoghBoard/Universal/PlatformSmbiosDxe/SmbiosTable.c
+++ b/Platform/AMD/VanGoghBoard/Universal/PlatformSmbiosDxe/SmbiosTable.c
@@ -166,7 +166,7 @@ SMBIOS_TABLE_TYPE3 gSmbiosType3Template = {
ChassisStateSafe, // PowerSupplyState;
ChassisStateSafe, // ThermalState;
ChassisSecurityStatusNone, // SecurityStatus;
- { 0, 0, 0, 0 }, // OemDefined[4];
+ { 0, 0, 0, 0}, // OemDefined[4];
0, // Height;
0, // NumberofPowerCords;
0, // ContainedElementCount;
@@ -362,7 +362,7 @@ SMBIOS_TABLE_TYPE23 gSmbiosType23Template = {
SMBIOS_TABLE_TYPE32 gSmbiosType32Template = {
{ EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION, sizeof (SMBIOS_TABLE_TYPE32), 0 },
- { 0, 0, 0, 0, 0, 0 }, // Reserved[6];
+ { 0, 0, 0, 0, 0, 0}, // Reserved[6];
BootInformationStatusNoError // BootStatus
};
diff --git a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FwBlockService.c b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FwBlockService.c
index 5565b69de5..dd7e39affa 100644
--- a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FwBlockService.c
+++ b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FwBlockService.c
@@ -348,7 +348,6 @@ FvbReadBlock (
IN BOOLEAN Virtual
)
-
{
EFI_FVB_ATTRIBUTES_2 Attributes;
UINTN LbaAddress;
@@ -730,7 +729,6 @@ FvbProtocolGetBlockSize (
OUT UINTN *NumOfBlocks
)
-
{
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
@@ -1211,24 +1209,25 @@ FlashFdWrite (
)
{
EFI_STATUS Status;
+
Status = EFI_SUCCESS;
//
// TODO: Suggested that this code be "critical section"
//
WriteAddress -= (PcdGet32 (PcdFlashAreaBaseAddress));
- Status = mFvbModuleGlobal->SpiProtocol->Execute (
- mFvbModuleGlobal->SpiProtocol,
- SPI_OPCODE_WRITE_INDEX, // OpcodeIndex
- 0, // PrefixOpcodeIndex
- TRUE, // DataCycle
- TRUE, // Atomic
- TRUE, // ShiftOut
- WriteAddress, // Address
- (UINT32)(*NumBytes), // Data Number
- Buffer,
- EnumSpiRegionBios
- );
+ Status = mFvbModuleGlobal->SpiProtocol->Execute (
+ mFvbModuleGlobal->SpiProtocol,
+ SPI_OPCODE_WRITE_INDEX, // OpcodeIndex
+ 0, // PrefixOpcodeIndex
+ TRUE, // DataCycle
+ TRUE, // Atomic
+ TRUE, // ShiftOut
+ WriteAddress, // Address
+ (UINT32)(*NumBytes), // Data Number
+ Buffer,
+ EnumSpiRegionBios
+ );
AsmWbinvd ();
diff --git a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Library/SmbiosLib.h b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Library/SmbiosLib.h
index 5880eac36e..b3be1a73bc 100644
--- a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Library/SmbiosLib.h
+++ b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Library/SmbiosLib.h
@@ -6,6 +6,7 @@
**/
// This file includes code originally published under the following license.
+
/** @file
Provides library functions for common SMBIOS operations. Only available to DXE
and UEFI module types.
diff --git a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/AcpiSmm/AcpiSmmPlatform.c b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/AcpiSmm/AcpiSmmPlatform.c
index 383bcec471..2f2781aa0b 100644
--- a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/AcpiSmm/AcpiSmmPlatform.c
+++ b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/AcpiSmm/AcpiSmmPlatform.c
@@ -153,7 +153,6 @@ InitAcpiSmmPlatform (
IN EFI_SYSTEM_TABLE *SystemTable
)
-
{
EFI_STATUS Status;
EFI_GLOBAL_NVS_AREA_PROTOCOL *AcpiNvsProtocol = NULL;
diff --git a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/SmmAccessPei/SmmAccessPei.c b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/SmmAccessPei/SmmAccessPei.c
index 200aebf59c..01a8d04017 100644
--- a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/SmmAccessPei/SmmAccessPei.c
+++ b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/SmmAccessPei/SmmAccessPei.c
@@ -142,7 +142,6 @@ LockSmm (
AsmWriteMsr64 (HWCR, Data64);
}
-
/**
This routine accepts a request to "open" a region of SMRAM. The
region could be legacy ABSEG, HSEG, or TSEG near top of physical memory.
@@ -301,7 +300,6 @@ Lock (
return EFI_SUCCESS;
}
-
/**
This routine services a user request to discover the SMRAM
capabilities of this platform. This will report the possible
--
2.31.1
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prev parent reply other threads:[~2024-01-19 14:58 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-18 6:50 [edk2-devel] [PATCH 00/33] Introduce AMD Vangogh platform reference code duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 01/33] AMD/AmdPlatformPkg: Check in AMD S3 logo duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 02/33] AMD/VanGoghBoard: Check in ACPI tables duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 03/33] AMD/VanGoghBoard: Check in Capsule update duke.zhai via groups.io
2024-01-23 4:42 ` Chang, Abner via groups.io
2024-01-25 8:25 ` Zhai, MingXin (Duke) via groups.io
2024-01-25 11:45 ` Chang, Abner via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 04/33] AMD/VanGoghBoard: Check in AgesaPublic pkg duke.zhai via groups.io
2024-01-23 4:44 ` Chang, Abner via groups.io
2024-01-25 8:17 ` Xing, Eric via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 05/33] AMD/VanGoghBoard: Check in PlatformSecLib duke.zhai via groups.io
2024-01-23 4:46 ` Chang, Abner via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 06/33] AMD/VanGoghBoard: Check in AmdIdsExtLib duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 07/33] AMD/VanGoghBoard: Check in PciPlatform duke.zhai via groups.io
2024-01-23 4:50 ` Chang, Abner via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 08/33] AMD/VanGoghBoard: Check in UDKFlashUpdate duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 09/33] AMD/VanGoghBoard: Check in Flash_AB duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 10/33] AMD/VanGoghBoard: Check in FlashUpdate duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 11/33] AMD/VanGoghBoard: Check in FvbServices duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 12/33] AMD/VanGoghBoard: Check in AMD BaseSerialPortLib duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 13/33] AMD/VanGoghBoard: Check in PlatformFlashAccessLib duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 14/33] AMD/VanGoghBoard: Check in SmbiosLib duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 15/33] AMD/VanGoghBoard: Check in SpiFlashDeviceLib duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 16/33] AMD/VanGoghBoard: Check in BaseTscTimerLib duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 17/33] AMD/VanGoghBoard: Check in Smm access module duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 18/33] AMD/VanGoghBoard: Check in PciHostBridge module duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 19/33] AMD/VanGoghBoard: Check in PcatRealTimeClockRuntimeDxe module duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 20/33] AMD/VanGoghBoard: Check in FTPM module duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 21/33] AMD/VanGoghBoard: Check in SignedCapsule duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 22/33] AMD/VanGoghBoard: Check in Vtf0 duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 23/33] AMD/VanGoghBoard: Check in AcpiPlatform duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 24/33] AMD/VanGoghBoard: Check in FchSpi module duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 25/33] AMD/VanGoghBoard: Check in PlatformInitPei module duke.zhai via groups.io
2024-01-23 6:35 ` Chang, Abner via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 26/33] AMD/VanGoghBoard: Check in Smbios platform dxe drivers duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 27/33] AMD/VanGoghBoard: Check in Fsp2WrapperPkg duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 28/33] AMD/VanGoghBoard: Check in SmmCpuFeaturesLibCommon module duke.zhai via groups.io
2024-01-23 5:14 ` Chang, Abner via groups.io
2024-01-23 10:20 ` Xing, Eric via groups.io
2024-01-23 10:44 ` Chang, Abner via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 29/33] AMD/VanGoghBoard: Check in SmramSaveState module duke.zhai via groups.io
2024-01-20 14:37 ` Abdul Lateef Attar via groups.io
2024-01-23 5:15 ` Chang, Abner via groups.io
2024-01-23 10:27 ` Xing, Eric via groups.io
2024-01-23 10:44 ` Chang, Abner via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 30/33] AMD/VanGoghBoard: Check in EDK2 override files duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 31/33] AMD/VanGoghBoard: Check in AMD SmmControlPei module duke.zhai via groups.io
2024-01-18 6:50 ` [edk2-devel] [PATCH 32/33] AMD/VanGoghBoard: Check in Chachani board project files and build script duke.zhai via groups.io
2024-01-18 6:50 ` duke.zhai via groups.io [this message]
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