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Date: Thu, 18 Jan 2024 14:50:46 +0800 Message-ID: <20240118065046.961-34-duke.zhai@amd.com> In-Reply-To: <20240118065046.961-1-duke.zhai@amd.com> References: <20240118065046.961-1-duke.zhai@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001CA:EE_|CH2PR12MB4200:EE_ X-MS-Office365-Filtering-Correlation-Id: f3790579-c729-45f9-04f1-08dc17f22c6f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Message-Info: eB3ozh4PmwUfknBggbXLhG5CWXQNkkMZhHHItzGFx72z5J5yCxRD7hsIi/b+iye5RqbXmCjZMvHSyxrjVQWYpVuF+ctulblvU1zJjvENoJfz3EcpKTvcxXgkjEn9qTdvokNvWu9saQSeyM4GUjdOIEuuSK1WkdVEBwhQS004uWIIVC6D0Q/Tj1JCApH21JTlEjKiojTAXI9zCTrVCqAk8Y0aKgQSsiqCqHrFd8jfJ9aGzg3vmLstbQGHEDovjcUhSauoc3myS7tSB35Htvubphm5VaWD2DgRtzYXbYdPJkMRMCU940j3GTbFrcOhWsfQP16Sbn+aGlqM4dnHwc1Anxn5nHFgDhGnY4dt856cOcG5XOWELSdwvS6lvtDOUUVrdnsLRwHmiEaukl5s+RAEX/PuJZh+lG4vUf6QLl3q2db/mjVL7CjF3lMECs44ZMlKLQhoKNCPeO++Ee+VZDNFc6h+2b1a+oTfpXB8O2Ad3BWMQq3VqCej2sGnbu++cNe00E7oRCHycfOOA0Oqg/lihJqYsQuVuB4kkwkCkKNMgVtsp3wdSDtBg9xA9MuA+dtxLTzXnGRtN9qhspK1K0PiEVd34OKKsh339PuN9nYc1QFSJIjcaLK3PV4uZbtAysG2ehIOt+XoQPyMrQCqpxBiupu9pgviMyHvbpxDw2guI0K9aMc429M+musIK4ugrXwABjdPjrWjkrG4XVZlkKw1CSWD4rhG/GOaI+3CtIUZIOGZdQhhqMA9SCc/o586iGWh9Em3dDeiTUxGq/ps7kW2iKUEbsG/N0RdzbS9PnMwijh5MjpsUUVc6KRv0U1jAahwifF8rtay3EV/Hib/sQAaRQ== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jan 2024 06:53:27.3671 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f3790579-c729-45f9-04f1-08dc17f22c6f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001CA.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4200 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,duke.zhai@amd.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: KCo5qxvK9oXlStyJSThbA0Q3x7686176AA= Content-Transfer-Encoding: quoted-printable Content-Type: text/plain X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=tSxIm6KF; arc=reject ("signature check failed: fail, {[1] = sig:microsoft.com:reject}"); dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io From: Duke Zhai BZ #:4640 Improve coding style for EDk2 patch check rule. Add readme.md for ChachaniBoardPkg introduction. Signed-off-by: Duke Zhai Cc: Eric Xing Cc: Ken Yao Cc: Igniculus Fu Cc: Abner Chang --- .../AmdPlatformPkg/Universal/LogoDxe/Logo.c | 2 +- .../AgesaPublic/Include/FchRegistersCommon.h | 32 ++--- .../Acpi/AcpiTables/Facs/Facs.h | 10 +- .../Acpi/AcpiTables/Fadt/Fadt.h | 55 ++++----- .../Acpi/AcpiTables/Hpet/Hpet.h | 45 ++++--- .../Acpi/AcpiTables/Madt/Madt.h | 90 +++++++------- .../Acpi/AcpiTables/Mcfg/Mcfg.h | 22 ++-- .../PlatformBootManager.c | 18 +-- .../PlatformBootManagerLib/PlatformConsole.c | 2 +- .../FspWrapperHobProcessLibSample.c | 116 +++++++++--------- .../SecRamInitData.c | 8 +- .../edk2/MdeModulePkg/Universal/PCD/Dxe/Pcd.c | 2 +- .../edk2/MdeModulePkg/Universal/PCD/Pei/Pcd.c | 10 +- .../PcatRealTimeClockRuntimeDxe/PcRtc.c | 2 +- .../DxeTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c | 2 +- .../PeiTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c | 2 +- .../AmdFtpm/Tpm2DeviceLib/Tpm2DeviceLibFtpm.c | 2 +- .../DxeTcg2PhysicalPresenceLib.c | 48 ++++---- .../Tcg/AmdFtpm/FtpmTcg2Smm/Tcg2Smm.c | 18 +-- .../Tcg/Tcg2Config/Tcg2ConfigPeim.c | 6 +- .../SecurityPkg/Tcg/Tcg2Config/TpmDetection.c | 9 +- .../SmmCpuFeaturesLibCommon.c | 5 +- Platform/AMD/VanGoghBoard/Readme.md | 67 ++++++++++ Platform/AMD/VanGoghBoard/ReleaseNote.txt | 14 +++ .../Universal/PlatformInitPei/BootMode.c | 8 +- .../PlatformInitPei/MemoryCallback.c | 16 +-- .../Universal/PlatformInitPei/MemoryInstall.c | 106 ++++++++-------- .../Universal/PlatformInitPei/MemoryPeim.c | 12 +- .../Universal/PlatformSmbiosDxe/SmbiosTable.c | 4 +- .../FvbServices/FwBlockService.c | 27 ++-- .../Include/Library/SmbiosLib.h | 1 + .../Smm/AcpiSmm/AcpiSmmPlatform.c | 1 - .../Smm/SmmAccessPei/SmmAccessPei.c | 2 - 33 files changed, 420 insertions(+), 344 deletions(-) create mode 100644 Platform/AMD/VanGoghBoard/Readme.md create mode 100644 Platform/AMD/VanGoghBoard/ReleaseNote.txt diff --git a/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c b/Platfor= m/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c index 8e3d89380b..4463ba58eb 100644 --- a/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c +++ b/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c @@ -98,7 +98,7 @@ LogoDxeDisplayEventCallback ( IN VOID *Context ) { - DEBUG((DEBUG_INFO, "AMD logo is displaying.\n")); + DEBUG ((DEBUG_INFO, "AMD logo is displaying.\n")); =20 BootLogoEnableLogo (); gBS->CloseEvent (Event); diff --git a/Platform/AMD/VanGoghBoard/AgesaPublic/Include/FchRegistersComm= on.h b/Platform/AMD/VanGoghBoard/AgesaPublic/Include/FchRegistersCommon.h index 6079fcab75..a69a4791cd 100644 --- a/Platform/AMD/VanGoghBoard/AgesaPublic/Include/FchRegistersCommon.h +++ b/Platform/AMD/VanGoghBoard/AgesaPublic/Include/FchRegistersCommon.h @@ -5,19 +5,19 @@ SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ -#define R_FCH_ACPI_PM1_STATUS 0x00 -#define R_FCH_ACPI_PM1_ENABLE 0x02 -#define R_FCH_ACPI_PM_CONTROL 0x04 -#define ACPI_MMIO_BASE 0xFED80000ul -#define SMI_BASE 0x200 // DWORD -#define PMIO_BASE 0x300 // DWORD -#define FCH_SMI_REG80 0x80 // SmiStatus0 -#define FCH_SMI_REG84 0x84 // SmiStatus1 -#define FCH_SMI_REG88 0x88 // SmiStatus2 -#define FCH_SMI_REG8C 0x8C // SmiStatus3 -#define FCH_SMI_REG90 0x90 // SmiStatus4 -#define FCH_SMI_REG98 0x98 // SmiTrig -#define FCH_SMI_REGA0 0xA0 -#define FCH_SMI_REGB0 0xB0 -#define FCH_SMI_REGC4 0xC4 -#define FCH_PMIOA_REG60 0x60 // AcpiPm1EvtBlk \ No newline at end of file +#define R_FCH_ACPI_PM1_STATUS 0x00 +#define R_FCH_ACPI_PM1_ENABLE 0x02 +#define R_FCH_ACPI_PM_CONTROL 0x04 +#define ACPI_MMIO_BASE 0xFED80000ul +#define SMI_BASE 0x200 // DWORD +#define PMIO_BASE 0x300 // DWORD +#define FCH_SMI_REG80 0x80 // SmiStatus0 +#define FCH_SMI_REG84 0x84 // SmiStatus1 +#define FCH_SMI_REG88 0x88 // SmiStatus2 +#define FCH_SMI_REG8C 0x8C // SmiStatus3 +#define FCH_SMI_REG90 0x90 // SmiStatus4 +#define FCH_SMI_REG98 0x98 // SmiTrig +#define FCH_SMI_REGA0 0xA0 +#define FCH_SMI_REGB0 0xB0 +#define FCH_SMI_REGC4 0xC4 +#define FCH_PMIOA_REG60 0x60 // AcpiPm1EvtBlk diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Fac= s/Facs.h b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Facs/= Facs.h index daf97dd581..96d6cd5255 100644 --- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Facs/Facs.= h +++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Facs/Facs.= h @@ -34,12 +34,12 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITH= ER EXPRESS OR IMPLIED. // // FACS Definitions // -#define EFI_ACPI_FIRMWARE_WAKING_VECTOR 0x00000000 -#define EFI_ACPI_GLOBAL_LOCK 0x00000000 +#define EFI_ACPI_FIRMWARE_WAKING_VECTOR 0x00000000 +#define EFI_ACPI_GLOBAL_LOCK 0x00000000 =20 -#define EFI_ACPI_FIRMWARE_CONTROL_STRUCTURE_FLAGS 0x00000000 -#define EFI_ACPI_X_FIRMWARE_WAKING_VECTOR 0x0000000000000000 +#define EFI_ACPI_FIRMWARE_CONTROL_STRUCTURE_FLAGS 0x00000000 +#define EFI_ACPI_X_FIRMWARE_WAKING_VECTOR 0x0000000000000000 =20 -#define EFI_ACPI_OSPM_FLAGS 0x00000000 +#define EFI_ACPI_OSPM_FLAGS 0x00000000 =20 #endif diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Fad= t/Fadt.h b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Fadt/= Fadt.h index 968a4b0fa5..94eeca8569 100644 --- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Fadt/Fadt.= h +++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Fadt/Fadt.= h @@ -16,35 +16,35 @@ // // ACPI table information used to initialize tables. // -#define EFI_ACPI_OEM_ID 'A','M','D',' ',' ',' ' // OEMID 6 byt= es long -#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('E','D','K','2',' ',' ',' '= ,' ') // OEM table id 8 bytes long -#define EFI_ACPI_OEM_REVISION 0x00000002 -#define EFI_ACPI_CREATOR_ID SIGNATURE_32(' ',' ',' ',' ') -#define EFI_ACPI_CREATOR_REVISION 0x01000013 +#define EFI_ACPI_OEM_ID 'A','M','D',' ',' ',' ' = // OEMID 6 bytes long +#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('E','D','K','2',' ',' ',' = ',' ') // OEM table id 8 bytes long +#define EFI_ACPI_OEM_REVISION 0x00000002 +#define EFI_ACPI_CREATOR_ID SIGNATURE_32(' ',' ',' ',' ') +#define EFI_ACPI_CREATOR_REVISION 0x01000013 =20 // // FADT Definitions // -#define SCI_INT_VECTOR 0x0009 -#define SMI_CMD_IO_PORT 0x000000B0 // SMI Port 0xB0 -#define ACPI_ENABLE 0x0A0 -#define ACPI_DISABLE 0x0A1 +#define SCI_INT_VECTOR 0x0009 +#define SMI_CMD_IO_PORT 0x000000B0 // SMI Port 0xB0 +#define ACPI_ENABLE 0x0A0 +#define ACPI_DISABLE 0x0A1 =20 -#define PM1a_EVT_BLK 0x00000400 -#define PM1b_EVT_BLK 0x00000000 -#define PM1a_CNT_BLK 0x00000404 -#define PM1b_CNT_BLK 0x00000000 -#define PM2_CNT_BLK 0x00000800 -#define PM_TMR_BLK 0x00000408 -#define GPE0_BLK 0x00000420 -#define GPE1_BLK 0x00000000 -#define PM1_EVT_LEN 0x04 -#define PM1_CNT_LEN 0x02 -#define PM2_CNT_LEN 0x01 -#define PM_TM_LEN 0x04 -#define GPE0_BLK_LEN 0x08 -#define GPE1_BLK_LEN 0x00 -#define GPE1_BASE 0x00 +#define PM1a_EVT_BLK 0x00000400 +#define PM1b_EVT_BLK 0x00000000 +#define PM1a_CNT_BLK 0x00000404 +#define PM1b_CNT_BLK 0x00000000 +#define PM2_CNT_BLK 0x00000800 +#define PM_TMR_BLK 0x00000408 +#define GPE0_BLK 0x00000420 +#define GPE1_BLK 0x00000000 +#define PM1_EVT_LEN 0x04 +#define PM1_CNT_LEN 0x02 +#define PM2_CNT_LEN 0x01 +#define PM_TM_LEN 0x04 +#define GPE0_BLK_LEN 0x08 +#define GPE1_BLK_LEN 0x00 +#define GPE1_BASE 0x00 =20 #define RESERVED 0x00 #define P_LVL2_LAT 0x0064 @@ -57,9 +57,8 @@ #define MON_ALRM 0x00 #define CENTURY 0x00 #define IAPC_BOOT_ARCH EFI_ACPI_2_0_LEGACY_DEVICES -//#define FLAG (EFI_ACPI_1_0_WBINVD | EFI_ACPI_1_0_PROC_C1 | EF= I_ACPI_1_0_SLP_BUTTON | EFI_ACPI_1_0_RTC_S4) -#define FLAG 0x0000C5AD -#define FLAG2 (EFI_ACPI_2_0_WBINVD | EFI_ACPI_2_0_PROC_C1 | EFI_= ACPI_2_0_PWR_BUTTON | EFI_ACPI_2_0_SLP_BUTTON | EFI_ACPI_2_0_RTC_S4 | EFI_A= CPI_2_0_RESET_REG_SUP | EFI_ACPI_3_0_USE_PLATFORM_CLOCK) - +// #define FLAG (EFI_ACPI_1_0_WBINVD | EFI_ACPI_1_0_PROC_C1 | E= FI_ACPI_1_0_SLP_BUTTON | EFI_ACPI_1_0_RTC_S4) +#define FLAG 0x0000C5AD +#define FLAG2 (EFI_ACPI_2_0_WBINVD | EFI_ACPI_2_0_PROC_C1 | EFI_ACPI_2_0_= PWR_BUTTON | EFI_ACPI_2_0_SLP_BUTTON | EFI_ACPI_2_0_RTC_S4 | EFI_ACPI_2_0_R= ESET_REG_SUP | EFI_ACPI_3_0_USE_PLATFORM_CLOCK) =20 #endif diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Hpe= t/Hpet.h b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Hpet/= Hpet.h index e28a473f39..d10009bb0f 100644 --- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Hpet/Hpet.= h +++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Hpet/Hpet.= h @@ -16,12 +16,11 @@ // // ACPI table information used to initialize tables. // -#define EFI_ACPI_OEM_ID 'A','M','D',' ',' ',' ' // OEMID 6 byt= es long -#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('E','D','K','2',' ',' ',' '= ,' ') // OEM table id 8 bytes long -#define EFI_ACPI_OEM_REVISION 0x00000002 -#define EFI_ACPI_CREATOR_ID SIGNATURE_32(' ',' ',' ',' ') -#define EFI_ACPI_CREATOR_REVISION 0x01000013 - +#define EFI_ACPI_OEM_ID 'A','M','D',' ',' ',' ' = // OEMID 6 bytes long +#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('E','D','K','2',' ',' ',' = ',' ') // OEM table id 8 bytes long +#define EFI_ACPI_OEM_REVISION 0x00000002 +#define EFI_ACPI_CREATOR_ID SIGNATURE_32(' ',' ',' ',' ') +#define EFI_ACPI_CREATOR_REVISION 0x01000013 =20 // // HPET structure @@ -29,12 +28,12 @@ #define EFI_ACPI_5_0_HIGH_PRECISION_EVENT_TIMER_TABLE_REVISION 0x00 =20 #define EFI_ACPI_5_0_HPET_EVENT_TIMER_BLOCK_ID 0x10228201 - // [31:16] 0x1022 - PCI Ve= ndor ID of 1st Timer Block - // [15] 0x01 - Legacy R= eplacement IRQ Routing Capable - // [14] 0x00 - Reserved - // [13] 0x00 - COUNT_SI= ZE_CAP counter size - // [12:08] 0x02 - Number o= f Comparators in 1st Timer Block - // [07:00] 0x01 - Hardware= Rev ID +// [31:16] 0x1022 - PCI Vendor ID of 1st Timer Block +// [15] 0x01 - Legacy Replacement IRQ Routing Capable +// [14] 0x00 - Reserved +// [13] 0x00 - COUNT_SIZE_CAP counter size +// [12:08] 0x02 - Number of Comparators in 1st Timer Block +// [07:00] 0x01 - Hardware Rev ID #define EFI_ACPI_5_0_HPET_BASE_ADDRESS_SPACE_ID 0x00 #define EFI_ACPI_5_0_HPET_BASE_ADDRESS_REGISTER_BIT_WIDTH 0x00 #define EFI_ACPI_5_0_HPET_BASE_ADDRESS_REGISTER_BIT_OFFSET 0x00 @@ -52,18 +51,18 @@ // typedef struct { // ACPI Common header - EFI_ACPI_DESCRIPTION_HEADER Header; + EFI_ACPI_DESCRIPTION_HEADER Header; // HPET - UINT32 EventTimerBlockID; // Offset 0x= 24 - UINT8 BaseAddress_SpaceID; - UINT8 BaseAddress_RegisterBitWidth; - UINT8 BaseAddress_RegisterBitOffset; - UINT8 Reserved0[1]; - UINT32 BaseAddressLower32bit; // Offset 0x= 28 - UINT32 Reserved1[1]; - UINT8 HpetNumber; // Offset 0x= 34 - UINT16 MinClockTick; // Offset 0x= 35 - UINT8 PageProtectionAndOemAttribute;// Offset 0x= 37 + UINT32 EventTimerBlockID; // Offset 0x= 24 + UINT8 BaseAddress_SpaceID; + UINT8 BaseAddress_RegisterBitWidth; + UINT8 BaseAddress_RegisterBitOffset; + UINT8 Reserved0[1]; + UINT32 BaseAddressLower32bit; // Offset 0x= 28 + UINT32 Reserved1[1]; + UINT8 HpetNumber; // Offset = 0x34 + UINT16 MinClockTick; // Offset = 0x35 + UINT8 PageProtectionAndOemAttribute; // Offset = 0x37 } EFI_ACPI_5_0_HIGH_PRECISION_EVENT_TIMER_TABLE; =20 #pragma pack () diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Mad= t/Madt.h b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Madt/= Madt.h index cd3e965142..d5b728b98d 100644 --- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Madt/Madt.= h +++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Madt/Madt.= h @@ -40,46 +40,45 @@ Abstract: // Statements that include other files // #include -//#include +// #include // // ACPI table information used to initialize tables. // -#define EFI_ACPI_OEM_ID 'A','M','D',' ',' ',' ' // OEMID 6 byt= es long -#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('E','D','K','2',' ',' ',' '= ,' ') // OEM table id 8 bytes long -#define EFI_ACPI_OEM_REVISION 0x00000002 -#define EFI_ACPI_CREATOR_ID SIGNATURE_32(' ',' ',' ',' ') -#define EFI_ACPI_CREATOR_REVISION 0x01000013 +#define EFI_ACPI_OEM_ID 'A','M','D',' ',' ',' ' = // OEMID 6 bytes long +#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('E','D','K','2',' ',' ',' = ',' ') // OEM table id 8 bytes long +#define EFI_ACPI_OEM_REVISION 0x00000002 +#define EFI_ACPI_CREATOR_ID SIGNATURE_32(' ',' ',' ',' ') +#define EFI_ACPI_CREATOR_REVISION 0x01000013 =20 // // Local APIC address // -#define EFI_ACPI_LOCAL_APIC_ADDRESS 0xFEE00000 -//#define EFI_IO_APIC_ADDRESS 0xFEC00000 +#define EFI_ACPI_LOCAL_APIC_ADDRESS 0xFEE00000 +// #define EFI_IO_APIC_ADDRESS 0xFEC00000 =20 // // Multiple APIC Flags are defined in AcpiX.0.h // -#define EFI_ACPI_5_0_MULTIPLE_APIC_FLAGS (EFI_ACPI_5_0_PCAT_COMPAT) +#define EFI_ACPI_5_0_MULTIPLE_APIC_FLAGS (EFI_ACPI_5_0_PCAT_COMPAT) =20 // // Define the number of each table type. // This is where the table layout is modified. // =20 +#define EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT 16 =20 -#define EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT 16 - -#define EFI_ACPI_IO_APIC_COUNT 2 +#define EFI_ACPI_IO_APIC_COUNT 2 =20 #define EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT 2 #define EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT 0 =20 -#define EFI_ACPI_LOCAL_APIC_NMI_COUNT 16 +#define EFI_ACPI_LOCAL_APIC_NMI_COUNT 16 =20 -#define EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT 0 -#define EFI_ACPI_IO_SAPIC_COUNT 0 -#define EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT 0 -#define EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT 0 +#define EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT 0 +#define EFI_ACPI_IO_SAPIC_COUNT 0 +#define EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT 0 +#define EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT 0 =20 // // MADT structure @@ -93,44 +92,43 @@ Abstract: // ACPI 5.0 Table structure // typedef struct { - EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header; + EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header; =20 -#if EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT > 0 - EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE LocalApic[EFI_ACPI= _PROCESSOR_LOCAL_APIC_COUNT]; -#endif + #if EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT > 0 + EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE LocalApic[EFI_AC= PI_PROCESSOR_LOCAL_APIC_COUNT]; + #endif =20 -#if EFI_ACPI_IO_APIC_COUNT > 0 - EFI_ACPI_5_0_IO_APIC_STRUCTURE IoApic[EFI_ACPI_IO= _APIC_COUNT]; -#endif + #if EFI_ACPI_IO_APIC_COUNT > 0 + EFI_ACPI_5_0_IO_APIC_STRUCTURE IoApic[EFI_ACPI_= IO_APIC_COUNT]; + #endif =20 -#if EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT > 0 - EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE Iso[EFI_ACPI_INTER= RUPT_SOURCE_OVERRIDE_COUNT]; -#endif + #if EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT > 0 + EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE Iso[EFI_ACPI_INT= ERRUPT_SOURCE_OVERRIDE_COUNT]; + #endif =20 -#if EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT > 0 - EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE NmiSource[EFI_ACPI= _NON_MASKABLE_INTERRUPT_SOURCE_COUNT]; -#endif + #if EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT > 0 + EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE NmiSource[EFI_AC= PI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT]; + #endif =20 -#if EFI_ACPI_LOCAL_APIC_NMI_COUNT > 0 - EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE LocalApicNmi[EFI_A= CPI_LOCAL_APIC_NMI_COUNT]; -#endif + #if EFI_ACPI_LOCAL_APIC_NMI_COUNT > 0 + EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE LocalApicNmi[EFI= _ACPI_LOCAL_APIC_NMI_COUNT]; + #endif =20 -#if EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT > 0 - EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE LocalApicOverride[= EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT]; -#endif + #if EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT > 0 + EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE LocalApicOverrid= e[EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT]; + #endif =20 -#if EFI_ACPI_IO_SAPIC_COUNT > 0 - EFI_ACPI_5_0_IO_SAPIC_STRUCTURE IoSapic[EFI_ACPI_I= O_SAPIC_COUNT]; -#endif + #if EFI_ACPI_IO_SAPIC_COUNT > 0 + EFI_ACPI_5_0_IO_SAPIC_STRUCTURE IoSapic[EFI_ACPI= _IO_SAPIC_COUNT]; + #endif =20 -#if EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT > 0 - EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE LocalSapic[EFI_ACP= I_PROCESSOR_LOCAL_SAPIC_COUNT]; -#endif - -#if EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT > 0 - EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE PlatformInterruptS= ources[EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT]; -#endif + #if EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT > 0 + EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE LocalSapic[EFI_A= CPI_PROCESSOR_LOCAL_SAPIC_COUNT]; + #endif =20 + #if EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT > 0 + EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE PlatformInterrup= tSources[EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT]; + #endif } EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE; =20 #pragma pack () diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Mcf= g/Mcfg.h b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Mcfg/= Mcfg.h index 045a84fe91..9969ac09d8 100644 --- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Mcfg/Mcfg.= h +++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Mcfg/Mcfg.= h @@ -35,11 +35,11 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITH= ER EXPRESS OR IMPLIED. // // ACPI table information used to initialize tables. // -#define EFI_ACPI_OEM_ID 'A','M','D',' ',' ',' ' // OEMID 6 byt= es long -#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('E','D','K','2',' ',' ',' '= ,' ') // OEM table id 8 bytes long -#define EFI_ACPI_OEM_REVISION 0x00000002 -#define EFI_ACPI_CREATOR_ID SIGNATURE_32(' ',' ',' ',' ') -#define EFI_ACPI_CREATOR_REVISION 0x01000013 +#define EFI_ACPI_OEM_ID 'A','M','D',' ',' ',' ' = // OEMID 6 bytes long +#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('E','D','K','2',' ',' ',' = ',' ') // OEM table id 8 bytes long +#define EFI_ACPI_OEM_REVISION 0x00000002 +#define EFI_ACPI_CREATOR_ID SIGNATURE_32(' ',' ',' ',' ') +#define EFI_ACPI_CREATOR_REVISION 0x01000013 =20 // // MCFG Definitions @@ -48,7 +48,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER= EXPRESS OR IMPLIED. // // Define the number of allocation structures so that we can build the tab= le structure. // -#define EFI_ACPI_ALLOCATION_STRUCTURE_COUNT 1 +#define EFI_ACPI_ALLOCATION_STRUCTURE_COUNT 1 =20 // // MCFG structure @@ -63,11 +63,11 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITH= ER EXPRESS OR IMPLIED. // MCFG Table structure // typedef struct { - EFI_ACPI_DESCRIPTION_HEADER = Header; - UINT64 = Reserved; - #if EFI_ACPI_ALLOCATION_STRUCTURE_COUNT > 0 - EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOC= ATION_STRUCTURE AllocationStructure[EFI_ACPI_ALLOCATION_STRUCTURE_COUNT]; - #endif + EFI_ACPI_DESCRIPTION_HEADER = Header; + UINT64 = Reserved; + #if EFI_ACPI_ALLOCATION_STRUCTURE_COUNT > 0 + EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCAT= ION_STRUCTURE AllocationStructure[EFI_ACPI_ALLOCATION_STRUCTURE_COUNT]; + #endif } EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE; =20 #pragma pack () diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/Pla= tformBootManagerLib/PlatformBootManager.c b/Platform/AMD/VanGoghBoard/Chach= aniBoardPkg/Library/Capsule/PlatformBootManagerLib/PlatformBootManager.c index a647e92054..a13836c035 100644 --- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBo= otManagerLib/PlatformBootManager.c +++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBo= otManagerLib/PlatformBootManager.c @@ -357,7 +357,7 @@ PlatformBdsForceActiveVga ( EFI_DEVICE_PATH_PROTOCOL *IGpuDevicePath; EFI_DEVICE_PATH_PROTOCOL *DGpuDevicePath; =20 - DEBUG ((EFI_D_INFO, "PlatformBdsForceActiveVga enter\n")); + DEBUG ((DEBUG_INFO, "PlatformBdsForceActiveVga enter\n")); =20 Status =3D EFI_SUCCESS; DevicePathFirst =3D NULL; @@ -373,25 +373,25 @@ PlatformBdsForceActiveVga ( ASSERT_EFI_ERROR (Status); =20 if ((IGpuDevicePath =3D=3D NULL) && (DGpuDevicePath =3D=3D NULL)) { - DEBUG ((EFI_D_INFO, "No valid IGPU and DGPU\n")); + DEBUG ((DEBUG_INFO, "No valid IGPU and DGPU\n")); return EFI_UNSUPPORTED; } =20 if ((IGpuDevicePath !=3D NULL) && (DGpuDevicePath =3D=3D NULL)) { - DEBUG ((EFI_D_INFO, "Only IGPU is valid\n")); - // DEBUG ((EFI_D_INFO,"Only IGPU is valid, Update IGPU ...\n")); + DEBUG ((DEBUG_INFO, "Only IGPU is valid\n")); + // DEBUG ((DEBUG_INFO,"Only IGPU is valid, Update IGPU ...\n")); DevicePathFirst =3D IGpuDevicePath; DevicePathSecond =3D DGpuDevicePath; goto UpdateConOut; } else if ((IGpuDevicePath =3D=3D NULL) && (DGpuDevicePath !=3D NULL)) { - DEBUG ((EFI_D_INFO, "Only DGPU is valid\n")); - // DEBUG ((EFI_D_INFO,"Only DGPU is valid, Update DGPU ...\n")); + DEBUG ((DEBUG_INFO, "Only DGPU is valid\n")); + // DEBUG ((DEBUG_INFO,"Only DGPU is valid, Update DGPU ...\n")); DevicePathFirst =3D DGpuDevicePath; DevicePathSecond =3D IGpuDevicePath; goto UpdateConOut; } else if ((IGpuDevicePath !=3D NULL) && (DGpuDevicePath !=3D NULL)) { - DEBUG ((EFI_D_INFO, "DGPU and IGPU are valid, active DGPU\n")); - // DEBUG ((EFI_D_INFO,"Only DGPU is valid, Update DGPU ...\n")); + DEBUG ((DEBUG_INFO, "DGPU and IGPU are valid, active DGPU\n")); + // DEBUG ((DEBUG_INFO,"Only DGPU is valid, Update DGPU ...\n")); DevicePathFirst =3D DGpuDevicePath; DevicePathSecond =3D IGpuDevicePath; goto UpdateConOut; @@ -685,7 +685,7 @@ ExposeOver4GMemoryEventCallback ( LIST_ENTRY *TmpLink; LIST_ENTRY NonTestedMemRanList; =20 - DEBUG ((EFI_D_INFO, "ExposeOver4GMemoryEventCallback\n")); + DEBUG ((DEBUG_INFO, "ExposeOver4GMemoryEventCallback\n")); =20 TmpLink =3D NULL; NoFound =3D TRUE; diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/Pla= tformBootManagerLib/PlatformConsole.c b/Platform/AMD/VanGoghBoard/ChachaniB= oardPkg/Library/Capsule/PlatformBootManagerLib/PlatformConsole.c index 0715fcc86e..b6d8bd9120 100644 --- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBo= otManagerLib/PlatformConsole.c +++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBo= otManagerLib/PlatformConsole.c @@ -379,7 +379,7 @@ DetectAndPreparePlatformPciDevicePath ( NULL ); ASSERT_EFI_ERROR (Status); - DEBUG ((EFI_D_INFO, "InstallProtocolInterface gAmdCpmAllPciIoProtocols= InstalledProtocolGuid %r\n", Status)); + DEBUG ((DEBUG_INFO, "InstallProtocolInterface gAmdCpmAllPciIoProtocols= InstalledProtocolGuid %r\n", Status)); return EFI_SUCCESS; } =20 diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library= /PeiFspWrapperHobProcessLibSample/FspWrapperHobProcessLibSample.c b/Platfor= m/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/PeiFspWrapperHobPro= cessLibSample/FspWrapperHobProcessLibSample.c index c2b09ec52f..3339f98e51 100644 --- a/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/PeiFsp= WrapperHobProcessLibSample/FspWrapperHobProcessLibSample.c +++ b/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/PeiFsp= WrapperHobProcessLibSample/FspWrapperHobProcessLibSample.c @@ -294,15 +294,15 @@ InstallEfiMemory ( ); ASSERT_EFI_ERROR (Status); =20 - DEBUG ((EFI_D_INFO, "NumRanges: %d\n", NumRanges)); + DEBUG ((DEBUG_INFO, "NumRanges: %d\n", NumRanges)); =20 - DEBUG ((EFI_D_INFO, "GetMemoryMap:\n")); + DEBUG ((DEBUG_INFO, "GetMemoryMap:\n")); for (Index =3D 0; Index < NumRanges; Index++) { - DEBUG ((EFI_D_INFO, "Index: %d ", Index)); - DEBUG ((EFI_D_INFO, "RangeLength: 0x%016lX\t", MemoryMap[Index].RangeL= ength)); - DEBUG ((EFI_D_INFO, "PhysicalAddress: 0x%016lX\t", MemoryMap[Index].Ph= ysicalAddress)); - DEBUG ((EFI_D_INFO, "CpuAddress: 0x%016lX\t", MemoryMap[Index].CpuAddr= ess)); - DEBUG ((EFI_D_INFO, "Type: %d\n", MemoryMap[Index].Type)); + DEBUG ((DEBUG_INFO, "Index: %d ", Index)); + DEBUG ((DEBUG_INFO, "RangeLength: 0x%016lX\t", MemoryMap[Index].RangeL= ength)); + DEBUG ((DEBUG_INFO, "PhysicalAddress: 0x%016lX\t", MemoryMap[Index].Ph= ysicalAddress)); + DEBUG ((DEBUG_INFO, "CpuAddress: 0x%016lX\t", MemoryMap[Index].CpuAddr= ess)); + DEBUG ((DEBUG_INFO, "Type: %d\n", MemoryMap[Index].Type)); } =20 // @@ -327,9 +327,9 @@ InstallEfiMemory ( PeiMemoryIndex =3D 0; =20 for (Index =3D 0; Index < NumRanges; Index++) { - DEBUG ((EFI_D_INFO, "Found 0x%lx bytes at ", MemoryMap[Index].RangeLen= gth)); - DEBUG ((EFI_D_INFO, "0x%lx.\t", MemoryMap[Index].PhysicalAddress)); - DEBUG ((EFI_D_INFO, "Type: %d.\n", MemoryMap[Index].Type)); + DEBUG ((DEBUG_INFO, "Found 0x%lx bytes at ", MemoryMap[Index].RangeLen= gth)); + DEBUG ((DEBUG_INFO, "0x%lx.\t", MemoryMap[Index].PhysicalAddress)); + DEBUG ((DEBUG_INFO, "Type: %d.\n", MemoryMap[Index].Type)); =20 if ((MemoryMap[Index].Type =3D=3D DualChannelDdrMainMemory) && (MemoryMap[Index].PhysicalAddress + MemoryMap[Index].RangeLength <= MAX_ADDRESS) && @@ -381,7 +381,7 @@ InstallEfiMemory ( if (Status =3D=3D EFI_SUCCESS) { CapsuleBuffer =3D LargeMemRangeBuf; CapsuleBufferLength =3D LargeMemRangeBufLen; - DEBUG ((EFI_D_INFO, "CapsuleBuffer: %x, CapsuleBufferLength: %x\n", = CapsuleBuffer, CapsuleBufferLength)); + DEBUG ((DEBUG_INFO, "CapsuleBuffer: %x, CapsuleBufferLength: %x\n", = CapsuleBuffer, CapsuleBufferLength)); =20 // // Call the Capsule PPI Coalesce function to coalesce the capsule da= ta. @@ -580,7 +580,7 @@ InstallEfiMemory ( // CopyMem (&DescriptorAcpiVariable, &SmramHobDescriptorBlock->Descriptor[S= mramRanges-1], sizeof (EFI_SMRAM_DESCRIPTOR)); DescriptorAcpiVariable.CpuStart +=3D RESERVED_CPU_S3_SAVE_OFFSET; - DEBUG ((EFI_D_INFO, "gEfiAcpiVariableGuid CpuStart: 0x%X\n", (UINTN)Desc= riptorAcpiVariable.CpuStart)); + DEBUG ((DEBUG_INFO, "gEfiAcpiVariableGuid CpuStart: 0x%X\n", (UINTN)Desc= riptorAcpiVariable.CpuStart)); BuildGuidDataHob ( &gEfiAcpiVariableGuid, &DescriptorAcpiVariable, @@ -644,19 +644,19 @@ InstallS3Memory ( FspHobList ); ASSERT_EFI_ERROR (Status); - DEBUG ((EFI_D_INFO, "NumRanges =3D 0x%x\n", NumRanges)); + DEBUG ((DEBUG_INFO, "NumRanges =3D 0x%x\n", NumRanges)); =20 // // Install physical memory descriptor hobs for each memory range. // SmramRanges =3D 0; - DEBUG ((EFI_D_INFO, "GetMemoryMap:\n")); + DEBUG ((DEBUG_INFO, "GetMemoryMap:\n")); for (Index =3D 0; Index < NumRanges; Index++) { - DEBUG ((EFI_D_INFO, "Index: %d ", Index)); - DEBUG ((EFI_D_INFO, "RangeLength: 0x%016lX\t", MemoryMap[Index].RangeL= ength)); - DEBUG ((EFI_D_INFO, "PhysicalAddress: 0x%016lX\t", MemoryMap[Index].Ph= ysicalAddress)); - DEBUG ((EFI_D_INFO, "CpuAddress: 0x%016lX\t", MemoryMap[Index].CpuAddr= ess)); - DEBUG ((EFI_D_INFO, "Type: %d\n", MemoryMap[Index].Type)); + DEBUG ((DEBUG_INFO, "Index: %d ", Index)); + DEBUG ((DEBUG_INFO, "RangeLength: 0x%016lX\t", MemoryMap[Index].RangeL= ength)); + DEBUG ((DEBUG_INFO, "PhysicalAddress: 0x%016lX\t", MemoryMap[Index].Ph= ysicalAddress)); + DEBUG ((DEBUG_INFO, "CpuAddress: 0x%016lX\t", MemoryMap[Index].CpuAddr= ess)); + DEBUG ((DEBUG_INFO, "Type: %d\n", MemoryMap[Index].Type)); if ((MemoryMap[Index].PhysicalAddress > 0x100000) && ((MemoryMap[Index].Type =3D=3D DualChannelDdrSmramCacheable) || (MemoryMap[Index].Type =3D=3D DualChannelDdrSmramNonCacheable))) @@ -666,7 +666,7 @@ InstallS3Memory ( } =20 ASSERT (SmramRanges > 0); - DEBUG ((EFI_D_INFO, "SmramRanges =3D 0x%x\n", SmramRanges)); + DEBUG ((DEBUG_INFO, "SmramRanges =3D 0x%x\n", SmramRanges)); =20 // // Allocate one extra EFI_SMRAM_DESCRIPTOR to describe a page of SMRAM m= emory that contains a pointer @@ -677,22 +677,22 @@ InstallS3Memory ( BufferSize +=3D ((SmramRanges) * sizeof (EFI_SMRAM_DESCRIPTOR)); } =20 - DEBUG ((EFI_D_INFO, "BufferSize =3D 0x%x\n", BufferSize)); + DEBUG ((DEBUG_INFO, "BufferSize =3D 0x%x\n", BufferSize)); =20 Hob.Raw =3D BuildGuidHob ( &gEfiSmmPeiSmramMemoryReserveGuid, BufferSize ); ASSERT (Hob.Raw); - DEBUG ((EFI_D_INFO, "gEfiSmmPeiSmramMemoryReserveGuid/SmramHobDescriptor= Block: 0x%X \n", (UINTN)Hob.Raw)); + DEBUG ((DEBUG_INFO, "gEfiSmmPeiSmramMemoryReserveGuid/SmramHobDescriptor= Block: 0x%X \n", (UINTN)Hob.Raw)); =20 SmramHobDescriptorBlock =3D (EFI_SMRAM_HOB_D= ESCRIPTOR_BLOCK *)(Hob.Raw); SmramHobDescriptorBlock->NumberOfSmmReservedRegions =3D SmramRanges + 1; =20 SmramIndex =3D 0; for (Index =3D 0; Index < NumRanges; Index++) { - DEBUG ((EFI_D_INFO, "Index: 0x%X \t", Index)); - DEBUG ((EFI_D_INFO, "SmramIndex: 0x%X \n", SmramIndex)); + DEBUG ((DEBUG_INFO, "Index: 0x%X \t", Index)); + DEBUG ((DEBUG_INFO, "SmramIndex: 0x%X \n", SmramIndex)); if ((MemoryMap[Index].PhysicalAddress > 0x100000) && ((MemoryMap[Index].Type =3D=3D DualChannelDdrSmramCacheable) || (MemoryMap[Index].Type =3D=3D DualChannelDdrSmramNonCacheable)) @@ -710,11 +710,11 @@ InstallS3Memory ( SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState =3D EF= I_SMRAM_CLOSED; } =20 - DEBUG ((EFI_D_INFO, "SmramIndex: 0x%X \n", SmramIndex)); - DEBUG ((EFI_D_INFO, "PhysicalStart: 0x%X\n", (UINTN)SmramHobDescript= orBlock->Descriptor[SmramIndex].PhysicalStart)); - DEBUG ((EFI_D_INFO, "CpuStart : 0x%X\n", (UINTN)SmramHobDescript= orBlock->Descriptor[SmramIndex].CpuStart)); - DEBUG ((EFI_D_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescript= orBlock->Descriptor[SmramIndex].PhysicalSize)); - DEBUG ((EFI_D_INFO, "RegionState : 0x%X\n", (UINTN)SmramHobDescript= orBlock->Descriptor[SmramIndex].RegionState)); + DEBUG ((DEBUG_INFO, "SmramIndex: 0x%X \n", SmramIndex)); + DEBUG ((DEBUG_INFO, "PhysicalStart: 0x%X\n", (UINTN)SmramHobDescript= orBlock->Descriptor[SmramIndex].PhysicalStart)); + DEBUG ((DEBUG_INFO, "CpuStart : 0x%X\n", (UINTN)SmramHobDescript= orBlock->Descriptor[SmramIndex].CpuStart)); + DEBUG ((DEBUG_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescript= orBlock->Descriptor[SmramIndex].PhysicalSize)); + DEBUG ((DEBUG_INFO, "RegionState : 0x%X\n", (UINTN)SmramHobDescript= orBlock->Descriptor[SmramIndex].RegionState)); if ( SmramIndex =3D=3D SmramRanges - 1) { // // one extra EFI_SMRAM_DESCRIPTOR for a page of SMRAM memory @@ -726,14 +726,14 @@ InstallS3Memory ( SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize =3D= MemoryMap[Index].RangeLength - EFI_PAGE_SIZE; SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState =3D= SmramHobDescriptorBlock->Descriptor[SmramIndex-1].RegionState; SmramHobDescriptorBlock->Descriptor[SmramIndex-1].RegionState |=3D= EFI_ALLOCATED; - DEBUG ((EFI_D_INFO, "SmramIndex: 0x%X \n", SmramIndex)); - DEBUG ((EFI_D_INFO, "PhysicalStart: 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex].PhysicalStart)); - DEBUG ((EFI_D_INFO, "CpuStart : 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex].CpuStart)); - DEBUG ((EFI_D_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex].PhysicalSize)); - DEBUG ((EFI_D_INFO, "RegionState : 0x%X\n\n", (UINTN)SmramHobDesc= riptorBlock->Descriptor[SmramIndex].RegionState)); - - DEBUG ((EFI_D_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex-1].PhysicalSize)); - DEBUG ((EFI_D_INFO, "RegionState : 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex-1].RegionState)); + DEBUG ((DEBUG_INFO, "SmramIndex: 0x%X \n", SmramIndex)); + DEBUG ((DEBUG_INFO, "PhysicalStart: 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex].PhysicalStart)); + DEBUG ((DEBUG_INFO, "CpuStart : 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex].CpuStart)); + DEBUG ((DEBUG_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex].PhysicalSize)); + DEBUG ((DEBUG_INFO, "RegionState : 0x%X\n\n", (UINTN)SmramHobDesc= riptorBlock->Descriptor[SmramIndex].RegionState)); + + DEBUG ((DEBUG_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex-1].PhysicalSize)); + DEBUG ((DEBUG_INFO, "RegionState : 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex-1].RegionState)); } =20 SmramIndex++; @@ -745,7 +745,7 @@ InstallS3Memory ( // CopyMem (&DescriptorAcpiVariable, &SmramHobDescriptorBlock->Descriptor[S= mramRanges-1], sizeof (EFI_SMRAM_DESCRIPTOR)); DescriptorAcpiVariable.CpuStart +=3D RESERVED_CPU_S3_SAVE_OFFSET; - DEBUG ((EFI_D_INFO, "gEfiAcpiVariableGuid CpuStart: 0x%X\n", (UINTN)Desc= riptorAcpiVariable.CpuStart)); + DEBUG ((DEBUG_INFO, "gEfiAcpiVariableGuid CpuStart: 0x%X\n", (UINTN)Desc= riptorAcpiVariable.CpuStart)); BuildGuidDataHob ( &gEfiAcpiVariableGuid, &DescriptorAcpiVariable, @@ -757,20 +757,20 @@ InstallS3Memory ( // install it as PEI Memory. // =20 - DEBUG ((EFI_D_INFO, "TSEG Base =3D 0x%08x\n", SmramHobDescriptorBlock->D= escriptor[SmramRanges].PhysicalStart)); - DEBUG ((EFI_D_INFO, "SmramRanges =3D 0x%x\n", SmramRanges)); + DEBUG ((DEBUG_INFO, "TSEG Base =3D 0x%08x\n", SmramHobDescriptorBlock->D= escriptor[SmramRanges].PhysicalStart)); + DEBUG ((DEBUG_INFO, "SmramRanges =3D 0x%x\n", SmramRanges)); S3MemoryRangeData =3D (RESERVED_ACPI_S3_RANGE *)(UINTN) (SmramHobDescriptorBlock->Descriptor[SmramRanges].Ph= ysicalStart + RESERVED_ACPI_S3_RANGE_OFFSET); - DEBUG ((EFI_D_INFO, "S3MemoryRangeData =3D 0x%08x\n", (UINTN)S3MemoryRan= geData)); + DEBUG ((DEBUG_INFO, "S3MemoryRangeData =3D 0x%08x\n", (UINTN)S3MemoryRan= geData)); =20 - DEBUG ((EFI_D_INFO, "S3MemoryRangeData->AcpiReservedMemoryBase =3D 0x%X\= n", (UINTN)S3MemoryRangeData->AcpiReservedMemoryBase)); - DEBUG ((EFI_D_INFO, "S3MemoryRangeData->AcpiReservedMemorySize =3D 0x%X\= n", (UINTN)S3MemoryRangeData->AcpiReservedMemorySize)); - DEBUG ((EFI_D_INFO, "S3MemoryRangeData->SystemMemoryLength =3D 0x%X\n", = (UINTN)S3MemoryRangeData->SystemMemoryLength)); + DEBUG ((DEBUG_INFO, "S3MemoryRangeData->AcpiReservedMemoryBase =3D 0x%X\= n", (UINTN)S3MemoryRangeData->AcpiReservedMemoryBase)); + DEBUG ((DEBUG_INFO, "S3MemoryRangeData->AcpiReservedMemorySize =3D 0x%X\= n", (UINTN)S3MemoryRangeData->AcpiReservedMemorySize)); + DEBUG ((DEBUG_INFO, "S3MemoryRangeData->SystemMemoryLength =3D 0x%X\n", = (UINTN)S3MemoryRangeData->SystemMemoryLength)); =20 S3MemoryBase =3D (UINTN)(S3MemoryRangeData->AcpiReservedMemoryBase); - DEBUG ((EFI_D_INFO, "S3MemoryBase =3D 0x%08x\n", S3MemoryBase)); + DEBUG ((DEBUG_INFO, "S3MemoryBase =3D 0x%08x\n", S3MemoryBase)); S3MemorySize =3D (UINTN)(S3MemoryRangeData->AcpiReservedMemorySize); - DEBUG ((EFI_D_INFO, "S3MemorySize =3D 0x%08x\n", S3MemorySize)); + DEBUG ((DEBUG_INFO, "S3MemorySize =3D 0x%08x\n", S3MemorySize)); =20 Status =3D PeiServicesInstallPeiMemory (S3MemoryBase, S3MemorySize); ASSERT_EFI_ERROR (Status); @@ -795,7 +795,7 @@ InstallS3Memory ( S3MemoryRangeData->SystemMemoryLength - 0x100000 ); =20 - DEBUG ((EFI_D_INFO, "MemoryBegin: 0x%lX, MemoryLength: 0x%lX\n", 0x10000= 0, S3MemoryRangeData->SystemMemoryLength - 0x100000)); + DEBUG ((DEBUG_INFO, "MemoryBegin: 0x%lX, MemoryLength: 0x%lX\n", 0x10000= 0, S3MemoryRangeData->SystemMemoryLength - 0x100000)); =20 for (Index =3D 0; Index < NumRanges; Index++) { if ((MemoryMap[Index].Type =3D=3D DualChannelDdrMainMemory) && @@ -814,10 +814,10 @@ InstallS3Memory ( MemoryMap[Index].PhysicalAddress, MemoryMap[Index].RangeLength ); - DEBUG ((EFI_D_INFO, "MemoryBegin: 0x%lX, MemoryLength: 0x%lX\n", Mem= oryMap[Index].PhysicalAddress, MemoryMap[Index].RangeLength)); + DEBUG ((DEBUG_INFO, "MemoryBegin: 0x%lX, MemoryLength: 0x%lX\n", Mem= oryMap[Index].PhysicalAddress, MemoryMap[Index].RangeLength)); =20 - DEBUG ((EFI_D_INFO, "Build resource HOB for Legacy Region on S3 patc= h :")); - DEBUG ((EFI_D_INFO, " Memory Base:0x%lX Length:0x%lX\n", MemoryMap[I= ndex].PhysicalAddress, MemoryMap[Index].RangeLength)); + DEBUG ((DEBUG_INFO, "Build resource HOB for Legacy Region on S3 patc= h :")); + DEBUG ((DEBUG_INFO, " Memory Base:0x%lX Length:0x%lX\n", MemoryMap[I= ndex].PhysicalAddress, MemoryMap[Index].RangeLength)); } } =20 @@ -894,7 +894,7 @@ GetPlatformMemorySize ( =20 *MemorySize =3D PEI_MIN_MEMORY_SIZE; for (Index =3D 0; Index < DataSize / sizeof (EFI_MEMORY_TYPE_INFORMATI= ON); Index++) { - DEBUG ((EFI_D_INFO, "Index %d, Page: %d\n", Index, MemoryData[Index]= .NumberOfPages)); + DEBUG ((DEBUG_INFO, "Index %d, Page: %d\n", Index, MemoryData[Index]= .NumberOfPages)); *MemorySize +=3D MemoryData[Index].NumberOfPages * EFI_PAGE_SIZE; } =20 @@ -908,7 +908,7 @@ GetPlatformMemorySize ( ); } =20 - DEBUG ((EFI_D_INFO, "GetPlatformMemorySize, MemorySize: 0x%lX\n", *Memor= ySize)); + DEBUG ((DEBUG_INFO, "GetPlatformMemorySize, MemorySize: 0x%lX\n", *Memor= ySize)); return EFI_SUCCESS; } =20 @@ -941,7 +941,7 @@ PostFspmHobProcess ( ASSERT_EFI_ERROR (Status); =20 if (BootMode =3D=3D BOOT_ON_S3_RESUME) { - DEBUG ((EFI_D_INFO, "Following BOOT_ON_S3_RESUME boot path.\n")); + DEBUG ((DEBUG_INFO, "Following BOOT_ON_S3_RESUME boot path.\n")); =20 Status =3D InstallS3Memory (PeiServices, BootMode, FspHobList); ASSERT_EFI_ERROR (Status); @@ -1032,7 +1032,7 @@ GetAvailableMemoryRanges ( { EFI_PEI_HOB_POINTERS Hob; =20 - DEBUG ((EFI_D_INFO, "GetAvailableMemoryRanges++\n")); + DEBUG ((DEBUG_INFO, "GetAvailableMemoryRanges++\n")); if ((*NumRanges) < MAX_RANGES) { return EFI_BUFFER_TOO_SMALL; } @@ -1050,7 +1050,7 @@ GetAvailableMemoryRanges ( MemoryMap[*NumRanges].Type =3D DualChannelDdrReservedMem= ory; (*NumRanges)++; DEBUG (( - EFI_D_INFO, + DEBUG_INFO, " GetAvailableMemoryRanges Base:0x%016lX, Size: 0x%016lX\n", \ Hob.ResourceDescriptor->PhysicalStart, \ Hob.ResourceDescriptor->ResourceLength @@ -1072,7 +1072,7 @@ GetReservedMemoryRanges ( { EFI_PEI_HOB_POINTERS Hob; =20 - DEBUG ((EFI_D_INFO, "GetReservedMemoryRanges\n")); + DEBUG ((DEBUG_INFO, "GetReservedMemoryRanges\n")); if ((*NumRanges) < MAX_RANGES) { return EFI_BUFFER_TOO_SMALL; } @@ -1090,7 +1090,7 @@ GetReservedMemoryRanges ( MemoryMap[*NumRanges].Type =3D DualChannelDdrReservedMem= ory; (*NumRanges)++; DEBUG (( - EFI_D_INFO, + DEBUG_INFO, " GetReservedMemoryRanges Base:0x%016lX, Size: 0x%016lX\n", \ Hob.ResourceDescriptor->PhysicalStart, \ Hob.ResourceDescriptor->ResourceLength @@ -1375,7 +1375,7 @@ SetPeiCacheMode ( break; } =20 - DEBUG ((EFI_D_INFO, "Base=3D%lx, Mask=3D%lx\n", MtrrSetting.Variables.= Mtrr[Index].Base, MtrrSetting.Variables.Mtrr[Index].Mask)); + DEBUG ((DEBUG_INFO, "Base=3D%lx, Mask=3D%lx\n", MtrrSetting.Variables.= Mtrr[Index].Base, MtrrSetting.Variables.Mtrr[Index].Mask)); } =20 // diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library= /SecFspWrapperPlatformSecLibSample/SecRamInitData.c b/Platform/AMD/VanGoghB= oard/Override/edk2/Fsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample= /SecRamInitData.c index ed6917b27b..5e7f051bb6 100644 --- a/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/SecFsp= WrapperPlatformSecLibSample/SecRamInitData.c +++ b/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/SecFsp= WrapperPlatformSecLibSample/SecRamInitData.c @@ -10,10 +10,10 @@ #include =20 typedef struct { - EFI_PHYSICAL_ADDRESS MicrocodeRegionBase; - UINT64 MicrocodeRegionSize; - EFI_PHYSICAL_ADDRESS CodeRegionBase; - UINT64 CodeRegionSize; + EFI_PHYSICAL_ADDRESS MicrocodeRegionBase; + UINT64 MicrocodeRegionSize; + EFI_PHYSICAL_ADDRESS CodeRegionBase; + UINT64 CodeRegionSize; } FSPT_CORE_UPD; =20 typedef struct { diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Universal= /PCD/Dxe/Pcd.c b/Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Unive= rsal/PCD/Dxe/Pcd.c index cce92be6a6..e4d5a78147 100644 --- a/Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Universal/PCD/Dx= e/Pcd.c +++ b/Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Universal/PCD/Dx= e/Pcd.c @@ -39,7 +39,7 @@ CheckPcdInFsp ( && ( CompareGuid (InputGuid, &gEfiAmdAgesaModulePkgTokenSpaceGuid) /= / AgesaModulePkg || CompareGuid (InputGuid, &gEfiAmdAgesaPkgTokenSpaceGuid) /= / AgesaPkg || CompareGuid (InputGuid, &gAmdFspPkgGuid) /= / FspPkg - || CompareGuid (InputGuid, &gAmdCpmPkgTokenSpaceGuid))) = // AmdCpmPkg + || CompareGuid (InputGuid, &gAmdCpmPkgTokenSpaceGuid))) /= / AmdCpmPkg { return TRUE; } diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Universal= /PCD/Pei/Pcd.c b/Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Unive= rsal/PCD/Pei/Pcd.c index 129f03e684..26e0ec5311 100644 --- a/Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Universal/PCD/Pe= i/Pcd.c +++ b/Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Universal/PCD/Pe= i/Pcd.c @@ -30,11 +30,11 @@ CheckPcdInFsp ( IN CONST EFI_GUID *InputGuid ) { - if ((FixedPcdGet8 (PcdFspModeSelection) =3D=3D 0) = // Dispatch mode - && (CompareGuid (InputGuid, &gEfiAmdAgesaModulePkgTokenSpaceGuid) // = AgesaModulePkg - || CompareGuid (InputGuid, &gEfiAmdAgesaPkgTokenSpaceGuid) // = AgesaPkg - || CompareGuid (InputGuid, &gAmdFspPkgGuid) // = FspPkg - || CompareGuid (InputGuid, &gAmdCpmPkgTokenSpaceGuid))) // = AmdCpmPkg + if ( (FixedPcdGet8 (PcdFspModeSelection) =3D=3D 0) = // Dispatch mode + && ( CompareGuid (InputGuid, &gEfiAmdAgesaModulePkgTokenSpaceGuid) /= / AgesaModulePkg + || CompareGuid (InputGuid, &gEfiAmdAgesaPkgTokenSpaceGuid) /= / AgesaPkg + || CompareGuid (InputGuid, &gAmdFspPkgGuid) /= / FspPkg + || CompareGuid (InputGuid, &gAmdCpmPkgTokenSpaceGuid))) /= / AmdCpmPkg { return TRUE; } diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/PcAtChipsetPkg/PcatRea= lTimeClockRuntimeDxe/PcRtc.c b/Platform/AMD/VanGoghBoard/Override/edk2/PcAt= ChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c index 37ba9d8b5d..14bac8d3bf 100644 --- a/Platform/AMD/VanGoghBoard/Override/edk2/PcAtChipsetPkg/PcatRealTimeCl= ockRuntimeDxe/PcRtc.c +++ b/Platform/AMD/VanGoghBoard/Override/edk2/PcAtChipsetPkg/PcatRealTimeCl= ockRuntimeDxe/PcRtc.c @@ -1349,7 +1349,7 @@ PcRtcAcpiTableChangeCallback ( if (!EFI_ERROR (Status)) { Century =3D (UINT8)(Time.Year / 100); Century =3D DecimalToBcd8 (Century); - DEBUG ((EFI_D_INFO, "PcRtc: Write 0x%x to CMOS location 0x%x\n", Cen= tury, mModuleGlobal.CenturyRtcAddress)); + DEBUG ((DEBUG_INFO, "PcRtc: Write 0x%x to CMOS location 0x%x\n", Cen= tury, mModuleGlobal.CenturyRtcAddress)); RtcWrite (mModuleGlobal.CenturyRtcAddress, Century); } } diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/Am= dFtpm/DxeTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c b/Platform/AMD/VanGoghBoard/O= verride/edk2/SecurityPkg/Library/AmdFtpm/DxeTpm2DeviceLibFsp/Tpm2DeviceLibF= tpm.c index 9ea87fafd4..236707b158 100644 --- a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/D= xeTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c +++ b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/D= xeTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c @@ -75,7 +75,7 @@ Tpm2SubmitCommand ( EFI_STATUS Status =3D EFI_SUCCESS; =20 if ((NULL =3D=3D InputParameterBlock) || (NULL =3D=3D OutputParameterBlo= ck) || (0 =3D=3D InputParameterBlockSize)) { - DEBUG ((EFI_D_ERROR, "Buffer =3D=3D NULL or InputParameterBlockSize = =3D=3D 0\n")); + DEBUG ((DEBUG_ERROR, "Buffer =3D=3D NULL or InputParameterBlockSize = =3D=3D 0\n")); Status =3D EFI_INVALID_PARAMETER; return Status; } diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/Am= dFtpm/PeiTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c b/Platform/AMD/VanGoghBoard/O= verride/edk2/SecurityPkg/Library/AmdFtpm/PeiTpm2DeviceLibFsp/Tpm2DeviceLibF= tpm.c index 32f63b78ee..7dd571665c 100644 --- a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/P= eiTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c +++ b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/P= eiTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c @@ -84,7 +84,7 @@ Tpm2SubmitCommand ( EFI_STATUS Status =3D EFI_SUCCESS; =20 if ((NULL =3D=3D InputParameterBlock) || (NULL =3D=3D OutputParameterBlo= ck) || (0 =3D=3D InputParameterBlockSize)) { - DEBUG ((EFI_D_ERROR, "Buffer =3D=3D NULL or InputParameterBlockSize = =3D=3D 0\n")); + DEBUG ((DEBUG_ERROR, "Buffer =3D=3D NULL or InputParameterBlockSize = =3D=3D 0\n")); Status =3D EFI_INVALID_PARAMETER; return Status; } diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/Am= dFtpm/Tpm2DeviceLib/Tpm2DeviceLibFtpm.c b/Platform/AMD/VanGoghBoard/Overrid= e/edk2/SecurityPkg/Library/AmdFtpm/Tpm2DeviceLib/Tpm2DeviceLibFtpm.c index daf75fa1b3..8c4c952c0e 100644 --- a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/T= pm2DeviceLib/Tpm2DeviceLibFtpm.c +++ b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/AmdFtpm/T= pm2DeviceLib/Tpm2DeviceLibFtpm.c @@ -69,7 +69,7 @@ Tpm2SubmitCommand ( EFI_STATUS Status =3D EFI_SUCCESS; =20 if ((NULL =3D=3D InputParameterBlock) || (NULL =3D=3D OutputParameterBlo= ck) || (0 =3D=3D InputParameterBlockSize)) { - DEBUG ((EFI_D_ERROR, "Buffer =3D=3D NULL or InputParameterBlockSize = =3D=3D 0\n")); + DEBUG ((DEBUG_ERROR, "Buffer =3D=3D NULL or InputParameterBlockSize = =3D=3D 0\n")); Status =3D EFI_INVALID_PARAMETER; return Status; } diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/Dx= eTcg2PhysicalPresenceLib/DxeTcg2PhysicalPresenceLib.c b/Platform/AMD/VanGog= hBoard/Override/edk2/SecurityPkg/Library/DxeTcg2PhysicalPresenceLib/DxeTcg2= PhysicalPresenceLib.c index 053f565562..bb2aac9af3 100644 --- a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/DxeTcg2Ph= ysicalPresenceLib/DxeTcg2PhysicalPresenceLib.c +++ b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Library/DxeTcg2Ph= ysicalPresenceLib/DxeTcg2PhysicalPresenceLib.c @@ -100,16 +100,16 @@ Tpm2CommandClear ( CopyMem (LocalAuthSession.hmac.buffer, PlatformAuth->buffer, PlatformA= uth->size); } =20 - DEBUG ((EFI_D_INFO, "Tpm2ClearControl ... \n")); + DEBUG ((DEBUG_INFO, "Tpm2ClearControl ... \n")); Status =3D Tpm2ClearControl (TPM_RH_PLATFORM, AuthSession, NO); - DEBUG ((EFI_D_INFO, "Tpm2ClearControl - %r\n", Status)); + DEBUG ((DEBUG_INFO, "Tpm2ClearControl - %r\n", Status)); if (EFI_ERROR (Status)) { goto Done; } =20 - DEBUG ((EFI_D_INFO, "Tpm2Clear ... \n")); + DEBUG ((DEBUG_INFO, "Tpm2Clear ... \n")); Status =3D Tpm2Clear (TPM_RH_PLATFORM, AuthSession); - DEBUG ((EFI_D_INFO, "Tpm2Clear - %r\n", Status)); + DEBUG ((DEBUG_INFO, "Tpm2Clear - %r\n", Status)); =20 Done: ZeroMem (&LocalAuthSession.hmac, sizeof (LocalAuthSession.hmac)); @@ -143,7 +143,7 @@ Tpm2CommandChangeEps ( } =20 Status =3D Tpm2ChangeEPS (TPM_RH_PLATFORM, AuthSession); - DEBUG ((EFI_D_INFO, "Tpm2ChangeEPS - %r\n", Status)); + DEBUG ((DEBUG_INFO, "Tpm2ChangeEPS - %r\n", Status)); =20 ZeroMem (&LocalAuthSession.hmac, sizeof (LocalAuthSession.hmac)); return Status; @@ -808,7 +808,7 @@ Tcg2ExecutePendingTpmRequest ( // // Print confirm text and wait for approval. // - DEBUG ((EFI_D_INFO, "Print confirm text and wait for approval.\n")); + DEBUG ((DEBUG_INFO, "Print confirm text and wait for approval.\n")); RequestConfirmed =3D TRUE; // RequestConfirmed =3D Tcg2UserConfirm (TcgPpData->PPRequest, TcgPp= Data->PPRequestParameter); } @@ -863,12 +863,12 @@ Tcg2ExecutePendingTpmRequest ( TcgPpData ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "Fail to set variable %S, %r\n", TCG2_PHYSICAL_PR= ESENCE_VARIABLE, Status)); + DEBUG ((DEBUG_ERROR, "Fail to set variable %S, %r\n", TCG2_PHYSICAL_PR= ESENCE_VARIABLE, Status)); return; } =20 if (TcgPpData->PPResponse =3D=3D TCG_PP_OPERATION_RESPONSE_USER_ABORT) { - DEBUG ((EFI_D_INFO, "User abort the TPM action \n")); + DEBUG ((DEBUG_INFO, "User abort the TPM action \n")); return; } =20 @@ -912,7 +912,7 @@ Tcg2ExecutePendingTpmRequest ( } =20 // Print (L"Rebooting system to make TPM2 settings in effect\n"); - DEBUG ((EFI_D_INFO, "Rebooting system to make TPM2 settings in effect\n"= )); + DEBUG ((DEBUG_INFO, "Rebooting system to make TPM2 settings in effect\n"= )); gRT->ResetSystem (EfiResetCold, EFI_SUCCESS, 0, NULL); ASSERT (FALSE); } @@ -954,7 +954,7 @@ Tcg2PhysicalPresenceLibProcessRequest ( &gEfiTcg2PhysicalPresenceGuid ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "[TPM2] Error when lock variable %s, Status =3D= %r\n", TCG2_PHYSICAL_PRESENCE_FLAGS_VARIABLE, Status)); + DEBUG ((DEBUG_ERROR, "[TPM2] Error when lock variable %s, Status =3D= %r\n", TCG2_PHYSICAL_PRESENCE_FLAGS_VARIABLE, Status)); ASSERT_EFI_ERROR (Status); } } @@ -965,7 +965,7 @@ Tcg2PhysicalPresenceLibProcessRequest ( // Check S4 resume // // if (GetBootModeHob () =3D=3D BOOT_ON_S4_RESUME) { - // DEBUG ((EFI_D_INFO, "S4 Resume, Skip TPM PP process!\n")); + // DEBUG ((DEBUG_INFO, "S4 Resume, Skip TPM PP process!\n")); // return ; // } =20 @@ -990,7 +990,7 @@ Tcg2PhysicalPresenceLibProcessRequest ( &PpiFlags ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "[TPM2] Set physical presence flag failed, Stat= us =3D %r\n", Status)); + DEBUG ((DEBUG_ERROR, "[TPM2] Set physical presence flag failed, Stat= us =3D %r\n", Status)); return; } =20 @@ -1019,18 +1019,18 @@ Tcg2PhysicalPresenceLibProcessRequest ( &TcgPpData ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "[TPM2] Set physical presence variable failed, = Status =3D %r\n", Status)); + DEBUG ((DEBUG_ERROR, "[TPM2] Set physical presence variable failed, = Status =3D %r\n", Status)); return; } } =20 - DEBUG ((EFI_D_INFO, "[TPM2] Flags=3D%x, PPRequest=3D%x (LastPPRequest=3D= %x)\n", PpiFlags.PPFlags, TcgPpData.PPRequest, TcgPpData.LastPPRequest)); + DEBUG ((DEBUG_INFO, "[TPM2] Flags=3D%x, PPRequest=3D%x (LastPPRequest=3D= %x)\n", PpiFlags.PPFlags, TcgPpData.PPRequest, TcgPpData.LastPPRequest)); =20 // // Execute pending TPM request. // Tcg2ExecutePendingTpmRequest (PlatformAuth, &TcgPpData, &PpiFlags); - DEBUG ((EFI_D_INFO, "[TPM2] PPResponse =3D %x (LastPPRequest=3D%x, Flags= =3D%x)\n", TcgPpData.PPResponse, TcgPpData.LastPPRequest, PpiFlags.PPFlags)= ); + DEBUG ((DEBUG_INFO, "[TPM2] PPResponse =3D %x (LastPPRequest=3D%x, Flags= =3D%x)\n", TcgPpData.PPResponse, TcgPpData.LastPPRequest, PpiFlags.PPFlags)= ); } =20 /** @@ -1061,7 +1061,7 @@ Tcg2PhysicalPresenceLibNeedUserConfirm ( // Check S4 resume // // if (GetBootModeHob () =3D=3D BOOT_ON_S4_RESUME) { - // DEBUG ((EFI_D_INFO, "S4 Resume, Skip TPM PP process!\n")); + // DEBUG ((DEBUG_INFO, "S4 Resume, Skip TPM PP process!\n")); // return FALSE; // } =20 @@ -1077,7 +1077,7 @@ Tcg2PhysicalPresenceLibNeedUserConfirm ( &TcgPpData ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "[TPM2] GetVariable %S, %r\n", TCG2_PHYSICAL_PRES= ENCE_VARIABLE, Status)); + DEBUG ((DEBUG_ERROR, "[TPM2] GetVariable %S, %r\n", TCG2_PHYSICAL_PRES= ENCE_VARIABLE, Status)); return FALSE; } =20 @@ -1090,7 +1090,7 @@ Tcg2PhysicalPresenceLibNeedUserConfirm ( &PpiFlags ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "[TPM2] GetVariable %S, %r\n", TCG2_PHYSICAL_PRES= ENCE_FLAGS_VARIABLE, Status)); + DEBUG ((DEBUG_ERROR, "[TPM2] GetVariable %S, %r\n", TCG2_PHYSICAL_PRES= ENCE_FLAGS_VARIABLE, Status)); return FALSE; } =20 @@ -1138,7 +1138,7 @@ Tcg2PhysicalPresenceLibReturnOperationResponseToOsFun= ction ( UINTN DataSize; EFI_TCG2_PHYSICAL_PRESENCE PpData; =20 - DEBUG ((EFI_D_INFO, "[TPM2] ReturnOperationResponseToOsFunction\n")); + DEBUG ((DEBUG_INFO, "[TPM2] ReturnOperationResponseToOsFunction\n")); =20 // // Get the Physical Presence variable @@ -1154,7 +1154,7 @@ Tcg2PhysicalPresenceLibReturnOperationResponseToOsFun= ction ( if (EFI_ERROR (Status)) { *MostRecentRequest =3D 0; *Response =3D 0; - DEBUG ((EFI_D_ERROR, "[TPM2] Get PP variable failure! Status =3D %r\n"= , Status)); + DEBUG ((DEBUG_ERROR, "[TPM2] Get PP variable failure! Status =3D %r\n"= , Status)); return TCG_PP_RETURN_TPM_OPERATION_RESPONSE_FAILURE; } =20 @@ -1189,7 +1189,7 @@ Tcg2PhysicalPresenceLibSubmitRequestToPreOSFunction ( EFI_TCG2_PHYSICAL_PRESENCE PpData; EFI_TCG2_PHYSICAL_PRESENCE_FLAGS Flags; =20 - DEBUG ((EFI_D_INFO, "[TPM2] SubmitRequestToPreOSFunction, Request =3D %x= , %x\n", OperationRequest, RequestParameter)); + DEBUG ((DEBUG_INFO, "[TPM2] SubmitRequestToPreOSFunction, Request =3D %x= , %x\n", OperationRequest, RequestParameter)); =20 // // Get the Physical Presence variable @@ -1203,7 +1203,7 @@ Tcg2PhysicalPresenceLibSubmitRequestToPreOSFunction ( &PpData ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "[TPM2] Get PP variable failure! Status =3D %r\n"= , Status)); + DEBUG ((DEBUG_ERROR, "[TPM2] Get PP variable failure! Status =3D %r\n"= , Status)); return TCG_PP_SUBMIT_REQUEST_TO_PREOS_GENERAL_FAILURE; } =20 @@ -1227,7 +1227,7 @@ Tcg2PhysicalPresenceLibSubmitRequestToPreOSFunction ( &PpData ); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "[TPM2] Set PP variable failure! Status =3D %r\= n", Status)); + DEBUG ((DEBUG_ERROR, "[TPM2] Set PP variable failure! Status =3D %r\= n", Status)); return TCG_PP_SUBMIT_REQUEST_TO_PREOS_GENERAL_FAILURE; } } @@ -1266,7 +1266,7 @@ Tcg2PhysicalPresenceLibGetManagementFlags ( EFI_TCG2_PHYSICAL_PRESENCE_FLAGS PpiFlags; UINTN DataSize; =20 - DEBUG ((EFI_D_INFO, "[TPM2] GetManagementFlags\n")); + DEBUG ((DEBUG_INFO, "[TPM2] GetManagementFlags\n")); =20 DataSize =3D sizeof (EFI_TCG2_PHYSICAL_PRESENCE_FLAGS); Status =3D gRT->GetVariable ( diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/AmdFtp= m/FtpmTcg2Smm/Tcg2Smm.c b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityP= kg/Tcg/AmdFtpm/FtpmTcg2Smm/Tcg2Smm.c index f38749298a..b27e515da9 100644 --- a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/AmdFtpm/FtpmT= cg2Smm/Tcg2Smm.c +++ b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/AmdFtpm/FtpmT= cg2Smm/Tcg2Smm.c @@ -345,7 +345,7 @@ UpdatePPVersion ( { if (AsciiStrCmp ((CHAR8 *)DataPtr, PHYSICAL_PRESENCE_VERSION_TAG) =3D= =3D 0) { Status =3D AsciiStrCpyS ((CHAR8 *)DataPtr, PHYSICAL_PRESENCE_VERSION= _SIZE, PPVer); - DEBUG ((EFI_D_INFO, "TPM2 Physical Presence Interface Version update= status 0x%x\n", Status)); + DEBUG ((DEBUG_INFO, "TPM2 Physical Presence Interface Version update= status 0x%x\n", Status)); return Status; } } @@ -687,8 +687,8 @@ PublishAcpiTable ( ASSERT (Table->OemTableId =3D=3D SIGNATURE_64 ('T', 'p', 'm', '2', 'T', = 'a', 'b', 'l')); CopyMem (Table->OemId, PcdGetPtr (PcdAcpiDefaultOemId), sizeof (Table->O= emId)); =20 - DEBUG ((EFI_D_INFO, "FtpmControlArea: 0x%lX\n", (UINTN)(VOID *)mFtpmCont= rolArea)); - DEBUG ((EFI_D_INFO, "CommandSize: 0x%lX, ResponseSize: 0x%lX \n", mFtpmC= ontrolArea->CommandSize, mFtpmControlArea->ResponseSize)); + DEBUG ((DEBUG_INFO, "FtpmControlArea: 0x%lX\n", (UINTN)(VOID *)mFtpmCont= rolArea)); + DEBUG ((DEBUG_INFO, "CommandSize: 0x%lX, ResponseSize: 0x%lX \n", mFtpmC= ontrolArea->CommandSize, mFtpmControlArea->ResponseSize)); =20 Status =3D AssignMemory32Fixed (Table, (UINT32)mFtpmControlArea->Command= Address, (UINT32)mFtpmControlArea->ResponseAddress); ASSERT_EFI_ERROR (Status); @@ -813,18 +813,18 @@ InitializeTcgSmm ( EFI_SMM_SW_REGISTER_CONTEXT SwContext; EFI_HANDLE SwHandle; =20 - DEBUG ((EFI_D_INFO, "InitializeTcgSmm Entry \n")); + DEBUG ((DEBUG_INFO, "InitializeTcgSmm Entry \n")); if (!CompareGuid (PcdGetPtr (PcdTpmInstanceGuid), &gEfiTpmDeviceInstance= Tpm20DtpmGuid)) { - DEBUG ((EFI_D_ERROR, "No TPM2 DTPM instance required!\n")); + DEBUG ((DEBUG_ERROR, "No TPM2 DTPM instance required!\n")); return EFI_UNSUPPORTED; } =20 // if (!GetFtpmControlArea(&mFtpmControlArea)) { - // DEBUG ((EFI_D_ERROR, "Get fTPM Control Area failed!\n")); + // DEBUG ((DEBUG_ERROR, "Get fTPM Control Area failed!\n")); // return EFI_UNSUPPORTED; // } mFtpmControlArea =3D (VOID *)(UINTN)PcdGet64 (PcdTpmBaseAddress); - DEBUG ((EFI_D_INFO, "Get PcdTpmBaseAddress:%x\n", mFtpmControlArea)); + DEBUG ((DEBUG_INFO, "Get PcdTpmBaseAddress:%x\n", mFtpmControlArea)); Status =3D PublishAcpiTable (); ASSERT_EFI_ERROR (Status); =20 @@ -841,7 +841,7 @@ InitializeTcgSmm ( } =20 mTcgNvs->PhysicalPresence.SoftwareSmi =3D (UINT8)SwContext.SwSmiInputVal= ue; - DEBUG ((EFI_D_INFO, "PhysicalPresence SoftwareSmi: 0x%X\n", (UINT8)SwCon= text.SwSmiInputValue)); + DEBUG ((DEBUG_INFO, "PhysicalPresence SoftwareSmi: 0x%X\n", (UINT8)SwCon= text.SwSmiInputValue)); =20 SwContext.SwSmiInputValue =3D (UINTN)-1; Status =3D SwDispatch->Register (SwDispatch, MemoryCl= earCallback, &SwContext, &SwHandle); @@ -851,7 +851,7 @@ InitializeTcgSmm ( } =20 mTcgNvs->MemoryClear.SoftwareSmi =3D (UINT8)SwContext.SwSmiInputValue; - DEBUG ((EFI_D_INFO, "MemoryClear SoftwareSmi: 0x%X\n", (UINT8)SwContext.= SwSmiInputValue)); + DEBUG ((DEBUG_INFO, "MemoryClear SoftwareSmi: 0x%X\n", (UINT8)SwContext.= SwSmiInputValue)); =20 // // Locate SmmVariableProtocol. diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/Tcg2Co= nfig/Tcg2ConfigPeim.c b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg= /Tcg/Tcg2Config/Tcg2ConfigPeim.c index bbbcba6e8b..07967017c9 100644 --- a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/Tcg2Config/Tc= g2ConfigPeim.c +++ b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/Tcg2Config/Tc= g2ConfigPeim.c @@ -113,11 +113,11 @@ Tcg2ConfigPeimEntryPoint ( // // Although we have SetupVariable info, we still need detect TPM device = manually. // - DEBUG ((EFI_D_INFO, "Tcg2Configuration.TpmDevice from Setup: %x\n", Tcg2= Configuration.TpmDevice)); + DEBUG ((DEBUG_INFO, "Tcg2Configuration.TpmDevice from Setup: %x\n", Tcg2= Configuration.TpmDevice)); =20 if (PcdGetBool (PcdTpmAutoDetection)) { TpmDevice =3D DetectTpmDevice (Tcg2Configuration.TpmDevice); - DEBUG ((EFI_D_INFO, "TpmDevice final: %x\n", TpmDevice)); + DEBUG ((DEBUG_INFO, "TpmDevice final: %x\n", TpmDevice)); if (TpmDevice !=3D TPM_DEVICE_NULL) { Tcg2Configuration.TpmDevice =3D TpmDevice; } @@ -138,7 +138,7 @@ Tcg2ConfigPeimEntryPoint ( Size =3D sizeof (mTpmInstanceId[Index].TpmInstanceGuid); Status =3D PcdSetPtrS (PcdTpmInstanceGuid, &Size, &mTpmInstanceId[In= dex].TpmInstanceGuid); ASSERT_EFI_ERROR (Status); - DEBUG ((EFI_D_INFO, "TpmDevice PCD: %g\n", &mTpmInstanceId[Index].Tp= mInstanceGuid)); + DEBUG ((DEBUG_INFO, "TpmDevice PCD: %g\n", &mTpmInstanceId[Index].Tp= mInstanceGuid)); break; } } diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/Tcg2Co= nfig/TpmDetection.c b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/T= cg/Tcg2Config/TpmDetection.c index e301295256..2901fba395 100644 --- a/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/Tcg2Config/Tp= mDetection.c +++ b/Platform/AMD/VanGoghBoard/Override/edk2/SecurityPkg/Tcg/Tcg2Config/Tp= mDetection.c @@ -65,12 +65,11 @@ DetectTpmDevice ( Status =3D PeiServicesGetBootMode (&BootMode); ASSERT_EFI_ERROR (Status); =20 - // // In S3, we rely on normal boot Detection, because we save to ReadOnly = Variable in normal boot. // if (BootMode =3D=3D BOOT_ON_S3_RESUME) { - DEBUG ((EFI_D_INFO, "DetectTpmDevice: S3 mode\n")); + DEBUG ((DEBUG_INFO, "DetectTpmDevice: S3 mode\n")); =20 Status =3D PeiServicesLocatePpi (&gEfiPeiReadOnlyVariable2PpiGuid, 0, = NULL, (VOID **)&VariablePpi); ASSERT_EFI_ERROR (Status); @@ -89,13 +88,13 @@ DetectTpmDevice ( (Tcg2DeviceDetection.TpmDeviceDetected >=3D TPM_DEVICE_MIN) && (Tcg2DeviceDetection.TpmDeviceDetected <=3D TPM_DEVICE_MAX)) { - DEBUG ((EFI_D_INFO, "TpmDevice from DeviceDetection: %x\n", Tcg2Devi= ceDetection.TpmDeviceDetected)); + DEBUG ((DEBUG_INFO, "TpmDevice from DeviceDetection: %x\n", Tcg2Devi= ceDetection.TpmDeviceDetected)); Status =3D Tpm2Startup (TPM_SU_STATE); return Tcg2DeviceDetection.TpmDeviceDetected; } } =20 - DEBUG ((EFI_D_INFO, "DetectTpmDevice:\n")); + DEBUG ((DEBUG_INFO, "DetectTpmDevice:\n")); =20 Status =3D Tpm2RequestUseTpm (); if (EFI_ERROR (Status)) { @@ -106,7 +105,7 @@ DetectTpmDevice ( } =20 Status =3D Tpm2Startup (TPM_SU_CLEAR); - DEBUG ((EFI_D_INFO, "Tpm2Startup: %r\n", Status)); + DEBUG ((DEBUG_INFO, "Tpm2Startup: %r\n", Status)); if (EFI_ERROR (Status)) { return TPM_DEVICE_NULL; } diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/Smm= CpuFeaturesLib/SmmCpuFeaturesLibCommon.c b/Platform/AMD/VanGoghBoard/Overri= de/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c index 7b07425336..298e074a29 100644 --- a/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCpuFeat= uresLib/SmmCpuFeaturesLibCommon.c +++ b/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCpuFeat= uresLib/SmmCpuFeaturesLibCommon.c @@ -7,6 +7,7 @@ **/ =20 /* This file includes code originally published under the following licens= e. */ + /** @file Implementation shared across all library instances. =20 @@ -215,12 +216,13 @@ SmmCpuFeaturesInitializeProcessor ( // // Configure SMBASE. // - CpuState =3D (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMB= ASE + SMRAM_SAVE_STATE_MAP_OFFSET); + CpuState =3D (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_= SAVE_STATE_MAP_OFFSET); if (mSmmSaveStateRegisterLma =3D=3D EFI_SMM_SAVE_STATE_REGISTER_LMA_32BI= T) { CpuState->x86.SMBASE =3D (UINT32)CpuHotPlugData->SmBase[CpuIndex]; } else { CpuState->x64.SMBASE =3D (UINT32)CpuHotPlugData->SmBase[CpuIndex]; } + // // Intel(R) 64 and IA-32 Architectures Software Developer's Manual // Volume 3C, Section 35.2 MSRs in the Intel(R) Core(TM) 2 Processor Fam= ily @@ -240,6 +242,7 @@ SmmCpuFeaturesInitializeProcessor ( } } } + // // If SMRR is supported, then program SMRR base/mask MSRs. // The EFI_MSR_SMRR_PHYS_MASK_VALID bit is not set until the first norma= l SMI. diff --git a/Platform/AMD/VanGoghBoard/Readme.md b/Platform/AMD/VanGoghBoar= d/Readme.md new file mode 100644 index 0000000000..59f5e92361 --- /dev/null +++ b/Platform/AMD/VanGoghBoard/Readme.md @@ -0,0 +1,67 @@ +This document introduces how AMD create a EDK II based sample platform BIO= S for AMD Chachani-based reference board. +Customer can reference this document to study EDK2 BIOS integration. + +# How to build + +## The below steps are verified on Microsoft Windows 10 64-bit. +1.Install latest Microsoft Visual Studio 2017 Professional version(15.9.40= or newer) in the build machine ,make sure + that Desktop development with C++ was selected when installing. And sele= cted MSVC & Windows 10 SDK tool when installing. +2.Install Python 3.9.x (python-3.9.13-amd64.exe), make sure path is "C:\Py= thon39". +3.Install NASM (nasm-2.15.05-installer-x64.exe), and make sure path is "C:= \Nasm". (http://www.nasm.us/) +4.Download and extract iasl-win-20130117.zip from https://acpica.org/sites= /acpica/files/iasl-win-20130117.zip, + and copy iasl.exe to C:\ASL. +5.Download and install ActivePerl-5.24.3.2404-MSWin32-x64-404865.exe, copy= folders Perl64\bin and Perl64\lib to correct path + at Buildrom.bat. +6.Download and install OpenSSL https://github.com/openssl/openssl/archive/= OpenSSL_1_0_1e.zip. And make sure OPENSSL_PATH set + the correct path at GenCapsule.bat. + +## Linux build environment preparation + +### Common Environment +Just like Windows environment, you need to install several common tools: I= ASL & NASM. You may refer to your distribution's +instructions. E.g., apt install iasl nasm in Ubuntu, or pacman -S iasl nas= m in Archlinux/SteamOS.Some distributions lacks +developer packages by default. E.g., on Ubuntu, you may install uuid-dev e= xplicitly by apt install uuid-dev.Python3 is +built-in for most Linux distributions. You may install it manually if your= distribution lacks of it. + +### GCC Environment +GCC is built-in for most Linux distributions. Use gcc --version to check i= ts version and ensure its major version > 5. +Also, make sure binutils is installed. Use ld --version to check its versi= on. If gcc & binutils are not installed, +you may refer to your distribution's instructions. + +### Clang Environment +For license reason, Clang is NOT included in most distributions. You may i= nstall manually with your distribution's instructions. +E.g., apt install llvm clang lld in Ubuntu, or pacman -S llvm clang lld in= Archlinux/SteamOS. +Use clang --version to check Clang's version and ensure its major version = > 9. +Use lld-link --version to check LLD's version and ensure its major version= > 9. + +## Obtaining source code +1. Create a new folder (directory) on your local development machine for u= se as your workspace. This example + uses `/work/git/tianocore`, modify as appropriate for your needs. + ``` + $ export WORKSPACE=3D/work/git/tianocore + $ mkdir -p $WORKSPACE + $ cd $WORKSPACE + ``` + +2. Into that folder, clone: + 1. [edk2](https://github.com/tianocore/edk2) + 2. [edk2-platforms](https://github.com/tianocore/edk2-platforms) + 3. [edk2-non-osi](https://github.com/tianocore/edk2-non-osi) + ``` + $ git clone https://github.com/tianocore/edk2.git + $ git checkout (Please follow ReleaseNote.txt to checkout= the specified version) + $ git submodule update --init + ... + $ git clone https://github.com/tianocore/edk2-platforms.git + $ git submodule update --init + ... + $ git clone https://github.com/tianocore/edk2-non-osi.git + $ git checkout (Please follow ReleaseNote.txt to checkout= the specified version) + ``` +## Manual building + +### Windows building +Copy GoZ_ChachaniInt.bat to $WORKSPACE and run it , then execute command = =E2=80=9Cbuildrom.bat=E2=80=9D to generate final BIOS binary 'ChachaniIntUD= K.FD'. + +### Linux building +Copy build.sh to $WORKSPACE and run it to generate final BIOS binary 'Chac= haniIntUDK.FD'. diff --git a/Platform/AMD/VanGoghBoard/ReleaseNote.txt b/Platform/AMD/VanGo= ghBoard/ReleaseNote.txt new file mode 100644 index 0000000000..911dcb7e88 --- /dev/null +++ b/Platform/AMD/VanGoghBoard/ReleaseNote.txt @@ -0,0 +1,14 @@ +**************************************************************************= ** +Chachani reference BIOS Release Notes + +Version: UCC3B16.3824 for VanGogh +ScanID: SWCSD-7813 + +Date: Jan 19 2024 + +tianocore/edk2 version: edk2-stable202208 +tianocore/edk2-non-osi version: 1f4d7849f2344aa770f4de5224188654ae5b0e50 +--------------------------------------------------------------------------= -- +- Description: + +1. Initial ChachaniBoard reference BIOS. \ No newline at end of file diff --git a/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/BootMode.c= b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/BootMode.c index 9102ae2b86..9cefd4e871 100644 --- a/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/BootMode.c +++ b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/BootMode.c @@ -60,7 +60,7 @@ ValidateFvHeader ( EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader; =20 if (BOOT_IN_RECOVERY_MODE =3D=3D *BootMode) { - DEBUG ((EFI_D_INFO, "Boot mode recovery\n")); + DEBUG ((DEBUG_INFO, "Boot mode recovery\n")); return EFI_SUCCESS; } =20 @@ -144,7 +144,7 @@ UpdateBootMode ( // if (ValidateFvHeader (&NewBootMode) !=3D EFI_SUCCESS) { NewBootMode =3D BOOT_IN_RECOVERY_MODE; - DEBUG ((EFI_D_ERROR, "RECOVERY from corrupt FV\n")); + DEBUG ((DEBUG_ERROR, "RECOVERY from corrupt FV\n")); } =20 if (NewBootMode =3D=3D BOOT_IN_RECOVERY_MODE) { @@ -184,7 +184,7 @@ UpdateBootMode ( if (Status =3D=3D EFI_SUCCESS) { if (Capsule->CheckCapsuleUpdate ((EFI_PEI_SERVICES **)PeiServices) = =3D=3D EFI_SUCCESS) { NewBootMode =3D BOOT_ON_FLASH_UPDATE; - DEBUG ((EFI_D_ERROR, "Setting BootMode to %x\n", BOOT_ON_FLASH_UPD= ATE)); + DEBUG ((DEBUG_ERROR, "Setting BootMode to %x\n", BOOT_ON_FLASH_UPD= ATE)); =20 (*PeiServices)->InstallPpi (PeiServices, &CapsulePpi); } @@ -233,7 +233,7 @@ UpdateBootMode ( strBootMode =3D L"Unknown boot mode"; } // switch (BootMode) =20 - DEBUG ((EFI_D_INFO, "Setting BootMode to %s\n", strBootMode)); + DEBUG ((DEBUG_INFO, "Setting BootMode to %s\n", strBootMode)); Status =3D (*PeiServices)->SetBootMode ( PeiServices, NewBootMode diff --git a/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryCall= back.c b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryCallback= .c index 9ab78b7135..f10ff6a027 100644 --- a/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryCallback.c +++ b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryCallback.c @@ -93,12 +93,12 @@ S3PostScriptTableCallback ( ); ASSERT_EFI_ERROR (Status); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "PeiServicesLocatePpi gPeiSmmControlPpiGuid: %r \= n", Status)); + DEBUG ((DEBUG_ERROR, "PeiServicesLocatePpi gPeiSmmControlPpiGuid: %r \= n", Status)); return Status; } =20 SmiCommand =3D PcdGet8 (PcdFchOemBeforePciRestoreSwSmi); - DEBUG ((EFI_D_INFO, "Trigger SW SMI PcdFchOemBeforePciRestoreSwSmi: 0x%X= \n", SmiCommand)); + DEBUG ((DEBUG_INFO, "Trigger SW SMI PcdFchOemBeforePciRestoreSwSmi: 0x%X= \n", SmiCommand)); SmiCommandSize =3D sizeof (SmiCommand); Status =3D SmmControl->Trigger ( (EFI_PEI_SERVICES **)GetPeiServicesTableP= ointer (), @@ -146,12 +146,12 @@ S3EndOfPeiSignalCallback ( =20 ASSERT_EFI_ERROR (Status); if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "PeiServicesLocatePpi gPeiSmmControlPpiGuid: %r \= n", Status)); + DEBUG ((DEBUG_ERROR, "PeiServicesLocatePpi gPeiSmmControlPpiGuid: %r \= n", Status)); return Status; } =20 SmiCommand =3D PcdGet8 (AcpiRestoreSwSmi); - DEBUG ((EFI_D_INFO, "Trigger SW SMI AcpiRestoreSwSmi: 0x%X\n", SmiComman= d)); + DEBUG ((DEBUG_INFO, "Trigger SW SMI AcpiRestoreSwSmi: 0x%X\n", SmiComman= d)); SmiCommandSize =3D sizeof (SmiCommand); Status =3D SmmControl->Trigger ( (EFI_PEI_SERVICES **)GetPeiServicesTableP= ointer (), @@ -164,7 +164,7 @@ S3EndOfPeiSignalCallback ( ASSERT_EFI_ERROR (Status); =20 SmiCommand =3D PcdGet8 (PcdFchOemAfterPciRestoreSwSmi); - DEBUG ((EFI_D_INFO, "Trigger SW SMI PcdFchOemAfterPciRestoreSwSmi: 0x%X\= n", SmiCommand)); + DEBUG ((DEBUG_INFO, "Trigger SW SMI PcdFchOemAfterPciRestoreSwSmi: 0x%X\= n", SmiCommand)); SmiCommandSize =3D sizeof (SmiCommand); Status =3D SmmControl->Trigger ( (EFI_PEI_SERVICES **)GetPeiServicesTableP= ointer (), @@ -253,7 +253,7 @@ MemoryDiscoveredPpiNotifyCallback ( AsmCpuid (0x80000001, &RegEax, NULL, NULL, NULL); if (((RegEax >> 20) & 0xFF) =3D=3D 0x8) { // For F17: Reserved memory from BootFvBase - (BootFvBase+BootFvSize-1= ) - DEBUG ((EFI_D_INFO, "Family 17: Reserved memory for BFV\n")); + DEBUG ((DEBUG_INFO, "Family 17: Reserved memory for BFV\n")); BuildMemoryAllocationHob ( PcdGet32 (PcdMemoryFvRecoveryBase), PcdGet32 (PcdFlashFvRecoverySize), @@ -261,7 +261,7 @@ MemoryDiscoveredPpiNotifyCallback ( ); } =20 - DEBUG ((EFI_D_INFO, "PcdMemoryFvRecoveryBase: %x,PcdFlashFvMainBase: %x\= n", PcdGet32 (PcdMemoryFvRecoveryBase), PcdGet32 (PcdFlashFvMainBase))); + DEBUG ((DEBUG_INFO, "PcdMemoryFvRecoveryBase: %x,PcdFlashFvMainBase: %x\= n", PcdGet32 (PcdMemoryFvRecoveryBase), PcdGet32 (PcdFlashFvMainBase))); =20 if ((BootMode !=3D BOOT_ON_S3_RESUME) && (BootMode !=3D BOOT_IN_RECOVERY= _MODE)) { #ifndef FV_RECOVERY_MAIN_COMBINE_SUPPORT @@ -294,7 +294,7 @@ MemoryDiscoveredPpiNotifyCallback ( FixedPcdGet32 (PcdFlashAreaBaseAddress), FixedPcdGet32 (PcdFlashAreaSize) ); - DEBUG ((EFI_D_INFO, "FLASH_BASE_ADDRESS : 0x%x\n", FixedPcdGet32 (PcdFla= shAreaBaseAddress))); + DEBUG ((DEBUG_INFO, "FLASH_BASE_ADDRESS : 0x%x\n", FixedPcdGet32 (PcdFla= shAreaBaseAddress))); =20 // // Create a CPU hand-off information diff --git a/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryInst= all.c b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryInstall.c index f58645f2cd..7c1d0924b5 100644 --- a/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryInstall.c +++ b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryInstall.c @@ -280,15 +280,15 @@ InstallEfiMemory ( ); ASSERT_EFI_ERROR (Status); =20 - DEBUG ((EFI_D_INFO, "NumRanges: %d\n", NumRanges)); + DEBUG ((DEBUG_INFO, "NumRanges: %d\n", NumRanges)); =20 - DEBUG ((EFI_D_INFO, "GetMemoryMap:\n")); + DEBUG ((DEBUG_INFO, "GetMemoryMap:\n")); for (Index =3D 0; Index < NumRanges; Index++) { - DEBUG ((EFI_D_INFO, "Index: %d ", Index)); - DEBUG ((EFI_D_INFO, "RangeLength: 0x%016lX\t", MemoryMap[Index].RangeL= ength)); - DEBUG ((EFI_D_INFO, "PhysicalAddress: 0x%016lX\t", MemoryMap[Index].Ph= ysicalAddress)); - DEBUG ((EFI_D_INFO, "CpuAddress: 0x%016lX\t", MemoryMap[Index].CpuAddr= ess)); - DEBUG ((EFI_D_INFO, "Type: %d\n", MemoryMap[Index].Type)); + DEBUG ((DEBUG_INFO, "Index: %d ", Index)); + DEBUG ((DEBUG_INFO, "RangeLength: 0x%016lX\t", MemoryMap[Index].RangeL= ength)); + DEBUG ((DEBUG_INFO, "PhysicalAddress: 0x%016lX\t", MemoryMap[Index].Ph= ysicalAddress)); + DEBUG ((DEBUG_INFO, "CpuAddress: 0x%016lX\t", MemoryMap[Index].CpuAddr= ess)); + DEBUG ((DEBUG_INFO, "Type: %d\n", MemoryMap[Index].Type)); } =20 // @@ -313,9 +313,9 @@ InstallEfiMemory ( PeiMemoryIndex =3D 0; =20 for (Index =3D 0; Index < NumRanges; Index++) { - DEBUG ((EFI_D_INFO, "Found 0x%lx bytes at ", MemoryMap[Index].RangeLen= gth)); - DEBUG ((EFI_D_INFO, "0x%lx.\t", MemoryMap[Index].PhysicalAddress)); - DEBUG ((EFI_D_INFO, "Type: %d.\n", MemoryMap[Index].Type)); + DEBUG ((DEBUG_INFO, "Found 0x%lx bytes at ", MemoryMap[Index].RangeLen= gth)); + DEBUG ((DEBUG_INFO, "0x%lx.\t", MemoryMap[Index].PhysicalAddress)); + DEBUG ((DEBUG_INFO, "Type: %d.\n", MemoryMap[Index].Type)); =20 if ((MemoryMap[Index].Type =3D=3D DualChannelDdrMainMemory) && (MemoryMap[Index].PhysicalAddress + MemoryMap[Index].RangeLength <= MAX_ADDRESS) && @@ -367,7 +367,7 @@ InstallEfiMemory ( if (Status =3D=3D EFI_SUCCESS) { CapsuleBuffer =3D LargeMemRangeBuf; CapsuleBufferLength =3D LargeMemRangeBufLen; - DEBUG ((EFI_D_INFO, "CapsuleBuffer: %x, CapsuleBufferLength: %x\n", = CapsuleBuffer, CapsuleBufferLength)); + DEBUG ((DEBUG_INFO, "CapsuleBuffer: %x, CapsuleBufferLength: %x\n", = CapsuleBuffer, CapsuleBufferLength)); =20 // // Call the Capsule PPI Coalesce function to coalesce the capsule da= ta. @@ -568,7 +568,7 @@ InstallEfiMemory ( // CopyMem (&DescriptorAcpiVariable, &SmramHobDescriptorBlock->Descriptor[S= mramRanges-1], sizeof (EFI_SMRAM_DESCRIPTOR)); DescriptorAcpiVariable.CpuStart +=3D RESERVED_CPU_S3_SAVE_OFFSET; - DEBUG ((EFI_D_INFO, "gEfiAcpiVariableGuid CpuStart: 0x%X\n", (UINTN)Desc= riptorAcpiVariable.CpuStart)); + DEBUG ((DEBUG_INFO, "gEfiAcpiVariableGuid CpuStart: 0x%X\n", (UINTN)Desc= riptorAcpiVariable.CpuStart)); BuildGuidDataHob ( &gEfiAcpiVariableGuid, &DescriptorAcpiVariable, @@ -630,19 +630,19 @@ InstallS3Memory ( &NumRanges ); ASSERT_EFI_ERROR (Status); - DEBUG ((EFI_D_INFO, "NumRanges =3D 0x%x\n", NumRanges)); + DEBUG ((DEBUG_INFO, "NumRanges =3D 0x%x\n", NumRanges)); =20 // // Install physical memory descriptor hobs for each memory range. // SmramRanges =3D 0; - DEBUG ((EFI_D_INFO, "GetMemoryMap:\n")); + DEBUG ((DEBUG_INFO, "GetMemoryMap:\n")); for (Index =3D 0; Index < NumRanges; Index++) { - DEBUG ((EFI_D_INFO, "Index: %d ", Index)); - DEBUG ((EFI_D_INFO, "RangeLength: 0x%016lX\t", MemoryMap[Index].RangeL= ength)); - DEBUG ((EFI_D_INFO, "PhysicalAddress: 0x%016lX\t", MemoryMap[Index].Ph= ysicalAddress)); - DEBUG ((EFI_D_INFO, "CpuAddress: 0x%016lX\t", MemoryMap[Index].CpuAddr= ess)); - DEBUG ((EFI_D_INFO, "Type: %d\n", MemoryMap[Index].Type)); + DEBUG ((DEBUG_INFO, "Index: %d ", Index)); + DEBUG ((DEBUG_INFO, "RangeLength: 0x%016lX\t", MemoryMap[Index].RangeL= ength)); + DEBUG ((DEBUG_INFO, "PhysicalAddress: 0x%016lX\t", MemoryMap[Index].Ph= ysicalAddress)); + DEBUG ((DEBUG_INFO, "CpuAddress: 0x%016lX\t", MemoryMap[Index].CpuAddr= ess)); + DEBUG ((DEBUG_INFO, "Type: %d\n", MemoryMap[Index].Type)); if ((MemoryMap[Index].PhysicalAddress > 0x100000) && ((MemoryMap[Index].Type =3D=3D DualChannelDdrSmramCacheable) || (MemoryMap[Index].Type =3D=3D DualChannelDdrSmramNonCacheable))) @@ -652,7 +652,7 @@ InstallS3Memory ( } =20 ASSERT (SmramRanges > 0); - DEBUG ((EFI_D_INFO, "SmramRanges =3D 0x%x\n", SmramRanges)); + DEBUG ((DEBUG_INFO, "SmramRanges =3D 0x%x\n", SmramRanges)); =20 // // Allocate one extra EFI_SMRAM_DESCRIPTOR to describe a page of SMRAM m= emory that contains a pointer @@ -663,22 +663,22 @@ InstallS3Memory ( BufferSize +=3D ((SmramRanges) * sizeof (EFI_SMRAM_DESCRIPTOR)); } =20 - DEBUG ((EFI_D_INFO, "BufferSize =3D 0x%x\n", BufferSize)); + DEBUG ((DEBUG_INFO, "BufferSize =3D 0x%x\n", BufferSize)); =20 Hob.Raw =3D BuildGuidHob ( &gEfiSmmPeiSmramMemoryReserveGuid, BufferSize ); ASSERT (Hob.Raw); - DEBUG ((EFI_D_INFO, "gEfiSmmPeiSmramMemoryReserveGuid/SmramHobDescriptor= Block: 0x%X \n", (UINTN)Hob.Raw)); + DEBUG ((DEBUG_INFO, "gEfiSmmPeiSmramMemoryReserveGuid/SmramHobDescriptor= Block: 0x%X \n", (UINTN)Hob.Raw)); =20 SmramHobDescriptorBlock =3D (EFI_SMRAM_HOB_D= ESCRIPTOR_BLOCK *)(Hob.Raw); SmramHobDescriptorBlock->NumberOfSmmReservedRegions =3D SmramRanges + 1; =20 SmramIndex =3D 0; for (Index =3D 0; Index < NumRanges; Index++) { - DEBUG ((EFI_D_INFO, "Index: 0x%X \t", Index)); - DEBUG ((EFI_D_INFO, "SmramIndex: 0x%X \n", SmramIndex)); + DEBUG ((DEBUG_INFO, "Index: 0x%X \t", Index)); + DEBUG ((DEBUG_INFO, "SmramIndex: 0x%X \n", SmramIndex)); if ((MemoryMap[Index].PhysicalAddress > 0x100000) && ((MemoryMap[Index].Type =3D=3D DualChannelDdrSmramCacheable) || (MemoryMap[Index].Type =3D=3D DualChannelDdrSmramNonCacheable)) @@ -696,11 +696,11 @@ InstallS3Memory ( SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState =3D EF= I_SMRAM_CLOSED; } =20 - DEBUG ((EFI_D_INFO, "SmramIndex: 0x%X \n", SmramIndex)); - DEBUG ((EFI_D_INFO, "PhysicalStart: 0x%X\n", (UINTN)SmramHobDescript= orBlock->Descriptor[SmramIndex].PhysicalStart)); - DEBUG ((EFI_D_INFO, "CpuStart : 0x%X\n", (UINTN)SmramHobDescript= orBlock->Descriptor[SmramIndex].CpuStart)); - DEBUG ((EFI_D_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescript= orBlock->Descriptor[SmramIndex].PhysicalSize)); - DEBUG ((EFI_D_INFO, "RegionState : 0x%X\n", (UINTN)SmramHobDescript= orBlock->Descriptor[SmramIndex].RegionState)); + DEBUG ((DEBUG_INFO, "SmramIndex: 0x%X \n", SmramIndex)); + DEBUG ((DEBUG_INFO, "PhysicalStart: 0x%X\n", (UINTN)SmramHobDescript= orBlock->Descriptor[SmramIndex].PhysicalStart)); + DEBUG ((DEBUG_INFO, "CpuStart : 0x%X\n", (UINTN)SmramHobDescript= orBlock->Descriptor[SmramIndex].CpuStart)); + DEBUG ((DEBUG_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescript= orBlock->Descriptor[SmramIndex].PhysicalSize)); + DEBUG ((DEBUG_INFO, "RegionState : 0x%X\n", (UINTN)SmramHobDescript= orBlock->Descriptor[SmramIndex].RegionState)); if ( SmramIndex =3D=3D SmramRanges - 1) { // // one extra EFI_SMRAM_DESCRIPTOR for a page of SMRAM memory @@ -712,14 +712,14 @@ InstallS3Memory ( SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize =3D= MemoryMap[Index].RangeLength - EFI_PAGE_SIZE; SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState =3D= SmramHobDescriptorBlock->Descriptor[SmramIndex-1].RegionState; SmramHobDescriptorBlock->Descriptor[SmramIndex-1].RegionState |=3D= EFI_ALLOCATED; - DEBUG ((EFI_D_INFO, "SmramIndex: 0x%X \n", SmramIndex)); - DEBUG ((EFI_D_INFO, "PhysicalStart: 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex].PhysicalStart)); - DEBUG ((EFI_D_INFO, "CpuStart : 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex].CpuStart)); - DEBUG ((EFI_D_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex].PhysicalSize)); - DEBUG ((EFI_D_INFO, "RegionState : 0x%X\n\n", (UINTN)SmramHobDesc= riptorBlock->Descriptor[SmramIndex].RegionState)); - - DEBUG ((EFI_D_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex-1].PhysicalSize)); - DEBUG ((EFI_D_INFO, "RegionState : 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex-1].RegionState)); + DEBUG ((DEBUG_INFO, "SmramIndex: 0x%X \n", SmramIndex)); + DEBUG ((DEBUG_INFO, "PhysicalStart: 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex].PhysicalStart)); + DEBUG ((DEBUG_INFO, "CpuStart : 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex].CpuStart)); + DEBUG ((DEBUG_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex].PhysicalSize)); + DEBUG ((DEBUG_INFO, "RegionState : 0x%X\n\n", (UINTN)SmramHobDesc= riptorBlock->Descriptor[SmramIndex].RegionState)); + + DEBUG ((DEBUG_INFO, "PhysicalSize : 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex-1].PhysicalSize)); + DEBUG ((DEBUG_INFO, "RegionState : 0x%X\n", (UINTN)SmramHobDescri= ptorBlock->Descriptor[SmramIndex-1].RegionState)); } =20 SmramIndex++; @@ -731,7 +731,7 @@ InstallS3Memory ( // CopyMem (&DescriptorAcpiVariable, &SmramHobDescriptorBlock->Descriptor[S= mramRanges-1], sizeof (EFI_SMRAM_DESCRIPTOR)); DescriptorAcpiVariable.CpuStart +=3D RESERVED_CPU_S3_SAVE_OFFSET; - DEBUG ((EFI_D_INFO, "gEfiAcpiVariableGuid CpuStart: 0x%X\n", (UINTN)Desc= riptorAcpiVariable.CpuStart)); + DEBUG ((DEBUG_INFO, "gEfiAcpiVariableGuid CpuStart: 0x%X\n", (UINTN)Desc= riptorAcpiVariable.CpuStart)); BuildGuidDataHob ( &gEfiAcpiVariableGuid, &DescriptorAcpiVariable, @@ -743,20 +743,20 @@ InstallS3Memory ( // install it as PEI Memory. // =20 - DEBUG ((EFI_D_INFO, "TSEG Base =3D 0x%08x\n", SmramHobDescriptorBlock->D= escriptor[SmramRanges].PhysicalStart)); - DEBUG ((EFI_D_INFO, "SmramRanges =3D 0x%x\n", SmramRanges)); + DEBUG ((DEBUG_INFO, "TSEG Base =3D 0x%08x\n", SmramHobDescriptorBlock->D= escriptor[SmramRanges].PhysicalStart)); + DEBUG ((DEBUG_INFO, "SmramRanges =3D 0x%x\n", SmramRanges)); S3MemoryRangeData =3D (RESERVED_ACPI_S3_RANGE *)(UINTN) (SmramHobDescriptorBlock->Descriptor[SmramRanges].Ph= ysicalStart + RESERVED_ACPI_S3_RANGE_OFFSET); - DEBUG ((EFI_D_INFO, "S3MemoryRangeData =3D 0x%08x\n", (UINTN)S3MemoryRan= geData)); + DEBUG ((DEBUG_INFO, "S3MemoryRangeData =3D 0x%08x\n", (UINTN)S3MemoryRan= geData)); =20 - DEBUG ((EFI_D_INFO, "S3MemoryRangeData->AcpiReservedMemoryBase =3D 0x%X\= n", (UINTN)S3MemoryRangeData->AcpiReservedMemoryBase)); - DEBUG ((EFI_D_INFO, "S3MemoryRangeData->AcpiReservedMemorySize =3D 0x%X\= n", (UINTN)S3MemoryRangeData->AcpiReservedMemorySize)); - DEBUG ((EFI_D_INFO, "S3MemoryRangeData->SystemMemoryLength =3D 0x%X\n", = (UINTN)S3MemoryRangeData->SystemMemoryLength)); + DEBUG ((DEBUG_INFO, "S3MemoryRangeData->AcpiReservedMemoryBase =3D 0x%X\= n", (UINTN)S3MemoryRangeData->AcpiReservedMemoryBase)); + DEBUG ((DEBUG_INFO, "S3MemoryRangeData->AcpiReservedMemorySize =3D 0x%X\= n", (UINTN)S3MemoryRangeData->AcpiReservedMemorySize)); + DEBUG ((DEBUG_INFO, "S3MemoryRangeData->SystemMemoryLength =3D 0x%X\n", = (UINTN)S3MemoryRangeData->SystemMemoryLength)); =20 S3MemoryBase =3D (UINTN)(S3MemoryRangeData->AcpiReservedMemoryBase); - DEBUG ((EFI_D_INFO, "S3MemoryBase =3D 0x%08x\n", S3MemoryBase)); + DEBUG ((DEBUG_INFO, "S3MemoryBase =3D 0x%08x\n", S3MemoryBase)); S3MemorySize =3D (UINTN)(S3MemoryRangeData->AcpiReservedMemorySize); - DEBUG ((EFI_D_INFO, "S3MemorySize =3D 0x%08x\n", S3MemorySize)); + DEBUG ((DEBUG_INFO, "S3MemorySize =3D 0x%08x\n", S3MemorySize)); =20 Status =3D PeiServicesInstallPeiMemory (S3MemoryBase, S3MemorySize); ASSERT_EFI_ERROR (Status); @@ -781,7 +781,7 @@ InstallS3Memory ( S3MemoryRangeData->SystemMemoryLength - 0x100000 ); =20 - DEBUG ((EFI_D_INFO, "MemoryBegin: 0x%lX, MemoryLength: 0x%lX\n", 0x10000= 0, S3MemoryRangeData->SystemMemoryLength - 0x100000)); + DEBUG ((DEBUG_INFO, "MemoryBegin: 0x%lX, MemoryLength: 0x%lX\n", 0x10000= 0, S3MemoryRangeData->SystemMemoryLength - 0x100000)); =20 for (Index =3D 0; Index < NumRanges; Index++) { if ((MemoryMap[Index].Type =3D=3D DualChannelDdrMainMemory) && @@ -800,10 +800,10 @@ InstallS3Memory ( MemoryMap[Index].PhysicalAddress, MemoryMap[Index].RangeLength ); - DEBUG ((EFI_D_INFO, "MemoryBegin: 0x%lX, MemoryLength: 0x%lX\n", Mem= oryMap[Index].PhysicalAddress, MemoryMap[Index].RangeLength)); + DEBUG ((DEBUG_INFO, "MemoryBegin: 0x%lX, MemoryLength: 0x%lX\n", Mem= oryMap[Index].PhysicalAddress, MemoryMap[Index].RangeLength)); =20 - DEBUG ((EFI_D_INFO, "Build resource HOB for Legacy Region on S3 patc= h :")); - DEBUG ((EFI_D_INFO, " Memory Base:0x%lX Length:0x%lX\n", MemoryMap[I= ndex].PhysicalAddress, MemoryMap[Index].RangeLength)); + DEBUG ((DEBUG_INFO, "Build resource HOB for Legacy Region on S3 patc= h :")); + DEBUG ((DEBUG_INFO, " Memory Base:0x%lX Length:0x%lX\n", MemoryMap[I= ndex].PhysicalAddress, MemoryMap[Index].RangeLength)); } } =20 @@ -890,7 +890,7 @@ GetPlatformMemorySize ( =20 *MemorySize =3D PEI_MIN_MEMORY_SIZE; for (Index =3D 0; Index < DataSize / sizeof (EFI_MEMORY_TYPE_INFORMATI= ON); Index++) { - DEBUG ((EFI_D_INFO, "Index %d, Page: %d\n", Index, MemoryData[Index]= .NumberOfPages)); + DEBUG ((DEBUG_INFO, "Index %d, Page: %d\n", Index, MemoryData[Index]= .NumberOfPages)); *MemorySize +=3D MemoryData[Index].NumberOfPages * EFI_PAGE_SIZE; } =20 @@ -904,7 +904,7 @@ GetPlatformMemorySize ( ); } =20 - DEBUG ((EFI_D_INFO, "GetPlatformMemorySize, MemorySize: 0x%lX\n", *Memor= ySize)); + DEBUG ((DEBUG_INFO, "GetPlatformMemorySize, MemorySize: 0x%lX\n", *Memor= ySize)); return EFI_SUCCESS; } =20 @@ -937,7 +937,7 @@ MemoryInfoHobPpiNotifyCallback ( ASSERT_EFI_ERROR (Status); =20 if (BootMode =3D=3D BOOT_ON_S3_RESUME) { - DEBUG ((EFI_D_INFO, "Following BOOT_ON_S3_RESUME boot path.\n")); + DEBUG ((DEBUG_INFO, "Following BOOT_ON_S3_RESUME boot path.\n")); =20 Status =3D InstallS3Memory (PeiServices, BootMode); ASSERT_EFI_ERROR (Status); diff --git a/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryPeim= .c b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryPeim.c index 5f6aefa9b1..9461050604 100644 --- a/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryPeim.c +++ b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryPeim.c @@ -178,7 +178,7 @@ SetPeiCacheMode ( break; } =20 - DEBUG ((EFI_D_INFO, "Base=3D%lx, Mask=3D%lx\n", MtrrSetting.Variables.= Mtrr[Index].Base, MtrrSetting.Variables.Mtrr[Index].Mask)); + DEBUG ((DEBUG_INFO, "Base=3D%lx, Mask=3D%lx\n", MtrrSetting.Variables.= Mtrr[Index].Base, MtrrSetting.Variables.Mtrr[Index].Mask)); } =20 // @@ -291,7 +291,7 @@ GetAvailableMemoryRanges ( AMD_MEMORY_RANGE_DESCRIPTOR *Range; UINT32 Index; =20 - DEBUG ((EFI_D_INFO, "GetAvailableMemoryRanges++\n")); + DEBUG ((DEBUG_INFO, "GetAvailableMemoryRanges++\n")); if ((*NumRanges) < MAX_RANGES) { return EFI_BUFFER_TOO_SMALL; } @@ -312,7 +312,7 @@ GetAvailableMemoryRanges ( MemoryMap[*NumRanges].RangeLength =3D Range->Size; MemoryMap[*NumRanges].Type =3D DualChannelDdrMainMemory= ; (*NumRanges)++; - DEBUG ((EFI_D_INFO, " Base:0x%016lX, Size: 0x%016lX\n", Range->Bas= e, Range->Size)); + DEBUG ((DEBUG_INFO, " Base:0x%016lX, Size: 0x%016lX\n", Range->Bas= e, Range->Size)); } } } @@ -344,7 +344,7 @@ GetReservedMemoryRanges ( AMD_MEMORY_RANGE_DESCRIPTOR *Range; UINT32 Index; =20 - DEBUG ((EFI_D_INFO, "GetReservedMemoryRanges\n")); + DEBUG ((DEBUG_INFO, "GetReservedMemoryRanges\n")); if ((*NumRanges) < MAX_RANGES) { return EFI_BUFFER_TOO_SMALL; } @@ -366,7 +366,7 @@ GetReservedMemoryRanges ( MemoryMap[*NumRanges].RangeLength =3D Range->Size; MemoryMap[*NumRanges].Type =3D DualChannelDdrReserved= Memory; (*NumRanges)++; - DEBUG ((EFI_D_INFO, " GetReservedMemoryRanges Base:0x%016lX, Siz= e: 0x%016lX\n", Range->Base, Range->Size)); + DEBUG ((DEBUG_INFO, " GetReservedMemoryRanges Base:0x%016lX, Siz= e: 0x%016lX\n", Range->Base, Range->Size)); } =20 if (Range->Attribute =3D=3D AMD_MEMORY_ATTRIBUTE_UMA) { @@ -375,7 +375,7 @@ GetReservedMemoryRanges ( MemoryMap[*NumRanges].RangeLength =3D Range->Size; MemoryMap[*NumRanges].Type =3D DualChannelDdrReserved= Memory; (*NumRanges)++; - DEBUG ((EFI_D_INFO, " GetReservedMemoryRanges Base:0x%016lX, Siz= e: 0x%016lX\n", Range->Base, Range->Size)); + DEBUG ((DEBUG_INFO, " GetReservedMemoryRanges Base:0x%016lX, Siz= e: 0x%016lX\n", Range->Base, Range->Size)); } } } diff --git a/Platform/AMD/VanGoghBoard/Universal/PlatformSmbiosDxe/SmbiosTa= ble.c b/Platform/AMD/VanGoghBoard/Universal/PlatformSmbiosDxe/SmbiosTable.c index 29b16380a1..b88ef38b85 100644 --- a/Platform/AMD/VanGoghBoard/Universal/PlatformSmbiosDxe/SmbiosTable.c +++ b/Platform/AMD/VanGoghBoard/Universal/PlatformSmbiosDxe/SmbiosTable.c @@ -166,7 +166,7 @@ SMBIOS_TABLE_TYPE3 gSmbiosType3Template =3D { ChassisStateSafe, //= PowerSupplyState; ChassisStateSafe, //= ThermalState; ChassisSecurityStatusNone, //= SecurityStatus; - { 0, 0, 0, 0 }, //= OemDefined[4]; + { 0, 0, 0, 0}, = // OemDefined[4]; 0, //= Height; 0, //= NumberofPowerCords; 0, //= ContainedElementCount; @@ -362,7 +362,7 @@ SMBIOS_TABLE_TYPE23 gSmbiosType23Template =3D { =20 SMBIOS_TABLE_TYPE32 gSmbiosType32Template =3D { { EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION, sizeof (SMBIOS_TABLE_TYPE32),= 0 }, - { 0, 0, 0, 0, 0, 0 }, = // Reserved[6]; + { 0, 0, = 0, 0, 0, 0}, // Reserved[6]; BootInformationStatusNoError = // BootStatus }; =20 diff --git a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FwBlock= Service.c b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FwBlockS= ervice.c index 5565b69de5..dd7e39affa 100644 --- a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FwBlockService= .c +++ b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FwBlockService= .c @@ -348,7 +348,6 @@ FvbReadBlock ( IN BOOLEAN Virtual ) =20 - { EFI_FVB_ATTRIBUTES_2 Attributes; UINTN LbaAddress; @@ -730,7 +729,6 @@ FvbProtocolGetBlockSize ( OUT UINTN *NumOfBlocks ) =20 - { EFI_FW_VOL_BLOCK_DEVICE *FvbDevice; =20 @@ -1211,24 +1209,25 @@ FlashFdWrite ( ) { EFI_STATUS Status; + Status =3D EFI_SUCCESS; =20 // // TODO: Suggested that this code be "critical section" // WriteAddress -=3D (PcdGet32 (PcdFlashAreaBaseAddress)); - Status =3D mFvbModuleGlobal->SpiProtocol->Execute ( - mFvbModuleGlobal->SpiProtocol, - SPI_OPCODE_WRITE_INDEX, // Opc= odeIndex - 0, // Pre= fixOpcodeIndex - TRUE, // Dat= aCycle - TRUE, // Ato= mic - TRUE, // Shi= ftOut - WriteAddress, // Add= ress - (UINT32)(*NumBytes), // Dat= a Number - Buffer, - EnumSpiRegionBios - ); + Status =3D mFvbModuleGlobal->SpiProtocol->Execute ( + mFvbModuleGlobal->SpiPr= otocol, + SPI_OPCODE_WRITE_INDEX,= // OpcodeIndex + 0, = // PrefixOpcodeIndex + TRUE, = // DataCycle + TRUE, = // Atomic + TRUE, = // ShiftOut + WriteAddress, = // Address + (UINT32)(*NumBytes), = // Data Number + Buffer, + EnumSpiRegionBios + ); =20 AsmWbinvd (); =20 diff --git a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Library/Smb= iosLib.h b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Library/Smbio= sLib.h index 5880eac36e..b3be1a73bc 100644 --- a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Library/SmbiosLib.= h +++ b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Library/SmbiosLib.= h @@ -6,6 +6,7 @@ =20 **/ // This file includes code originally published under the following licens= e. + /** @file Provides library functions for common SMBIOS operations. Only available = to DXE and UEFI module types. diff --git a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/AcpiSmm/AcpiSmm= Platform.c b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/AcpiSmm/AcpiSmm= Platform.c index 383bcec471..2f2781aa0b 100644 --- a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/AcpiSmm/AcpiSmmPlatfor= m.c +++ b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/AcpiSmm/AcpiSmmPlatfor= m.c @@ -153,7 +153,6 @@ InitAcpiSmmPlatform ( IN EFI_SYSTEM_TABLE *SystemTable ) =20 - { EFI_STATUS Status; EFI_GLOBAL_NVS_AREA_PROTOCOL *AcpiNvsProtocol =3D NULL; diff --git a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/SmmAccessPei/Sm= mAccessPei.c b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/SmmAccessPei/= SmmAccessPei.c index 200aebf59c..01a8d04017 100644 --- a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/SmmAccessPei/SmmAccess= Pei.c +++ b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/SmmAccessPei/SmmAccess= Pei.c @@ -142,7 +142,6 @@ LockSmm ( AsmWriteMsr64 (HWCR, Data64); } =20 - /** This routine accepts a request to "open" a region of SMRAM. The region could be legacy ABSEG, HSEG, or TSEG near top of physical memory. @@ -301,7 +300,6 @@ Lock ( return EFI_SUCCESS; } =20 - /** This routine services a user request to discover the SMRAM capabilities of this platform. This will report the possible --=20 2.31.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#114081): https://edk2.groups.io/g/devel/message/114081 Mute This Topic: https://groups.io/mt/103831204/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-