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From: "duke.zhai via groups.io" <duke.zhai=amd.com@groups.io>
To: <devel@edk2.groups.io>
Cc: Eric Xing <eric.xing@amd.com>, Ken Yao <ken.yao@amd.com>,
	Igniculus Fu <igniculus.fu@amd.com>,
	Abner Chang <abner.chang@amd.com>
Subject: [edk2-devel] [PATCH 07/33] AMD/VanGoghBoard: Check in PciPlatform
Date: Thu, 18 Jan 2024 14:50:20 +0800	[thread overview]
Message-ID: <20240118065046.961-8-duke.zhai@amd.com> (raw)
In-Reply-To: <20240118065046.961-1-duke.zhai@amd.com>

From: Duke Zhai <Duke.Zhai@amd.com>


BZ #:4640

BIOS detects current IGPU device ID and install corresponding VBIOS.

Inital PciPlatform module to load VBIOS and to provide interface for

other option ROMs if necessary.



Signed-off-by: Duke Zhai <duke.zhai@amd.com>

Cc: Eric Xing <eric.xing@amd.com>

Cc: Ken Yao <ken.yao@amd.com>

Cc: Igniculus Fu <igniculus.fu@amd.com>

Cc: Abner Chang <abner.chang@amd.com>

---

 .../Include/Protocol/GlobalNvsArea.h          |  70 ++++++

 .../PciPlatform/CommonHeader.h                |  43 ++++

 .../PciPlatform/PciPlatform.c                 | 199 ++++++++++++++++++

 .../PciPlatform/PciPlatform.h                 | 105 +++++++++

 .../PciPlatform/PciPlatform.inf               |  66 ++++++

 5 files changed, 483 insertions(+)

 create mode 100644 Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Include/Protocol/GlobalNvsArea.h

 create mode 100644 Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/CommonHeader.h

 create mode 100644 Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.c

 create mode 100644 Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.h

 create mode 100644 Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.inf



diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Include/Protocol/GlobalNvsArea.h b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Include/Protocol/GlobalNvsArea.h

new file mode 100644

index 0000000000..0c5077f417

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Include/Protocol/GlobalNvsArea.h

@@ -0,0 +1,70 @@

+/** @file

+  GlobalNvsArea.h

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.<BR>

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+**/

+/* This file includes code originally published under the following license. */

+

+/** @file

+Definition of the global NVS area protocol.  This protocol

+publishes the address and format of a global ACPI NVS buffer

+used as a communications buffer between SMM code and ASL code.

+The format is derived from the ACPI reference code, version 0.95.

+Note:  Data structures defined in this protocol are not naturally aligned.

+

+Copyright (c) 2013-2015 Intel Corporation.

+

+SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef _GLOBAL_NVS_AREA_H_

+#define _GLOBAL_NVS_AREA_H_

+

+//

+// Includes

+//

+#define GLOBAL_NVS_DEVICE_ENABLE   1

+#define GLOBAL_NVS_DEVICE_DISABLE  0

+

+//

+// Global NVS Area Protocol GUID

+//

+#define EFI_GLOBAL_NVS_AREA_PROTOCOL_GUID \

+{ 0x74e1e48, 0x8132, 0x47a1, {0x8c, 0x2c, 0x3f, 0x14, 0xad, 0x9a, 0x66, 0xdc} }

+

+//

+// Revision id - Added TPM related fields

+//

+#define GLOBAL_NVS_AREA_RIVISION_1  1

+

+//

+// Extern the GUID for protocol users.

+//

+extern EFI_GUID  gEfiGlobalNvsAreaProtocolGuid;

+

+//

+// Global NVS Area definition

+//

+#pragma pack (1)

+typedef struct {

+  //

+  // Miscellaneous Dynamic Values, the definitions below need to be matched

+  // GNVS definitions in Platform.ASL

+  //

+  UINT32    TopOfMem;               // TOPM

+  UINT8     NbIoApic;               // NAPC

+  UINT32    PcieBaseAddress;        // PCBA

+  UINT32    PcieBaseLimit;          // PCBL

+} EFI_GLOBAL_NVS_AREA;

+#pragma pack ()

+

+//

+// Global NVS Area Protocol

+//

+typedef struct _EFI_GLOBAL_NVS_AREA_PROTOCOL {

+  EFI_GLOBAL_NVS_AREA    *Area;

+} EFI_GLOBAL_NVS_AREA_PROTOCOL;

+

+#endif

diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/CommonHeader.h b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/CommonHeader.h

new file mode 100644

index 0000000000..430d9f51dc

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/CommonHeader.h

@@ -0,0 +1,43 @@

+/** @file

+  Implements CommonHeader.h

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.<BR>

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+/* This file includes code originally published under the following license. */

+

+/** @file

+Common header file shared by all source files.

+

+This file includes package header files, library classes and protocol, PPI & GUID definitions.

+

+Copyright (c) 2013-2015 Intel Corporation.

+

+This  program and the accompanying materials

+are licensed and made available under the terms and conditions of the BSD License

+which accompanies this distribution.  The full text of the license may be found at

+http://opensource.org/licenses/bsd-license.php

+

+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+**/

+

+#ifndef __COMMON_HEADER_H_

+#define __COMMON_HEADER_H_

+

+#include <PiDxe.h>

+

+#include <Protocol/PciPlatform.h>

+#include <Protocol/PciIo.h>

+

+#include <Library/DxeServicesLib.h>

+#include <Library/UefiDriverEntryPoint.h>

+#include <Library/UefiBootServicesTableLib.h>

+#include <Library/UefiRuntimeServicesTableLib.h>

+#include <Library/DebugLib.h>

+#include <Library/IoLib.h>

+#include <Library/PciLib.h>

+

+#endif

diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.c b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.c

new file mode 100644

index 0000000000..733d334075

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.c

@@ -0,0 +1,199 @@

+/** @file

+  Implements PciPlatform.c

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.<BR>

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+/* This file includes code originally published under the following license. */

+

+/** @file

+Registers onboard PCI ROMs with PCI.IO

+

+Copyright (c) 2013-2015 Intel Corporation.

+

+This program and the accompanying materials

+are licensed and made available under the terms and conditions of the BSD License

+which accompanies this distribution.  The full text of the license may be found at

+http://opensource.org/licenses/bsd-license.php

+

+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+

+**/

+

+#include "CommonHeader.h"

+

+#include "PciPlatform.h"

+

+PCI_OPTION_ROM_TABLE  mPciOptionRomTable[] = {

+  { ONBOARD_SPH_VIDEO_OPTION_ROM_FILE_GUID, 0x1002, 0x1435 },

+  { NULL_ROM_FILE_GUID,                     0xffff, 0xffff }

+};

+

+EFI_PCI_PLATFORM_PROTOCOL  mPciPlatform = {

+  PhaseNotify,

+  PlatformPrepController,

+  GetPlatformPolicy,

+  GetPciRom

+};

+

+EFI_HANDLE  mPciPlatformHandle = NULL;

+EFI_HANDLE  mImageHandle       = NULL;

+

+EFI_STATUS

+EFIAPI

+PhaseNotify (

+  IN EFI_PCI_PLATFORM_PROTOCOL                      *This,

+  IN EFI_HANDLE                                     HostBridge,

+  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE  Phase,

+  IN EFI_PCI_CHIPSET_EXECUTION_PHASE                ChipsetPhase

+  )

+{

+  return EFI_UNSUPPORTED;

+}

+

+EFI_STATUS

+EFIAPI

+PlatformPrepController (

+  IN  EFI_PCI_PLATFORM_PROTOCOL                     *This,

+  IN  EFI_HANDLE                                    HostBridge,

+  IN  EFI_HANDLE                                    RootBridge,

+  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS   PciAddress,

+  IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE  Phase,

+  IN  EFI_PCI_CHIPSET_EXECUTION_PHASE               ChipsetPhase

+  )

+{

+  return EFI_UNSUPPORTED;

+}

+

+/**

+  Get PlatformPolicy for VGA IO ALIAS

+

+  @param This       Protocol instance pointer.

+  @param PciPolicy  PCI Platform Policy.

+

+  @retval EFI_SUCCESS

+

+**/

+EFI_STATUS

+EFIAPI

+GetPlatformPolicy (

+  IN  CONST EFI_PCI_PLATFORM_PROTOCOL  *This,

+  OUT       EFI_PCI_PLATFORM_POLICY    *PciPolicy

+  )

+{

+  *PciPolicy |= EFI_RESERVE_VGA_IO_ALIAS;

+  return EFI_SUCCESS;

+}

+

+/**

+  Return a PCI ROM image for the onboard device represented by PciHandle

+

+  @param This       Protocol instance pointer.

+  @param PciHandle  PCI device to return the ROM image for.

+  @param RomImage   PCI Rom Image for onboard device

+  @param RomSize    Size of RomImage in bytes

+

+  @retval EFI_SUCCESS   - RomImage is valid

+  @retval EFI_NOT_FOUND - No RomImage

+

+**/

+EFI_STATUS

+EFIAPI

+GetPciRom (

+  IN  CONST EFI_PCI_PLATFORM_PROTOCOL  *This,

+  IN        EFI_HANDLE                 PciHandle,

+  OUT       VOID                       **RomImage,

+  OUT       UINTN                      *RomSize

+  )

+{

+  EFI_STATUS           Status;

+  EFI_PCI_IO_PROTOCOL  *PciIo;

+  UINTN                Segment;

+  UINTN                Bus;

+  UINTN                Device;

+  UINTN                Function;

+  UINT16               VendorId;

+  UINT16               DeviceId;

+  UINTN                TableIndex;

+

+  Status = gBS->HandleProtocol (

+                  PciHandle,

+                  &gEfiPciIoProtocolGuid,

+                  (VOID **)&PciIo

+                  );

+  if (EFI_ERROR (Status)) {

+    return EFI_NOT_FOUND;

+  }

+

+  PciIo->GetLocation (PciIo, &Segment, &Bus, &Device, &Function);

+

+  PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 0, 1, &VendorId);

+

+  PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 2, 1, &DeviceId);

+

+  //

+  // Loop through table of video option rom descriptions

+  //

+  for (TableIndex = 0; mPciOptionRomTable[TableIndex].VendorId != 0xffff; TableIndex++) {

+    //

+    // See if the PCI device specified by PciHandle matches at device in mPciOptionRomTable

+    //

+    if ((VendorId != mPciOptionRomTable[TableIndex].VendorId) ||

+        (DeviceId != mPciOptionRomTable[TableIndex].DeviceId))

+    {

+      continue;

+    }

+

+    Status = GetSectionFromAnyFv (

+               &mPciOptionRomTable[TableIndex].FileName,

+               EFI_SECTION_RAW,

+               0,

+               RomImage,

+               RomSize

+               );

+

+    if (EFI_ERROR (Status)) {

+      continue;

+    }

+

+    return EFI_SUCCESS;

+  }

+

+  return EFI_NOT_FOUND;

+}

+

+/**

+

+  @param  ImageHandle  Handle of driver image.

+  @param  SystemTable  Pointer to system table.

+

+  @retval EFI_STATUS return status of InstallProtocolInterface.

+

+**/

+EFI_STATUS

+EFIAPI

+PciPlatformDriverEntry (

+  IN EFI_HANDLE        ImageHandle,

+  IN EFI_SYSTEM_TABLE  *SystemTable

+  )

+{

+  EFI_STATUS  Status;

+

+  mImageHandle = ImageHandle;

+

+  //

+  // Install on a new handle

+  //

+  Status = gBS->InstallProtocolInterface (

+                  &mPciPlatformHandle,

+                  &gEfiPciPlatformProtocolGuid,

+                  EFI_NATIVE_INTERFACE,

+                  &mPciPlatform

+                  );

+

+  return Status;

+}

diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.h b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.h

new file mode 100644

index 0000000000..95a3e8816c

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.h

@@ -0,0 +1,105 @@

+/** @file

+  Implements PciPlatform.h

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.<BR>

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+/* This file includes code originally published under the following license. */

+

+/** @file

+This code supports a the private implementation

+of the Legacy BIOS Platform protocol

+

+Copyright (c) 2013-2015 Intel Corporation.

+

+This  program and the accompanying materials

+are licensed and made available under the terms and conditions of the BSD License

+which accompanies this distribution.  The full text of the license may be found at

+http://opensource.org/licenses/bsd-license.php

+

+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+

+**/

+

+#ifndef PCI_PLATFORM_H_

+#define PCI_PLATFORM_H_

+

+#include <IndustryStandard/Pci.h>

+#include <Library/PcdLib.h>

+//

+// Global variables for Option ROMs

+//

+#define NULL_ROM_FILE_GUID \

+{ 0x00000000, 0x0000, 0x0000, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }}

+

+#define ONBOARD_SPH_VIDEO_OPTION_ROM_FILE_GUID \

+{ 0xE7D31EB4, 0x90F3, 0x4A14, {0x8A, 0x28, 0x48, 0xD0, 0x47, 0x42, 0xF8, 0xE1 }}

+

+typedef struct {

+  EFI_GUID    FileName;

+  UINT16      VendorId;

+  UINT16      DeviceId;

+} PCI_OPTION_ROM_TABLE;

+

+EFI_STATUS

+EFIAPI

+PhaseNotify (

+  IN EFI_PCI_PLATFORM_PROTOCOL                      *This,

+  IN EFI_HANDLE                                     HostBridge,

+  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE  Phase,

+  IN EFI_PCI_CHIPSET_EXECUTION_PHASE                ChipsetPhase

+  );

+

+EFI_STATUS

+EFIAPI

+PlatformPrepController (

+  IN  EFI_PCI_PLATFORM_PROTOCOL                     *This,

+  IN  EFI_HANDLE                                    HostBridge,

+  IN  EFI_HANDLE                                    RootBridge,

+  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS   PciAddress,

+  IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE  Phase,

+  IN  EFI_PCI_CHIPSET_EXECUTION_PHASE               ChipsetPhase

+  );

+

+/**

+  Get PlatformPolicy for VGA IO ALIAS

+

+  @param This       Protocol instance pointer.

+  @param PciPolicy  PCI Platform Policy.

+

+  @retval EFI_SUCCESS

+

+**/

+EFI_STATUS

+EFIAPI

+GetPlatformPolicy (

+  IN  CONST EFI_PCI_PLATFORM_PROTOCOL  *This,

+  OUT       EFI_PCI_PLATFORM_POLICY    *PciPolicy

+  );

+

+/**

+  Return a PCI ROM image for the onboard device represented by PciHandle

+

+  @param This       Protocol instance pointer.

+  @param PciHandle  PCI device to return the ROM image for.

+  @param RomImage   PCI Rom Image for onboard device

+  @param RomSize    Size of RomImage in bytes

+

+  @retval EFI_SUCCESS   - RomImage is valid

+  @retval EFI_NOT_FOUND - No RomImage

+

+**/

+EFI_STATUS

+EFIAPI

+GetPciRom (

+  IN CONST EFI_PCI_PLATFORM_PROTOCOL  *This,

+  IN       EFI_HANDLE                 PciHandle,

+  OUT      VOID                       **RomImage,

+  OUT      UINTN                      *RomSize

+  );

+

+#endif

diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.inf b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.inf

new file mode 100644

index 0000000000..16d46f638a

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.inf

@@ -0,0 +1,66 @@

+## @file

+#  PCI Platform  INF file

+#

+# Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.<BR>

+# SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+##

+

+# This file includes code originally published under the following license.

+## @file

+# Component description file for PciPlatform module.

+#

+# This driver installs pciplatform protocol to provide access interfaces to the onboard pci roms.

+# Copyright (c) 2013-2015 Intel Corporation.

+#

+# This  program and the accompanying materials

+# are licensed and made available under the terms and conditions of the BSD License

+# which accompanies this distribution.  The full text of the license may be found at

+# http://opensource.org/licenses/bsd-license.php

+#

+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+##

+

+[Defines]

+  INF_VERSION                    = 0x00010005

+  BASE_NAME                      = PciPlatform

+  FILE_GUID                      = E78AE2BF-D5E8-4846-9B0A-2D54AEC3BAF9

+  MODULE_TYPE                    = DXE_DRIVER

+  VERSION_STRING                 = 1.0

+  ENTRY_POINT                    = PciPlatformDriverEntry

+

+#

+# The following information is for reference only and not required by the build tools.

+#

+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC

+#

+

+[Sources]

+  PciPlatform.c

+  PciPlatform.h

+  CommonHeader.h

+

+[Packages]

+  MdePkg/MdePkg.dec

+

+[LibraryClasses]

+  PciLib

+  PcdLib

+  DebugLib

+  UefiRuntimeServicesTableLib

+  UefiBootServicesTableLib

+  UefiDriverEntryPoint

+  DxeServicesLib

+

+[Guids]

+

+[Protocols]

+  gEfiPciIoProtocolGuid                         # PROTOCOL ALWAYS_CONSUMED

+  gEfiPciPlatformProtocolGuid                   # PROTOCOL ALWAYS_PRODUCED

+

+[Pcd]

+

+[Depex]

+  TRUE

--

2.31.1





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  parent reply	other threads:[~2024-01-19 14:57 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-18  6:50 [edk2-devel] [PATCH 00/33] Introduce AMD Vangogh platform reference code duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 01/33] AMD/AmdPlatformPkg: Check in AMD S3 logo duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 02/33] AMD/VanGoghBoard: Check in ACPI tables duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 03/33] AMD/VanGoghBoard: Check in Capsule update duke.zhai via groups.io
2024-01-23  4:42   ` Chang, Abner via groups.io
2024-01-25  8:25     ` Zhai, MingXin (Duke) via groups.io
2024-01-25 11:45       ` Chang, Abner via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 04/33] AMD/VanGoghBoard: Check in AgesaPublic pkg duke.zhai via groups.io
2024-01-23  4:44   ` Chang, Abner via groups.io
2024-01-25  8:17     ` Xing, Eric via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 05/33] AMD/VanGoghBoard: Check in PlatformSecLib duke.zhai via groups.io
2024-01-23  4:46   ` Chang, Abner via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 06/33] AMD/VanGoghBoard: Check in AmdIdsExtLib duke.zhai via groups.io
2024-01-18  6:50 ` duke.zhai via groups.io [this message]
2024-01-23  4:50   ` [edk2-devel] [PATCH 07/33] AMD/VanGoghBoard: Check in PciPlatform Chang, Abner via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 08/33] AMD/VanGoghBoard: Check in UDKFlashUpdate duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 09/33] AMD/VanGoghBoard: Check in Flash_AB duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 10/33] AMD/VanGoghBoard: Check in FlashUpdate duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 11/33] AMD/VanGoghBoard: Check in FvbServices duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 12/33] AMD/VanGoghBoard: Check in AMD BaseSerialPortLib duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 13/33] AMD/VanGoghBoard: Check in PlatformFlashAccessLib duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 14/33] AMD/VanGoghBoard: Check in SmbiosLib duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 15/33] AMD/VanGoghBoard: Check in SpiFlashDeviceLib duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 16/33] AMD/VanGoghBoard: Check in BaseTscTimerLib duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 17/33] AMD/VanGoghBoard: Check in Smm access module duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 18/33] AMD/VanGoghBoard: Check in PciHostBridge module duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 19/33] AMD/VanGoghBoard: Check in PcatRealTimeClockRuntimeDxe module duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 20/33] AMD/VanGoghBoard: Check in FTPM module duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 21/33] AMD/VanGoghBoard: Check in SignedCapsule duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 22/33] AMD/VanGoghBoard: Check in Vtf0 duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 23/33] AMD/VanGoghBoard: Check in AcpiPlatform duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 24/33] AMD/VanGoghBoard: Check in FchSpi module duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 25/33] AMD/VanGoghBoard: Check in PlatformInitPei module duke.zhai via groups.io
2024-01-23  6:35   ` Chang, Abner via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 26/33] AMD/VanGoghBoard: Check in Smbios platform dxe drivers duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 27/33] AMD/VanGoghBoard: Check in Fsp2WrapperPkg duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 28/33] AMD/VanGoghBoard: Check in SmmCpuFeaturesLibCommon module duke.zhai via groups.io
2024-01-23  5:14   ` Chang, Abner via groups.io
2024-01-23 10:20     ` Xing, Eric via groups.io
2024-01-23 10:44       ` Chang, Abner via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 29/33] AMD/VanGoghBoard: Check in SmramSaveState module duke.zhai via groups.io
2024-01-20 14:37   ` Abdul Lateef Attar via groups.io
2024-01-23  5:15     ` Chang, Abner via groups.io
2024-01-23 10:27       ` Xing, Eric via groups.io
2024-01-23 10:44         ` Chang, Abner via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 30/33] AMD/VanGoghBoard: Check in EDK2 override files duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 31/33] AMD/VanGoghBoard: Check in AMD SmmControlPei module duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 32/33] AMD/VanGoghBoard: Check in Chachani board project files and build script duke.zhai via groups.io
2024-01-18  6:50 ` [edk2-devel] [PATCH 33/33] AMD/VanGoghBoard: Improvement coding style duke.zhai via groups.io

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