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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C X-Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000E9D2.mail.protection.outlook.com (10.167.241.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7228.16 via Frontend Transport; Fri, 26 Jan 2024 13:12:19 +0000 X-Received: from SHA-LX-MINGXZHA.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Fri, 26 Jan 2024 07:12:17 -0600 From: "Zhai, MingXin (Duke) via groups.io" To: CC: Eric Xing , Ken Yao , Igniculus Fu , Abner Chang Subject: [edk2-devel] [PATCH V3 12/32] AMD/VanGoghBoard: Check in AMD BaseSerialPortLib Date: Fri, 26 Jan 2024 21:11:05 +0800 Message-ID: <20240126131125.1881-13-duke.zhai@amd.com> In-Reply-To: <20240126131125.1881-1-duke.zhai@amd.com> References: <20240126131125.1881-1-duke.zhai@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D2:EE_|DS0PR12MB8366:EE_ X-MS-Office365-Filtering-Correlation-Id: 9dbf78ed-d266-4c94-b73b-08dc1e706d49 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Message-Info: TgMKUqFO0VQKLwedtGyrGJyw/9+mjm6Lx/P1cCbSeWQ4unL2NoQYGQ65p17KwqHOR43qx1RqhQ87v8vdxFuF+O2dzYMKAulixbk6DCHX7sUqF0YB7SwmGfLFdXBKi5s7yoYDprmswQ2AcOACWn2s4FLAcR7QvMmK5U4/D++NiPfrYtaFzVFhHKEMKQjYaCybFioJgsfqd6nTZBEtnARQ/1sh6TSN+OnMJCc7FeAoYMYgHFrv8WWLwFJB57fRPgLQAepCqDLdtkmNBGU4xipvrybbdw2OHEUAvUIGy1ZhSk4Stl8bsQUi5eqj5MweSe6JUqXJIXihlQXbm0IGCh4LdhQU0DEJ9VM+RZBS3R6bsc6WDK9bAaP8WAYITgxMqqo3Xu2xjuqn5yuER7pG+n7OMN1XQfW8rNs7UT+LM15KmhiZ/hmISct2KfXTdgCZEoTSLGgYnGCY1Vs01hEdiZ7aQQwTSDTWBDmtO8UCZSAF2vPcUEzBMeXhFbJVrPASaIksNfNu7eaVBg5+fBLyJ1F0OQWPzhkt2f7smQo9wcFez+iz34EoltF5+6Vrre1Dl2js4CnesTQBst2FtXY38nAi1h8DA/kBaRuTCNYQZ93jBlra0n5LwQF3lfbvYUFdn3AD+nZSzOs2nx81Xuv8zxPnp29F4m9patAHTrqphZfbIKtzBTyKzbUImsionoO3DwkvO1Jb8GSTl7nbqPi6SHwgrToEWUdJgkNMqBQqzYz8Iyxn8GHmufjTt2W2M7L6OqVnyhGKg1Lf/M5n7y9TfaCp4w== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jan 2024 13:12:19.7235 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9dbf78ed-d266-4c94-b73b-08dc1e706d49 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D2.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8366 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,duke.zhai@amd.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: AfP0I153MOOnXBnBCIKFb3tPx7686176AA= Content-Transfer-Encoding: quoted-printable Content-Type: text/plain X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b="DrH27T/d"; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; arc=reject ("signature check failed: fail, {[1] = sig:microsoft.com:reject}") From: Duke Zhai BZ #:4640 In V2: Improve coding style. 1.Remove the leading underscore and use double underscore at trailing in = C header files. 2.Remove old tianocore licenses and redundant license description. 3.Improve coding style. For example: remove space between @param. In V1: Initial FCH UART port for Serial log output. Chachani board uses this UART for outputting debug log. Signed-off-by: Duke Zhai Cc: Eric Xing Cc: Ken Yao Cc: Igniculus Fu Cc: Abner Chang --- .../BaseSerialPortLib16550AmdFchUart.c | 463 ++++++++++++++++++ .../BaseSerialPortLib16550AmdFchUart.inf | 40 ++ 2 files changed, 503 insertions(+) create mode 100644 Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/Base= SerialPortLib16550AmdFchUart/BaseSerialPortLib16550AmdFchUart.c create mode 100644 Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/Base= SerialPortLib16550AmdFchUart/BaseSerialPortLib16550AmdFchUart.inf diff --git a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/BaseSerialP= ortLib16550AmdFchUart/BaseSerialPortLib16550AmdFchUart.c b/Platform/AMD/Van= GoghBoard/VanGoghCommonPkg/Library/BaseSerialPortLib16550AmdFchUart/BaseSer= ialPortLib16550AmdFchUart.c new file mode 100644 index 0000000000..665f47f703 --- /dev/null +++ b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/BaseSerialPortLib1= 6550AmdFchUart/BaseSerialPortLib16550AmdFchUart.c @@ -0,0 +1,463 @@ +/** @file + 16550 UART Serial Port library functions + + Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
+ Copyright (C) 2014 Hewlett-Packard Development Company, L.P.
+ Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2020, ARM Limited. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include + +// +// 16550 UART register offsets and bitfields +// +#define R_UART_RXBUF 0 +#define R_UART_TXBUF 0 +#define R_UART_BAUD_LOW 0 +#define R_UART_BAUD_HIGH 1 +#define R_UART_FCR 2 +#define B_UART_FCR_FIFOE BIT0 +#define B_UART_FCR_FIFO64 BIT5 +#define R_UART_LCR 3 +#define B_UART_LCR_DLAB BIT7 +#define R_UART_MCR 4 +#define B_UART_MCR_RTS BIT1 +#define R_UART_LSR 5 +#define B_UART_LSR_RXRDY BIT0 +#define B_UART_LSR_TXRDY BIT5 +#define B_UART_LSR_TEMT BIT6 +#define R_UART_MSR 6 +#define B_UART_MSR_CTS BIT4 +#define B_UART_MSR_DSR BIT5 + +/** + Read an 8-bit 16550 register. The parameter Offset is added to the base= address of the + 16550 registers that is specified by PcdSerialRegisterBase. + @param Offset The offset of the 16550 register to read. + @return The value read from the 16550 register. +**/ +UINT8 +SerialPortReadRegister ( + UINTN Offset + ) +{ + return MmioRead8 ((UINTN)PcdGet64 (PcdSerialRegisterBase) + Offset * 4); +} + +/** + Write an 8-bit 16550 register. The parameter Offset is added to the base= address of the + 16550 registers that is specified by PcdSerialRegisterBase. + @param Offset The offset of the 16550 register to write. + @param Value The value to write to the 16550 register specified by Of= fset. + @return The value written to the 16550 register. +**/ +UINT8 +SerialPortWriteRegister ( + UINTN Offset, + UINT8 Value + ) +{ + return MmioWrite8 ((UINTN)PcdGet64 (PcdSerialRegisterBase) + Offset * 4,= Value); +} + +/** + Return whether the hardware flow control signal allows writing. + + @retval TRUE The serial port is writable. + @retval FALSE The serial port is not writable. +**/ +BOOLEAN +SerialPortWritable ( + VOID + ) +{ + if (PcdGetBool (PcdSerialUseHardwareFlowControl)) { + if (PcdGetBool (PcdSerialDetectCable)) { + // + // Wait for both DSR and CTS to be set + // DSR is set if a cable is connected. + // CTS is set if it is ok to transmit data + // + // DSR CTS Description Action + // =3D=3D=3D =3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D =3D=3D=3D=3D=3D=3D=3D=3D + // 0 0 No cable connected. Wait + // 0 1 No cable connected. Wait + // 1 0 Cable connected, but not clear to send. Wait + // 1 1 Cable connected, and clear to send. Transmit + // + return (BOOLEAN)((SerialPortReadRegister (R_UART_MSR) & (B_UART_MSR_= DSR | B_UART_MSR_CTS)) =3D=3D (B_UART_MSR_DSR | B_UART_MSR_CTS)); + } else { + // + // Wait for both DSR and CTS to be set OR for DSR to be clear. + // DSR is set if a cable is connected. + // CTS is set if it is ok to transmit data + // + // DSR CTS Description Action + // =3D=3D=3D =3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D =3D=3D=3D=3D=3D=3D=3D=3D + // 0 0 No cable connected. Transmit + // 0 1 No cable connected. Transmit + // 1 0 Cable connected, but not clear to send. Wait + // 1 1 Cable connected, and clar to send. Transmit + // + return (BOOLEAN)((SerialPortReadRegister (R_UART_MSR) & (B_UART_MSR_= DSR | B_UART_MSR_CTS)) !=3D (B_UART_MSR_DSR)); + } + } + + return TRUE; +} + +/** + RCheck Cable connection. + + @retval TRUE RCheck Cable not connect. + @retval FALSE RCheck Cable connect. +**/ +BOOLEAN +CheckCableConnection ( + ) +{ + UINT32 RetryCount; + + // Check Cable connection + RetryCount =3D 200; + if (PcdGetBool (PcdSerialDetectCable)) { + do { + RetryCount--; + } while (((SerialPortReadRegister (R_UART_MSR) & (B_UART_MSR_DSR | B_U= ART_MSR_CTS)) !=3D (B_UART_MSR_DSR | B_UART_MSR_CTS)) && (RetryCount > 0)); + } + + if (RetryCount =3D=3D 0) { + // Time expired + return FALSE; + } + + return TRUE; +} + +/** + Check Serial Port status. + + @retval TRUE The serial port is enable. + @retval FALSE The serial port is not enable. +**/ +BOOLEAN +CheckSerialPort ( + ) +{ + UINTN Divisor; + UINT32 SerialClkDiv16; + + SerialClkDiv16 =3D 48000000/ 16; + // + // See if the serial port is already initialized + // + if ((SerialPortReadRegister (R_UART_FCR) & (B_UART_FCR_FIFOE | B_UART_FC= R_FIFO64)) !=3D + (PcdGet8 (PcdSerialFifoControl) & (B_UART_FCR_FIFOE | B_UART_FC= R_FIFO64))) + { + return FALSE; + } + + if ((SerialPortReadRegister (R_UART_LCR) & 0x3F) !=3D (PcdGet8 (PcdSeria= lLineControl) & 0x3F)) { + return FALSE; + } + + SerialPortWriteRegister (R_UART_LCR, (UINT8)(SerialPortReadRegister (R_U= ART_LCR) | B_UART_LCR_DLAB)); + Divisor =3D SerialPortReadRegister (R_UART_BAUD_HIGH) << 8; + Divisor |=3D SerialPortReadRegister (R_UART_BAUD_LOW); + SerialPortWriteRegister (R_UART_LCR, (UINT8)(SerialPortReadRegister (R_U= ART_LCR) & ~B_UART_LCR_DLAB)); + if (Divisor !=3D SerialClkDiv16 / PcdGet32 (PcdSerialBaudRate)) { + return FALSE; + } + + return TRUE; +} + +/** + Initial Serial Port. + +**/ +VOID +InitSerialPort ( + ) +{ + UINTN Divisor; + UINT32 SerialClkDiv16; + + SerialClkDiv16 =3D 48000000 / 16; + // + // Configure baud rate + // + Divisor =3D SerialClkDiv16 / PcdGet32 (PcdSerialBaudRate); + SerialPortWriteRegister (R_UART_LCR, B_UART_LCR_DLAB); + SerialPortWriteRegister (R_UART_BAUD_HIGH, (UINT8)(Divisor >> 8)); + SerialPortWriteRegister (R_UART_BAUD_LOW, (UINT8)(Divisor & 0xff)); + + // + // Clear DLAB and configure Data Bits, Parity, and Stop Bits. + // Strip reserved bits from PcdSerialLineControl + // + SerialPortWriteRegister (R_UART_LCR, (UINT8)(PcdGet8 (PcdSerialLineContr= ol) & 0x3F)); + + // + // Enable and reset FIFOs + // Strip reserved bits from PcdSerialFifoControl + // + SerialPortWriteRegister (R_UART_FCR, (UINT8)(PcdGet8 (PcdSerialFifoContr= ol) & 0x27)); + + // + // Put Modem Control Register(MCR) into its reset state of 0x00. + // + SerialPortWriteRegister (R_UART_MCR, 0x00); +} + +/** + Initialize the serial device hardware. + + If no initialization is required, then return RETURN_SUCCESS. + If the serial device was successfully initialized, then return RETURN_SU= CCESS. + If the serial device could not be initialized, then return RETURN_DEVICE= _ERROR. + + @retval RETURN_SUCCESS The serial device was initialized. + @retval RETURN_DEVICE_ERROR The serial device could not be initialized= . + +**/ +RETURN_STATUS +EFIAPI +SerialPortInitialize ( + VOID + ) +{ + RETURN_STATUS Status; + + Status =3D PlatformHookSerialPortInitialize (); + if (RETURN_ERROR (Status)) { + return Status; + } + + if (!CheckCableConnection ()) { + return RETURN_DEVICE_ERROR; + } + + if (!CheckSerialPort ()) { + InitSerialPort (); + } + + return RETURN_SUCCESS; +} + +/** + Write data from buffer to serial device. + + Writes NumberOfBytes data bytes from Buffer to the serial device. + The number of bytes actually written to the serial device is returned. + If the return value is less than NumberOfBytes, then the write operation= failed. + + If Buffer is NULL, then ASSERT(). + + If NumberOfBytes is zero, then return 0. + + @param Buffer Pointer to the data buffer to be written. + @param NumberOfBytes Number of bytes to written to the serial device= . + + @retval 0 NumberOfBytes is 0. + @retval >0 The number of bytes written to the serial devic= e. + If this value is less than NumberOfBytes, then = the read operation failed. + +**/ +UINTN +EFIAPI +SerialPortWrite ( + IN UINT8 *Buffer, + IN UINTN NumberOfBytes + ) +{ + UINTN Result; + UINTN Index; + UINTN FifoSize; + UINT32 RetryCount; + + if (Buffer =3D=3D NULL) { + return 0; + } + + if (!CheckCableConnection ()) { + return 0; + } + + if (NumberOfBytes =3D=3D 0) { + // + // Flush the hardware + // + + // + // Wait for both the transmit FIFO and shift register empty. + // + RetryCount =3D 2000; + do { + RetryCount--; + } while (((SerialPortReadRegister (R_UART_LSR) & B_UART_LSR_TEMT) =3D= =3D 0) && (RetryCount > 0)); + + if (RetryCount =3D=3D 0) { + InitSerialPort (); + } + + // + // Wait for the hardware flow control signal + // + while (!SerialPortWritable ()) { + } + + return 0; + } + + // + // Compute the maximum size of the Tx FIFO + // + FifoSize =3D 1; + if ((PcdGet8 (PcdSerialFifoControl) & B_UART_FCR_FIFOE) !=3D 0) { + if ((PcdGet8 (PcdSerialFifoControl) & B_UART_FCR_FIFO64) =3D=3D 0) { + FifoSize =3D 16; + } else { + FifoSize =3D 64; + } + } + + Result =3D NumberOfBytes; + while (NumberOfBytes !=3D 0) { + // + // Wait for the serial port to be ready, to make sure both the transmi= t FIFO + // and shift register empty. + // + RetryCount =3D 2000; + do { + RetryCount--; + } while (((SerialPortReadRegister (R_UART_LSR) & B_UART_LSR_TEMT) =3D= =3D 0) && (RetryCount > 0)); + + if (RetryCount =3D=3D 0) { + InitSerialPort (); + } + + // + // Fill then entire Tx FIFO + // + for (Index =3D 0; Index < FifoSize && NumberOfBytes !=3D 0; Index++, N= umberOfBytes--, Buffer++) { + // + // Wait for the hardware flow control signal + // + while (!SerialPortWritable ()) { + } + + // + // Write byte to the transmit buffer. + // + SerialPortWriteRegister (R_UART_TXBUF, *Buffer); + } + } + + return Result; +} + +/** + Reads data from a serial device into a buffer. + + @param Buffer Pointer to the data buffer to store the data re= ad from the serial device. + @param NumberOfBytes Number of bytes to read from the serial device. + + @retval 0 NumberOfBytes is 0. + @retval >0 The number of bytes read from the serial device= . + If this value is less than NumberOfBytes, then = the read operation failed. + +**/ +UINTN +EFIAPI +SerialPortRead ( + OUT UINT8 *Buffer, + IN UINTN NumberOfBytes + ) +{ + UINTN Result; + UINT8 Mcr; + + if (NULL =3D=3D Buffer) { + return 0; + } + + Mcr =3D (UINT8)(SerialPortReadRegister (R_UART_MCR) & ~B_UART_MCR_RTS); + + for (Result =3D 0; NumberOfBytes-- !=3D 0; Result++, Buffer++) { + // + // Wait for the serial port to have some data. + // + while ((SerialPortReadRegister (R_UART_LSR) & B_UART_LSR_RXRDY) =3D=3D= 0) { + if (PcdGetBool (PcdSerialUseHardwareFlowControl)) { + // + // Set RTS to let the peer send some data + // + SerialPortWriteRegister (R_UART_MCR, (UINT8)(Mcr | B_UART_MCR_RTS)= ); + } + } + + if (PcdGetBool (PcdSerialUseHardwareFlowControl)) { + // + // Clear RTS to prevent peer from sending data + // + SerialPortWriteRegister (R_UART_MCR, Mcr); + } + + // + // Read byte from the receive buffer. + // + *Buffer =3D SerialPortReadRegister (R_UART_RXBUF); + } + + return Result; +} + +/** + Polls a serial device to see if there is any data waiting to be read. + + Polls aserial device to see if there is any data waiting to be read. + If there is data waiting to be read from the serial device, then TRUE is= returned. + If there is no data waiting to be read from the serial device, then FALS= E is returned. + + @retval TRUE Data is waiting to be read from the serial devi= ce. + @retval FALSE There is no data waiting to be read from the se= rial device. + +**/ +BOOLEAN +EFIAPI +SerialPortPoll ( + VOID + ) +{ + // + // Read the serial port status + // + if ((SerialPortReadRegister (R_UART_LSR) & B_UART_LSR_RXRDY) !=3D 0) { + if (PcdGetBool (PcdSerialUseHardwareFlowControl)) { + // + // Clear RTS to prevent peer from sending data + // + SerialPortWriteRegister (R_UART_MCR, (UINT8)(SerialPortReadRegister = (R_UART_MCR) & ~B_UART_MCR_RTS)); + } + + return TRUE; + } + + if (PcdGetBool (PcdSerialUseHardwareFlowControl)) { + // + // Set RTS to let the peer send some data + // + SerialPortWriteRegister (R_UART_MCR, (UINT8)(SerialPortReadRegister (R= _UART_MCR) | B_UART_MCR_RTS)); + } + + return FALSE; +} diff --git a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/BaseSerialP= ortLib16550AmdFchUart/BaseSerialPortLib16550AmdFchUart.inf b/Platform/AMD/V= anGoghBoard/VanGoghCommonPkg/Library/BaseSerialPortLib16550AmdFchUart/BaseS= erialPortLib16550AmdFchUart.inf new file mode 100644 index 0000000000..e6f824401d --- /dev/null +++ b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/BaseSerialPortLib1= 6550AmdFchUart/BaseSerialPortLib16550AmdFchUart.inf @@ -0,0 +1,40 @@ +## @file +# SerialPortLib instance for 16550 UART. +# +# Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved. +# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
+# Copyright (c) 2020, ARM Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D BaseSerialPortLib16550AmdFchUart + FILE_GUID =3D A66281AD-66E9-4089-9B1C-9CFC84D8A760 + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D SerialPortLib + +[Sources] + BaseSerialPortLib16550AmdFchUart.c + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + VanGoghCommonPkg/AmdCommonPkg.dec + +[LibraryClasses] + BaseLib + PcdLib + IoLib + PlatformHookLib + +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl \ No newline at end of file --=20 2.31.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#114588): https://edk2.groups.io/g/devel/message/114588 Mute This Topic: https://groups.io/mt/103975453/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-