From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 90869941744 for ; Wed, 31 Jan 2024 10:01:27 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=onI0Z8L8t3YYkf6JDFqyqgYjDnIyIiydXYpJYBDo40Q=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1706695286; v=1; b=lgpV8kB063UjTcPaWTN7AycRQQ24/VQEF5WTZW+1F2iB1bXKoNYcmg1qlGfl8Qf72VkHbHuH 1HxLnfSUrzG22OdXKRxkdT2ibnbK4dFKlXODkP/YXTuKF99WBv329PVJOEx7SI4HW0orDNIjX/A Ew1lzUbyz17uf4ZMYc0GjLBM= X-Received: by 127.0.0.2 with SMTP id nDDzYY7687511xLikIf7XOag; Wed, 31 Jan 2024 02:01:26 -0800 X-Received: from zg8tmja5ljk3lje4ms43mwaa.icoremail.net (zg8tmja5ljk3lje4ms43mwaa.icoremail.net [209.97.181.73]) by mx.groups.io with SMTP id smtpd.web10.10744.1706695284418039930 for ; Wed, 31 Jan 2024 02:01:24 -0800 X-Received: from prodtpl.icoremail.net (unknown [10.12.1.20]) by hzbj-icmmx-6 (Coremail) with SMTP id AQAAfwBHT8txGrplnEP2BA--.17099S2; Wed, 31 Jan 2024 18:01:21 +0800 (CST) X-Received: from phytium.com.cn (unknown [218.76.62.144]) by mail (Coremail) with SMTP id AQAAfwAXA2lhGrplG5kCAA--.1801S6; Wed, 31 Jan 2024 18:01:13 +0800 (CST) From: "Xiong Yining" To: devel@edk2.groups.io Cc: quic_llindhol@quicinc.com, ardb+tianocore@kernel.org, graeme@xora.org.uk, marcin.juszkiewicz@linaro.org, chenbaozi@phytium.com.cn Subject: [edk2-devel] [PATCH v4 3/6] Platform/SbsaQemu: move FdtHandlerLib to SbsaQemuHardwareInfoLib Date: Wed, 31 Jan 2024 10:00:24 +0000 Message-Id: <20240131100027.2538549-4-xiongyining1480@phytium.com.cn> In-Reply-To: <20240131100027.2538549-1-xiongyining1480@phytium.com.cn> References: <20240131100027.2538549-1-xiongyining1480@phytium.com.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAfwAXA2lhGrplG5kCAA--.1801S6 X-CM-SenderInfo: x0lr0wp1lqx0bjrumio6sk53xlxphulrpou0/1tbiAQABBmW5T2UFegABsO X-Coremail-Antispam: 1Uk129KBjvJXoWfJF4kWFWfCFyDuFW5XF18Krg_yoWktw1fpF yIvFZYkr1UGryfKws7XayrZF45CFnxGrZ8KFZFqw1UZrsxtF95X3y7Jr97Xw15JrsrWa1j gF4rWayUuF18GFJanT9S1TB71UUUUUDqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj DUYxn0WfASr-VFAU7a7-sFnT9fnUUIcSsGvfJ3UbIYCTnIWIevJa73UjIFyTuYvj4RJUUU UUUUU Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,xiongyining1480@phytium.com.cn List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: Px8W7G2CbXdQPelZeSNaBsgtx7686176AA= Content-Transfer-Encoding: 8bit X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=lgpV8kB0; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io From: Marcin Juszkiewicz There is no need for EDK2 to know that there is DeviceTree around. All hardware information is read using functions from SbsaQemuHardwareInfoLib library. Library fallbacks to parsing DT if needed (used with too old TF-A). Signed-off-by: Marcin Juszkiewicz Reviewed-by: Leif Lindholm --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 1 - .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 4 +- .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 +- .../SbsaQemu/Include/Library/FdtHelperLib.h | 36 ------ .../Library/FdtHelperLib/FdtHelperLib.c | 98 ----------------- .../Library/FdtHelperLib/FdtHelperLib.inf | 33 ------ .../SbsaQemuHardwareInfoLib.c | 104 ++++++++++++++++++ .../SbsaQemuHardwareInfoLib.inf | 2 + 8 files changed, 110 insertions(+), 172 deletions(-) delete mode 100644 Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h delete mode 100644 Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c delete mode 100644 Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 07cb3490f4..bde61651da 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -126,7 +126,6 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE # ARM PL011 UART Driver PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf - FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf SbsaQemuHardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index 59536ea957..03f7a34977 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -15,10 +15,10 @@ #include #include #include -#include #include #include #include +#include #include #include #include @@ -296,7 +296,7 @@ AddMadtTable ( CopyMem (New, &Gicc, sizeof (EFI_ACPI_6_0_GIC_STRUCTURE)); GiccPtr = (EFI_ACPI_6_0_GIC_STRUCTURE *) New; GiccPtr->AcpiProcessorUid = CoreIndex; - GiccPtr->MPIDR = FdtHelperGetMpidr (CoreIndex); + GiccPtr->MPIDR = SbsaQemuGetMpidr (CoreIndex); New += sizeof (EFI_ACPI_6_0_GIC_STRUCTURE); } diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf index 291743b191..9bf0a13de5 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf @@ -1,7 +1,7 @@ ## @file # This driver modifies ACPI tables for the Qemu SBSA platform # -# Copyright (c) 2020, Linaro Ltd. All rights reserved. +# Copyright (c) Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -35,9 +35,9 @@ BaseLib DebugLib DxeServicesLib - FdtHelperLib PcdLib PrintLib + SbsaQemuHardwareInfoLib UefiDriverEntryPoint UefiLib UefiRuntimeServicesTableLib diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h deleted file mode 100644 index ea91598572..0000000000 --- a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h +++ /dev/null @@ -1,36 +0,0 @@ -/** @file -* FdtHelperLib.h -* -* Copyright (c) 2021, NUVIA Inc. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* -**/ - -#ifndef FDT_HELPER_LIB_ -#define FDT_HELPER_LIB_ - -/** - Get MPIDR for a given cpu from device tree passed by Qemu. - - @param [in] CpuId Index of cpu to retrieve MPIDR value for. - - @retval MPIDR value of CPU at index -**/ -UINT64 -FdtHelperGetMpidr ( - IN UINTN CpuId - ); - -/** Walks through the Device Tree created by Qemu and counts the number - of CPUs present in it. - - @return The number of CPUs present. -**/ -EFIAPI -UINT32 -FdtHelperCountCpus ( - VOID - ); - -#endif /* FDT_HELPER_LIB_ */ diff --git a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c b/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c deleted file mode 100644 index 7fdfb055db..0000000000 --- a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c +++ /dev/null @@ -1,98 +0,0 @@ -/** @file -* FdtHelperLib.c -* -* Copyright (c) 2021, NUVIA Inc. All rights reserved. -* Copyright (c) 2020, Linaro Ltd. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* -**/ - -#include -#include -#include -#include -#include - -STATIC INT32 mFdtFirstCpuOffset; -STATIC INT32 mFdtCpuNodeSize; - -/** - Get MPIDR for a given cpu from device tree passed by Qemu. - - @param [in] CpuId Index of cpu to retrieve MPIDR value for. - - @retval MPIDR value of CPU at index -**/ -UINT64 -FdtHelperGetMpidr ( - IN UINTN CpuId - ) -{ - VOID *DeviceTreeBase; - CONST UINT64 *RegVal; - INT32 Len; - - DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress); - ASSERT (DeviceTreeBase != NULL); - - RegVal = fdt_getprop (DeviceTreeBase, - mFdtFirstCpuOffset + (CpuId * mFdtCpuNodeSize), - "reg", - &Len); - if (!RegVal) { - DEBUG ((DEBUG_ERROR, "Couldn't find reg property for CPU:%d\n", CpuId)); - return 0; - } - - return (fdt64_to_cpu (ReadUnaligned64 (RegVal))); -} - -/** Walks through the Device Tree created by Qemu and counts the number - of CPUs present in it. - - @return The number of CPUs present. -**/ -EFIAPI -UINT32 -FdtHelperCountCpus ( - VOID - ) -{ - VOID *DeviceTreeBase; - INT32 Node; - INT32 Prev; - INT32 CpuNode; - UINT32 CpuCount; - - DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress); - ASSERT (DeviceTreeBase != NULL); - - // Make sure we have a valid device tree blob - ASSERT (fdt_check_header (DeviceTreeBase) == 0); - - CpuNode = fdt_path_offset (DeviceTreeBase, "/cpus"); - if (CpuNode <= 0) { - DEBUG ((DEBUG_ERROR, "Unable to locate /cpus in device tree\n")); - return 0; - } - - CpuCount = 0; - - // Walk through /cpus node and count the number of subnodes. - // The count of these subnodes corresponds to the number of - // CPUs created by Qemu. - Prev = fdt_first_subnode (DeviceTreeBase, CpuNode); - mFdtFirstCpuOffset = Prev; - while (1) { - CpuCount++; - Node = fdt_next_subnode (DeviceTreeBase, Prev); - if (Node < 0) { - break; - } - mFdtCpuNodeSize = Node - Prev; - Prev = Node; - } - - return CpuCount; -} diff --git a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf b/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf deleted file mode 100644 index 9c059f3e58..0000000000 --- a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf +++ /dev/null @@ -1,33 +0,0 @@ -#/** @file -# -# Component description file for FdtHelperLib module -# -# Copyright (c) 2021, NUVIA Inc. All rights reserved. -# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -#**/ - -[Defines] - INF_VERSION = 1.29 - BASE_NAME = FdtHelperLib - FILE_GUID = 34e4396f-c2fc-4f9e-ad58-0f98e99e3875 - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = FdtHelperLib - -[Sources.common] - FdtHelperLib.c - -[Packages] - EmbeddedPkg/EmbeddedPkg.dec - MdePkg/MdePkg.dec - Silicon/Qemu/SbsaQemu/SbsaQemu.dec - -[LibraryClasses] - DebugLib - FdtLib - PcdLib - -[FixedPcd] - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c index 134fe73a52..6315cce3fb 100644 --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c @@ -11,8 +11,112 @@ #include #include #include +#include #include +/** + Get MPIDR for a given cpu from device tree passed by Qemu. + + @param [in] CpuId Index of cpu to retrieve MPIDR value for. + + @retval MPIDR value of CPU at index +**/ +UINT64 +FdtHelperGetMpidr ( + IN UINTN CpuId + ) +{ + VOID *DeviceTreeBase; + INT32 Node; + INT32 Prev; + UINT32 CpuCount; + CONST UINT64 *RegVal; + + DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress); + ASSERT (DeviceTreeBase != NULL); + + // Make sure we have a valid device tree blob + ASSERT (fdt_check_header (DeviceTreeBase) == 0); + + Node = fdt_path_offset (DeviceTreeBase, "/cpus"); + if (Node <= 0) { + DEBUG ((DEBUG_ERROR, "Unable to locate /cpus in DeviceTree\n")); + return 0; + } + + CpuCount = 0; + + Prev = fdt_first_subnode (DeviceTreeBase, Node); + while (1) { + if (CpuCount == CpuId) { + RegVal = fdt_getprop (DeviceTreeBase, Prev, "reg", NULL); + if (!RegVal) { + DEBUG ((DEBUG_ERROR, "Couldn't find reg property for CPU:%d\n", CpuId)); + return 0; + } + + return (fdt64_to_cpu (ReadUnaligned64 (RegVal))); + } + + Node = fdt_next_subnode (DeviceTreeBase, Prev); + if (Node < 0) { + break; + } + + Prev = Node; + CpuCount++; + } + + return 0; /* We did not found MPIDR */ +} + +/** Walks through the Device Tree created by Qemu and counts the number + of CPUs present in it. + + @return The number of CPUs present. +**/ +EFIAPI +UINT32 +FdtHelperCountCpus ( + VOID + ) +{ + VOID *DeviceTreeBase; + INT32 Node; + INT32 Prev; + UINT32 CpuCount; + + DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress); + ASSERT (DeviceTreeBase != NULL); + + // Make sure we have a valid device tree blob + ASSERT (fdt_check_header (DeviceTreeBase) == 0); + + Node = fdt_path_offset (DeviceTreeBase, "/cpus"); + if (Node <= 0) { + DEBUG ((DEBUG_ERROR, "Unable to locate /cpus in DeviceTree\n")); + return 0; + } + + CpuCount = 0; + + // Walk through /cpus node and count the number of subnodes. + // The count of these subnodes corresponds to the number of + // CPUs created by Qemu. + Prev = fdt_first_subnode (DeviceTreeBase, Node); + while (1) { + CpuCount++; + Node = fdt_next_subnode (DeviceTreeBase, Prev); + if (Node < 0) { + break; + } + + Prev = Node; + } + + return CpuCount; +} + /** Get CPU count from information passed by Qemu. diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf index 8c2def1878..5358dd339e 100644 --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf @@ -27,6 +27,8 @@ ArmSmcLib BaseMemoryLib DebugLib + FdtLib [Pcd] + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount -- 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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