From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 0190F740032 for ; Wed, 31 Jan 2024 12:05:28 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=HsO3qs8JW0grH27MMNh6iK2eT91b37Y762UlDuorlD4=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1706702727; v=1; b=PJYM1gpFfPJfM6YEvlXgbh5MarH0LixJ388jSGZRMuJ1ia8iuOrvopLpuDxm0/NBZHV+pw8O 5JmGIFnugzwCuuIzo5EYfSydJbgFZVfeJIUqoro1d4HdXVgJ5eRQHTEYRMjSY7/LUOCv/xYW0gL /bbL6qxHvv1F+WgeMfFiAKTA= X-Received: by 127.0.0.2 with SMTP id gBC2YY7687511xCEFqeGM2dq; Wed, 31 Jan 2024 04:05:27 -0800 X-Received: from sgoci-sdnproxy-4.icoremail.net (sgoci-sdnproxy-4.icoremail.net [129.150.39.64]) by mx.groups.io with SMTP id smtpd.web10.12339.1706702725036331165 for ; Wed, 31 Jan 2024 04:05:26 -0800 X-Received: from prodtpl.icoremail.net (unknown [10.12.1.20]) by hzbj-icmmx-7 (Coremail) with SMTP id AQAAfwCHjkaAN7plj7HsBw--.22773S2; Wed, 31 Jan 2024 20:05:20 +0800 (CST) X-Received: from phytium.com.cn (unknown [218.76.62.144]) by mail (Coremail) with SMTP id AQAAfwAXA2l4N7pl8_MCAA--.2280S4; Wed, 31 Jan 2024 20:05:17 +0800 (CST) From: "Xiong Yining" To: devel@edk2.groups.io Cc: quic_llindhol@quicinc.com, ardb+tianocore@kernel.org, graeme@xora.org.uk, marcin.juszkiewicz@linaro.org, chenbaozi@phytium.com.cn Subject: [edk2-devel] [PATCH v5 1/7] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib Date: Wed, 31 Jan 2024 12:05:01 +0000 Message-Id: <20240131120507.2829117-2-xiongyining1480@phytium.com.cn> In-Reply-To: <20240131120507.2829117-1-xiongyining1480@phytium.com.cn> References: <20240131120507.2829117-1-xiongyining1480@phytium.com.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAfwAXA2l4N7pl8_MCAA--.2280S4 X-CM-SenderInfo: x0lr0wp1lqx0bjrumio6sk53xlxphulrpou0/1tbiAQABBmW5T2UIJQAAsd X-Coremail-Antispam: 1Uk129KBjvJXoWxtFW5uFyDGry5GF4DurW5trb_yoW3Zry3pF 1IyFWFgr4UJFyIkr4xGayFqry5GF4agFWUGFZFqr18Ar47JF1fXrWUJr1kJr15Jrsxu3yj gay8Xa4UuF1kCaDanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj DUYxn0WfASr-VFAU7a7-sFnT9fnUUIcSsGvfJ3UbIYCTnIWIevJa73UjIFyTuYvj4RJUUU UUUUU Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,xiongyining1480@phytium.com.cn List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: 6Di2DdnBE7iEZjji5i2Xq2Amx7686176AA= Content-Transfer-Encoding: 8bit X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=PJYM1gpF; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io From: Marcin Juszkiewicz This library provides functions to check for hardware information. For now it covers CPU ones: - amount of cpu cores - MPIDR value for cpu core - NUMA node id for cpu core Values are read from TF-A using platform specific SMC calls. Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 3 +- .../SbsaQemuHardwareInfoLib.inf | 32 ++++++ .../Include/IndustryStandard/SbsaQemuSmc.h | 15 ++- .../Include/Library/SbsaQemuHardwareInfoLib.h | 45 +++++++++ .../SbsaQemuHardwareInfoLib.c | 98 +++++++++++++++++++ 5 files changed, 189 insertions(+), 4 deletions(-) create mode 100644 Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf create mode 100644 Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h create mode 100644 Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 378600050df9..07cb3490f4cf 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -1,6 +1,6 @@ # # Copyright (c) 2021, NUVIA Inc. All rights reserved. -# Copyright (c) 2019, Linaro Limited. All rights reserved. +# Copyright (c) 2019-2024, Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -128,6 +128,7 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf + SbsaQemuHardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf # Debug Support PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf new file mode 100644 index 000000000000..8c2def1878e6 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf @@ -0,0 +1,32 @@ +#/* @file +# +# Copyright (c) Linaro Ltd. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#*/ + +[Defines] + INF_VERSION = 0x0001001c + BASE_NAME = SbsaQemuHardwareInfoLib + FILE_GUID = 6454006f-6502-46e2-9be4-4bba8d4b29fb + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = ArmPlatformLib + +[Sources] + SbsaQemuHardwareInfoLib.c + +[Packages] + ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + Silicon/Qemu/SbsaQemu/SbsaQemu.dec + +[LibraryClasses] + ArmSmcLib + BaseMemoryLib + DebugLib + + [Pcd] + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h index 7934875e4aba..d9faee7fa5b2 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h @@ -11,8 +11,17 @@ #include -#define SIP_SVC_VERSION SMC_SIP_FUNCTION_ID(1) -#define SIP_SVC_GET_GIC SMC_SIP_FUNCTION_ID(100) -#define SIP_SVC_GET_GIC_ITS SMC_SIP_FUNCTION_ID(101) +#define SIP_SVC_VERSION SMC_SIP_FUNCTION_ID(1) +#define SIP_SVC_GET_GIC SMC_SIP_FUNCTION_ID(100) +#define SIP_SVC_GET_GIC_ITS SMC_SIP_FUNCTION_ID(101) +#define SIP_SVC_GET_CPU_COUNT SMC_SIP_FUNCTION_ID(200) +#define SIP_SVC_GET_CPU_NODE SMC_SIP_FUNCTION_ID(201) + +/* + * SMCC does not define return codes for SiP functions. + * We use Architecture ones then. + */ + +#define SMC_SIP_CALL_SUCCESS SMC_ARCH_CALL_SUCCESS #endif /* SBSA_QEMU_SMC_H_ */ diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h new file mode 100644 index 000000000000..ca52c6b27093 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h @@ -0,0 +1,45 @@ +/** @file +* +* Copyright (c) Linaro Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#ifndef SBSA_QEMU_HARDWARE_INFO_ +#define SBSA_QEMU_HARDWARE_INFO_ + +/** + Get CPU count from information passed by Qemu. + +**/ +VOID +SbsaQemuGetCpuCount ( + VOID + ); + +/** + Get MPIDR for a given cpu from device tree passed by Qemu. + + @param [in] CpuId Index of cpu to retrieve MPIDR value for. + + @retval MPIDR value of CPU at index +**/ +UINT64 +SbsaQemuGetMpidr ( + IN UINTN CpuId + ); + +/** + Get NUMA node id for a given cpu from device tree passed by Qemu. + + @param [in] CpuId Index of cpu to retrieve NUMA node id for. + + @retval NUMA node id for CPU at index +**/ +UINT64 +SbsaQemuGetCpuNumaNode ( + IN UINTN CpuId + ); + +#endif /* SBSA_QEMU_HARDWARE_INFO_ */ diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c new file mode 100644 index 000000000000..134fe73a5284 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c @@ -0,0 +1,98 @@ +/** @file +* +* Copyright (c) 2021, NUVIA Inc. All rights reserved. +* Copyright (c) Linaro Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include +#include +#include +#include +#include + +/** + Get CPU count from information passed by Qemu. + +**/ +VOID +SbsaQemuGetCpuCount ( + VOID + ) +{ + UINTN Arg0; + UINTN SmcResult; + RETURN_STATUS Result; + + SmcResult = ArmCallSmc0 (SIP_SVC_GET_CPU_COUNT, &Arg0, NULL, NULL); + if (SmcResult != SMC_SIP_CALL_SUCCESS) { + DEBUG ((DEBUG_INFO, "SIP_SVC_GET_CPU_COUNT call failed. We have to get cpu info from DT.\n")); + Arg0 = FdtHelperCountCpus (); + } + + Result = PcdSet32S (PcdCoreCount, Arg0); + ASSERT_RETURN_ERROR (Result); + + DEBUG ((DEBUG_INFO, "We have %d cpus.\n", Arg0)); +} + +/** + Get MPIDR for a given cpu from device tree passed by Qemu. + + @param [in] CpuId Index of cpu to retrieve MPIDR value for. + + @retval MPIDR value of CPU at index +**/ +UINT64 +SbsaQemuGetMpidr ( + IN UINTN CpuId + ) +{ + UINTN SmcResult; + UINTN Arg0; + UINTN Arg1; + + Arg0 = CpuId; + + SmcResult = ArmCallSmc0 (SIP_SVC_GET_CPU_NODE, &Arg0, &Arg1, NULL); + if (SmcResult != SMC_SIP_CALL_SUCCESS) { + DEBUG ((DEBUG_INFO, "SIP_SVC_GET_CPU_NODE call failed. We have to get cpu info from DT.\n")); + Arg1 = FdtHelperGetMpidr (CpuId); + } + + DEBUG ((DEBUG_ERROR, "MPIDR for CPU:%d = %d\n", CpuId, Arg1)); + + return Arg1; +} + +/** + Get NUMA node id for a given cpu from device tree passed by Qemu. + + @param [in] CpuId Index of cpu to retrieve NUMA node id for. + + @retval NUMA node id for CPU at index +**/ +UINT64 +SbsaQemuGetCpuNumaNode ( + IN UINTN CpuId + ) +{ + UINTN SmcResult; + UINTN Arg0; + UINTN Arg1; + + Arg0 = CpuId; + + SmcResult = ArmCallSmc0 (SIP_SVC_GET_CPU_NODE, &Arg0, &Arg1, NULL); + if (SmcResult != SMC_SIP_CALL_SUCCESS) { + /* No fallback to DeviceTree as we did not had that info earlier. */ + DEBUG ((DEBUG_ERROR, "SIP_SVC_GET_CPU_NODE call failed. Couldn't find information for CPU:%d\n", CpuId)); + return 0; + } + + DEBUG ((DEBUG_ERROR, "NUMA node for CPU:%d = %d\n", CpuId, Arg0)); + + return Arg0; +} -- 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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