From: "Chao Li" <lichao@loongson.cn>
To: devel@edk2.groups.io
Cc: Michael D Kinney <michael.d.kinney@intel.com>,
Liming Gao <gaoliming@byosoft.com.cn>,
Zhiguang Liu <zhiguang.liu@intel.com>
Subject: [edk2-devel] [PATCH v1 08/19] MdePkg: Add IOCSR operation for LoongArch
Date: Fri, 2 Feb 2024 10:28:00 +0800 [thread overview]
Message-ID: <20240202022800.2444874-1-lichao@loongson.cn> (raw)
In-Reply-To: <20240202022637.2444159-1-lichao@loongson.cn>
Add IoCsrRead8, IoCsrRead16, IoCsrRead32, IoCsrRead64, IoCsrWrite8,
IoCsrWrite16, IoCsrWrite32, IoCsrWrite64 to operate the IOCSR registers
of LoongArch architecture.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
---
MdePkg/Include/Library/BaseLib.h | 112 +++++++++++++++++++
MdePkg/Library/BaseLib/BaseLib.inf | 1 +
MdePkg/Library/BaseLib/LoongArch64/IoCsr.S | 120 +++++++++++++++++++++
3 files changed, 233 insertions(+)
create mode 100644 MdePkg/Library/BaseLib/LoongArch64/IoCsr.S
diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index 4e97368ae2..1fff0fb224 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -396,6 +396,118 @@ CsrXChg (
IN UINTN Mask
);
+/**
+ IO CSR read byte operation.
+
+ @param[in] Select IO CSR read instruction select values.
+
+ @return The return value of iocsrrd.b instruction.
+
+**/
+UINT8
+IoCsrRead8 (
+ IN UINTN Select
+ );
+
+/**
+ IO CSR read half word operation.
+
+ @param[in] Select IO CSR read instruction select values.
+
+ @return The return value of iocsrrd.h instruction.
+
+**/
+UINT16
+IoCsrRead16 (
+ IN UINTN Select
+ );
+
+/**
+ IO CSR read word operation.
+
+ @param[in] Select IO CSR read instruction select values.
+
+ @return The return value of iocsrrd.w instruction.
+
+**/
+UINT32
+IoCsrRead32 (
+ IN UINTN Select
+ );
+
+/**
+ IO CSR read double word operation. Only for LoongArch64.
+
+ @param[in] Select IO CSR read instruction select values.
+
+ @return The return value of iocsrrd.d instruction.
+
+**/
+UINT64
+IoCsrRead64 (
+ IN UINTN Select
+ );
+
+/**
+ IO CSR write byte operation.
+
+ @param[in] Select IO CSR write instruction select values.
+ @param[in] Value The iocsrwr.b will write the value.
+
+ @return VOID.
+
+**/
+VOID
+IoCsrWrite8 (
+ IN UINTN Select,
+ IN UINT8 Value
+ );
+
+/**
+ IO CSR write half word operation.
+
+ @param[in] Select IO CSR write instruction select values.
+ @param[in] Value The iocsrwr.h will write the value.
+
+ @return VOID.
+
+**/
+VOID
+IoCsrWrite16 (
+ IN UINTN Select,
+ IN UINT16 Value
+ );
+
+/**
+ IO CSR write word operation.
+
+ @param[in] Select IO CSR write instruction select values.
+ @param[in] Value The iocsrwr.w will write the value.
+
+ @return VOID.
+
+**/
+VOID
+IoCsrWrite32 (
+ IN UINTN Select,
+ IN UINT32 Value
+ );
+
+/**
+ IO CSR write double word operation. Only for LoongArch64.
+
+ @param[in] Select IO CSR write instruction select values.
+ @param[in] Value The iocsrwr.d will write the value.
+
+ @return VOID.
+
+**/
+VOID
+IoCsrWrite64 (
+ IN UINTN Select,
+ IN UINT64 Value
+ );
+
#endif // defined (MDE_CPU_LOONGARCH64)
//
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index 7c46306883..4dbe94be71 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -413,6 +413,7 @@ [Sources.LOONGARCH64]
LoongArch64/Csr.c
LoongArch64/InternalSwitchStack.c
LoongArch64/AsmCsr.S | GCC
+ LoongArch64/IoCsr.S | GCC
LoongArch64/GetInterruptState.S | GCC
LoongArch64/EnableInterrupts.S | GCC
LoongArch64/DisableInterrupts.S | GCC
diff --git a/MdePkg/Library/BaseLib/LoongArch64/IoCsr.S b/MdePkg/Library/BaseLib/LoongArch64/IoCsr.S
new file mode 100644
index 0000000000..a659908bc4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/LoongArch64/IoCsr.S
@@ -0,0 +1,120 @@
+#------------------------------------------------------------------------------
+#
+# LoongArch ASM IO CSR operation functions
+#
+# Copyright (c) 2024, Loongson Technology Corporation Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX (IoCsrRead8)
+ASM_GLOBAL ASM_PFX (IoCsrRead16)
+ASM_GLOBAL ASM_PFX (IoCsrRead32)
+ASM_GLOBAL ASM_PFX (IoCsrRead64)
+
+ASM_GLOBAL ASM_PFX (IoCsrWrite8)
+ASM_GLOBAL ASM_PFX (IoCsrWrite16)
+ASM_GLOBAL ASM_PFX (IoCsrWrite32)
+ASM_GLOBAL ASM_PFX (IoCsrWrite64)
+
+#/**
+# IO CSR read byte operation.
+#
+# @param[in] Select IO CSR read instruction select values.
+#
+# @return The return value of iocsrrd.b instruction.
+#
+#**/
+ASM_PFX (IoCsrRead8):
+ iocsrrd.b $a0, $a0
+ jirl $zero, $ra, 0
+
+#/**
+# IO CSR read half word operation.
+#
+# @param[in] Select IO CSR read instruction select values.
+#
+# @return The return value of iocsrrd.h instruction.
+#
+#**/
+ASM_PFX (IoCsrRead16):
+ iocsrrd.h $a0, $a0
+ jirl $zero, $ra, 0
+
+#/**
+# IO CSR read word operation.
+#
+# @param[in] Select IO CSR read instruction select values.
+#
+# @return The return value of iocsrrd.w instruction.
+#
+#**/
+ASM_PFX (IoCsrRead32):
+ iocsrrd.w $a0, $a0
+ jirl $zero, $ra, 0
+
+#/**
+# IO CSR read double word operation. Only for LoongArch64.
+#
+# @param[in] Select IO CSR read instruction select values.
+#
+# @return The return value of iocsrrd.d instruction.
+#
+#**/
+ASM_PFX (IoCsrRead64):
+ iocsrrd.d $a0, $a0
+ jirl $zero, $ra, 0
+
+#/**
+# IO CSR write byte operation.
+#
+# @param[in] Select IO CSR write instruction select values.
+# @param[in] Value The iocsrwr.b will write the value.
+#
+# @return VOID.
+#
+#**/
+ASM_PFX (IoCsrWrite8):
+ iocsrwr.b $a1, $a0
+ jirl $zero, $ra, 0
+
+#/**
+# IO CSR write half word operation.
+#
+# @param[in] Select IO CSR write instruction select values.
+# @param[in] Value The iocsrwr.h will write the value.
+#
+# @return VOID.
+#
+#**/
+ASM_PFX (IoCsrWrite16):
+ iocsrwr.h $a1, $a0
+ jirl $zero, $ra, 0
+
+#/**
+# IO CSR write word operation.
+#
+# @param[in] Select IO CSR write instruction select values.
+# @param[in] Value The iocsrwr.w will write the value.
+#
+# @return VOID.
+#
+#**/
+ASM_PFX (IoCsrWrite32):
+ iocsrwr.w $a1, $a0
+ jirl $zero, $ra, 0
+
+#/**
+# IO CSR write double word operation. Only for LoongArch64.
+#
+# @param[in] Select IO CSR write instruction select values.
+# @param[in] Value The iocsrwr.d will write the value.
+#
+# @return VOID.
+#
+#**/
+ASM_PFX (IoCsrWrite64):
+ iocsrwr.d $a1, $a0
+ jirl $zero, $ra, 0
+ .end
--
2.27.0
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next prev parent reply other threads:[~2024-02-02 2:28 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-02 2:26 [edk2-devel] [PATCH v1 00/19] Add LoongArch helper functions and defines Chao Li
2024-02-02 2:27 ` [edk2-devel] [PATCH v1 01/19] MdePkg: Add the header file named Csr.h for LoongArch64 Chao Li
2024-02-02 2:27 ` [edk2-devel] [PATCH v1 02/19] MdePkg: Add LoongArch64 FPU function set into BaseCpuLib Chao Li
2024-02-02 2:27 ` [edk2-devel] [PATCH v1 03/19] MdePkg: Add LoongArch64 exception function set into BaseLib Chao Li
2024-02-02 2:27 ` [edk2-devel] [PATCH v1 04/19] MdePkg: Add LoongArch64 local interrupt " Chao Li
2024-02-02 2:27 ` [edk2-devel] [PATCH v1 05/19] MdePkg: Add LoongArch Cpucfg function Chao Li
2024-02-02 2:27 ` [edk2-devel] [PATCH v1 06/19] MdePkg: Add read stable counter operation for LoongArch Chao Li
2024-02-02 2:27 ` [edk2-devel] [PATCH v1 07/19] MdePkg: Add CSR " Chao Li
2024-02-02 2:28 ` Chao Li [this message]
2024-02-02 2:28 ` [edk2-devel] [PATCH v1 09/19] MdePkg: Add a new library named PeiServicesTablePointerLibKs0 Chao Li
2024-02-02 2:28 ` [edk2-devel] [PATCH v1 10/19] MdePkg: Add some comments for LoongArch exceptions Chao Li
2024-02-02 2:28 ` [edk2-devel] [PATCH v1 11/19] EmbeddedPkg: Add PcdPrePiCpuIoSize width for LOONGARCH64 Chao Li
2024-02-02 2:28 ` [edk2-devel] [PATCH v1 12/19] ArmVirtPkg: Move PCD of FDT base address and FDT padding to OvmfPkg Chao Li
2024-02-02 2:28 ` [edk2-devel] [PATCH v1 13/19] UefiCpuPkg: Add a new CPU IO 2 driver named CpuMmio2Dxe Chao Li
2024-02-02 2:28 ` [edk2-devel] [PATCH v1 14/19] ArmVirtPkg: Enable CpuMmio2Dxe Chao Li
2024-02-02 2:28 ` [edk2-devel] [PATCH v1 15/19] OvmfPkg/RiscVVirt: " Chao Li
2024-02-02 2:28 ` [edk2-devel] [PATCH v1 16/19] OvmfPkg/RiscVVirt: Remove PciCpuIo2Dxe from RiscVVirt Chao Li
2024-02-02 2:28 ` [edk2-devel] [PATCH v1 17/19] ArmVirtPkg: Move the FdtSerialPortAddressLib to OvmfPkg Chao Li
2024-02-02 2:28 ` [edk2-devel] [PATCH v1 18/19] ArmVirtPkg: Move two PCD variables into OvmfPkg Chao Li
2024-02-02 2:29 ` [edk2-devel] [PATCH v1 19/19] ArmVirtPkg: Move PlatformBootManagerLib to OvmfPkg Chao Li
2024-02-02 14:56 ` [edk2-devel] [PATCH v1 00/19] Add LoongArch helper functions and defines Laszlo Ersek
2024-02-02 15:17 ` Ni, Ray
2024-02-02 16:14 ` Laszlo Ersek
2024-02-04 3:16 ` Chao Li
2024-02-05 7:34 ` Laszlo Ersek
2024-02-05 9:11 ` Chao Li
2024-02-06 15:52 ` 回复: " gaoliming via groups.io
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