From: "Tuan Phan" <tphan@ventanamicro.com>
To: devel@edk2.groups.io
Cc: michael.d.kinney@intel.com, gaoliming@byosoft.com.cn,
zhiguang.liu@intel.com, kraxel@redhat.com, lersek@redhat.com,
rahul1.kumar@intel.com, ray.ni@intel.com,
sunilvl@ventanamicro.com, jiewen.yao@intel.com,
andrei.warkentin@intel.com, ardb+tianocore@kernel.org,
Tuan Phan <tphan@ventanamicro.com>
Subject: [edk2-devel] [PATCH v2 2/3] UefiCpuPkg: RISC-V: MMU: Support Svpbmt extension
Date: Tue, 6 Feb 2024 17:29:09 -0800 [thread overview]
Message-ID: <20240207012910.2133-3-tphan@ventanamicro.com> (raw)
In-Reply-To: <20240207012910.2133-1-tphan@ventanamicro.com>
The GCD EFI_MEMORY_UC and EFI_MEMORY_WC attributes will be
supported when Svpbmt extension available.
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
---
.../Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c | 25 ++++++++++++++++++-
.../BaseRiscVMmuLib/BaseRiscVMmuLib.inf | 1 +
2 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c b/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c
index 826a1d32a1d4..c50a28e97e4b 100644
--- a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c
+++ b/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c
@@ -36,6 +36,15 @@
#define PTE_PPN_SHIFT 10
#define RISCV_MMU_PAGE_SHIFT 12
+#define RISCV_CPU_FEATURE_PBMT_BITMASK BIT2
+#define PTE_PBMT_NC BIT61
+#define PTE_PBMT_IO BIT62
+#define PTE_PBMT_MASK (PTE_PBMT_NC | PTE_PBMT_IO)
+
+#define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC | EFI_MEMORY_WC | \
+ EFI_MEMORY_WT | EFI_MEMORY_WB | \
+ EFI_MEMORY_UCE)
+
STATIC UINTN mModeSupport[] = { SATP_MODE_SV57, SATP_MODE_SV48, SATP_MODE_SV39, SATP_MODE_OFF };
STATIC UINTN mMaxRootTableLevel;
STATIC UINTN mBitPerLevel;
@@ -514,6 +523,20 @@ GcdAttributeToPageAttribute (
RiscVAttributes &= ~RISCV_PG_X;
}
+ if ((PcdGet64 (PcdRiscVFeatureOverride) & RISCV_CPU_FEATURE_PBMT_BITMASK) != 0) {
+ switch (GcdAttributes & EFI_MEMORY_CACHETYPE_MASK) {
+ case EFI_MEMORY_UC:
+ RiscVAttributes |= PTE_PBMT_IO;
+ break;
+ case EFI_MEMORY_WC:
+ RiscVAttributes |= PTE_PBMT_NC;
+ break;
+ default:
+ // Default PMA mode
+ break;
+ }
+ }
+
return RiscVAttributes;
}
@@ -559,7 +582,7 @@ RiscVSetMemoryAttributes (
BaseAddress,
Length,
PageAttributesSet,
- PTE_ATTRIBUTES_MASK,
+ PTE_ATTRIBUTES_MASK | PTE_PBMT_MASK,
(UINTN *)RiscVGetRootTranslateTable (),
TRUE
);
diff --git a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf b/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf
index 51ebe1750e97..1dbaa81f3608 100644
--- a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf
+++ b/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf
@@ -28,3 +28,4 @@
[Pcd]
gUefiCpuPkgTokenSpaceGuid.PcdCpuRiscVMmuMaxSatpMode ## CONSUMES
+ gEfiMdePkgTokenSpaceGuid.PcdRiscVFeatureOverride ## CONSUMES
--
2.25.1
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next prev parent reply other threads:[~2024-02-07 1:29 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-07 1:29 [edk2-devel] [PATCH v2 0/3] RISC-V: Support Svpbmt extension Tuan Phan
2024-02-07 1:29 ` [edk2-devel] [PATCH v2 1/3] MdePkg.dec: RISC-V: Define override bit for " Tuan Phan
2024-02-07 18:01 ` Laszlo Ersek
2024-02-07 1:29 ` Tuan Phan [this message]
2024-02-07 18:15 ` [edk2-devel] [PATCH v2 2/3] UefiCpuPkg: RISC-V: MMU: Support " Laszlo Ersek
2024-02-28 18:00 ` Tuan Phan
2024-02-07 1:29 ` [edk2-devel] [PATCH v2 3/3] OvmfPkg/RiscVVirt: Override " Tuan Phan
2024-02-07 20:02 ` Laszlo Ersek
2024-02-07 20:08 ` Tuan Phan
2024-02-15 5:42 ` [edk2-devel] [PATCH v2 0/3] RISC-V: Support " Andrei Warkentin
2024-02-15 6:16 ` Tuan Phan
[not found] ` <17B3F4C51A165C5A.28807@groups.io>
2024-02-27 4:34 ` Tuan Phan
2024-02-28 4:42 ` Sunil V L
2024-02-28 17:22 ` Tuan Phan
2024-03-02 3:36 ` Andrei Warkentin
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