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[174.249.152.52]) by smtp.gmail.com with ESMTPSA id c9-20020a6566c9000000b005d748902a01sm112903pgw.43.2024.02.06.17.29.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Feb 2024 17:29:28 -0800 (PST) From: "Tuan Phan" To: devel@edk2.groups.io Cc: michael.d.kinney@intel.com, gaoliming@byosoft.com.cn, zhiguang.liu@intel.com, kraxel@redhat.com, lersek@redhat.com, rahul1.kumar@intel.com, ray.ni@intel.com, sunilvl@ventanamicro.com, jiewen.yao@intel.com, andrei.warkentin@intel.com, ardb+tianocore@kernel.org, Tuan Phan Subject: [edk2-devel] [PATCH v2 2/3] UefiCpuPkg: RISC-V: MMU: Support Svpbmt extension Date: Tue, 6 Feb 2024 17:29:09 -0800 Message-Id: <20240207012910.2133-3-tphan@ventanamicro.com> In-Reply-To: <20240207012910.2133-1-tphan@ventanamicro.com> References: <20240207012910.2133-1-tphan@ventanamicro.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,tphan@ventanamicro.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=ftD3LOrH; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io The GCD EFI_MEMORY_UC and EFI_MEMORY_WC attributes will be supported when Svpbmt extension available. Signed-off-by: Tuan Phan --- .../Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c | 25 ++++++++++++++++++- .../BaseRiscVMmuLib/BaseRiscVMmuLib.inf | 1 + 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c b/UefiCpu= Pkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c index 826a1d32a1d4..c50a28e97e4b 100644 --- a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c +++ b/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c @@ -36,6 +36,15 @@ #define PTE_PPN_SHIFT 10=0D #define RISCV_MMU_PAGE_SHIFT 12=0D =0D +#define RISCV_CPU_FEATURE_PBMT_BITMASK BIT2=0D +#define PTE_PBMT_NC BIT61=0D +#define PTE_PBMT_IO BIT62=0D +#define PTE_PBMT_MASK (PTE_PBMT_NC | PTE_PBMT_IO)=0D +=0D +#define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC | EFI_MEMORY_WC | \=0D + EFI_MEMORY_WT | EFI_MEMORY_WB | \=0D + EFI_MEMORY_UCE)=0D +=0D STATIC UINTN mModeSupport[] =3D { SATP_MODE_SV57, SATP_MODE_SV48, SATP_MO= DE_SV39, SATP_MODE_OFF };=0D STATIC UINTN mMaxRootTableLevel;=0D STATIC UINTN mBitPerLevel;=0D @@ -514,6 +523,20 @@ GcdAttributeToPageAttribute ( RiscVAttributes &=3D ~RISCV_PG_X;=0D }=0D =0D + if ((PcdGet64 (PcdRiscVFeatureOverride) & RISCV_CPU_FEATURE_PBMT_BITMASK= ) !=3D 0) {=0D + switch (GcdAttributes & EFI_MEMORY_CACHETYPE_MASK) {=0D + case EFI_MEMORY_UC:=0D + RiscVAttributes |=3D PTE_PBMT_IO;=0D + break;=0D + case EFI_MEMORY_WC:=0D + RiscVAttributes |=3D PTE_PBMT_NC;=0D + break;=0D + default:=0D + // Default PMA mode=0D + break;=0D + }=0D + }=0D +=0D return RiscVAttributes;=0D }=0D =0D @@ -559,7 +582,7 @@ RiscVSetMemoryAttributes ( BaseAddress,=0D Length,=0D PageAttributesSet,=0D - PTE_ATTRIBUTES_MASK,=0D + PTE_ATTRIBUTES_MASK | PTE_PBMT_MASK,=0D (UINTN *)RiscVGetRootTranslateTable (),=0D TRUE=0D );=0D diff --git a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf b/UefiC= puPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf index 51ebe1750e97..1dbaa81f3608 100644 --- a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf +++ b/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf @@ -28,3 +28,4 @@ =0D [Pcd]=0D gUefiCpuPkgTokenSpaceGuid.PcdCpuRiscVMmuMaxSatpMode ## CONSUMES=0D + gEfiMdePkgTokenSpaceGuid.PcdRiscVFeatureOverride ## CONSUMES=0D --=20 2.25.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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