From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id C53C774003A for ; Tue, 20 Feb 2024 09:06:50 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=KIgfTMA61D9QHVM/z1t1O9k2VxkYv1DoXifAvZy2F+s=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding:Content-Type; s=20140610; t=1708420009; v=1; b=tI535Mk1WK9iIYZGvn5mD7k2BqsUPiNKeJ2m+pkP4U4WfoQbtKVWOjEr7DY6iSDF9aa/LwEc fHWrtwISsTUevDsYBVAuUkuB2yAuO0B2WDkStgTLf8oLLmNS44SMicy58Bvc1HELCdvWOKJh+i0 n1uckLNwPCvWYzwJi2y2sFUo= X-Received: by 127.0.0.2 with SMTP id MMuGYY7687511x9jhhD5pUJB; Tue, 20 Feb 2024 01:06:49 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by mx.groups.io with SMTP id smtpd.web10.9427.1708420008797607310 for ; Tue, 20 Feb 2024 01:06:48 -0800 X-Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-573-cxVitHK-N_SPrq8hl743LQ-1; Tue, 20 Feb 2024 04:06:44 -0500 X-MC-Unique: cxVitHK-N_SPrq8hl743LQ-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id BC23F1C06905; Tue, 20 Feb 2024 09:06:43 +0000 (UTC) X-Received: from sirius.home.kraxel.org (unknown [10.39.193.175]) by smtp.corp.redhat.com (Postfix) with ESMTPS id B00918077; Tue, 20 Feb 2024 09:06:42 +0000 (UTC) X-Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 050BA1800DF8; Tue, 20 Feb 2024 10:06:40 +0100 (CET) From: "Gerd Hoffmann" To: devel@edk2.groups.io Cc: Liming Gao , Michael Roth , Oliver Steffen , Erdem Aktas , Tom Lendacky , Laszlo Ersek , Min Xu , Ard Biesheuvel , Jiewen Yao , Gerd Hoffmann Subject: [edk2-devel] [PATCH v3 2/6] MdeModulePkg/DxeIplPeim: rename variable Date: Tue, 20 Feb 2024 10:06:35 +0100 Message-ID: <20240220090639.472222-3-kraxel@redhat.com> In-Reply-To: <20240220090639.472222-1-kraxel@redhat.com> References: <20240220090639.472222-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.5 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,kraxel@redhat.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: Oz4qtHP6zGiUZSSNnbTqrdp2x7686176AA= Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="US-ASCII"; x-default=true X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=tI535Mk1; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=redhat.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Rename Page5LevelSupported to Page5LevelEnabled. The variable is set to true in case 5-paging level is enabled (64-bit PEI) or will be enabled (32-bit PEI), it does *not* tell whenever the 5-level paging is supported by the CPU. Signed-off-by: Gerd Hoffmann Reviewed-by: Laszlo Ersek --- .../Core/DxeIplPeim/X64/VirtualMemory.c | 22 +++++++++---------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c index 1d240e95966e..df6196a41cd5 100644 --- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c +++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c @@ -696,7 +696,7 @@ CreateIdentityMappingPageTables ( UINTN TotalPagesNum; UINTN BigPageAddress; VOID *Hob; - BOOLEAN Page5LevelSupport; + BOOLEAN Page5LevelEnabled; BOOLEAN Page1GSupport; PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry; UINT64 AddressEncMask; @@ -744,15 +744,15 @@ CreateIdentityMappingPageTables ( // If cpu has already run in 64bit long mode PEI, Page table Level in DXE must align with previous level. // Cr4.UintN = AsmReadCr4 (); - Page5LevelSupport = (Cr4.Bits.LA57 != 0); - if (Page5LevelSupport) { + Page5LevelEnabled = (Cr4.Bits.LA57 != 0); + if (Page5LevelEnabled) { ASSERT (PcdGetBool (PcdUse5LevelPageTable)); } } else { // // If cpu runs in 32bit protected mode PEI, Page table Level in DXE is decided by PCD and feature capability. // - Page5LevelSupport = FALSE; + Page5LevelEnabled = FALSE; if (PcdGetBool (PcdUse5LevelPageTable)) { AsmCpuidEx ( CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, @@ -763,12 +763,12 @@ CreateIdentityMappingPageTables ( NULL ); if (EcxFlags.Bits.FiveLevelPage != 0) { - Page5LevelSupport = TRUE; + Page5LevelEnabled = TRUE; } } } - DEBUG ((DEBUG_INFO, "AddressBits=%u 5LevelPaging=%u 1GPage=%u\n", PhysicalAddressBits, Page5LevelSupport, Page1GSupport)); + DEBUG ((DEBUG_INFO, "AddressBits=%u 5LevelPaging=%u 1GPage=%u\n", PhysicalAddressBits, Page5LevelEnabled, Page1GSupport)); // // IA-32e paging translates 48-bit linear addresses to 52-bit physical addresses @@ -776,7 +776,7 @@ CreateIdentityMappingPageTables ( // due to either unsupported by HW, or disabled by PCD. // ASSERT (PhysicalAddressBits <= 52); - if (!Page5LevelSupport && (PhysicalAddressBits > 48)) { + if (!Page5LevelEnabled && (PhysicalAddressBits > 48)) { PhysicalAddressBits = 48; } @@ -811,7 +811,7 @@ CreateIdentityMappingPageTables ( // // Substract the one page occupied by PML5 entries if 5-Level Paging is disabled. // - if (!Page5LevelSupport) { + if (!Page5LevelEnabled) { TotalPagesNum--; } @@ -831,7 +831,7 @@ CreateIdentityMappingPageTables ( // By architecture only one PageMapLevel4 exists - so lets allocate storage for it. // PageMap = (VOID *)BigPageAddress; - if (Page5LevelSupport) { + if (Page5LevelEnabled) { // // By architecture only one PageMapLevel5 exists - so lets allocate storage for it. // @@ -853,7 +853,7 @@ CreateIdentityMappingPageTables ( PageMapLevel4Entry = (VOID *)BigPageAddress; BigPageAddress += SIZE_4KB; - if (Page5LevelSupport) { + if (Page5LevelEnabled) { // // Make a PML5 Entry // @@ -947,7 +947,7 @@ CreateIdentityMappingPageTables ( ZeroMem (PageMapLevel4Entry, (512 - IndexOfPml4Entries) * sizeof (PAGE_MAP_AND_DIRECTORY_POINTER)); } - if (Page5LevelSupport) { + if (Page5LevelEnabled) { Cr4.UintN = AsmReadCr4 (); Cr4.Bits.LA57 = 1; AsmWriteCr4 (Cr4.UintN); -- 2.43.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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