From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 61EB774003B for ; Thu, 22 Feb 2024 10:54:18 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=JrL9zTHB5WMw1EptnsGOVL8Aw+77qQON0drgCUpr1ec=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding:Content-Type; s=20140610; t=1708599256; v=1; b=Fwb9CYha5G3wR1oWi+4nXxWPBi6Zg2BBwUCo+eH09dpLSZkQQhEJk2b+CO8+NVk1auzSGdYn LACCf0jO7XNGaOWl7WSmMlkNgUDfJPu3Rc2RKpRYoG8nWSaMbsP733rrmSJ+0Rfkk67289LKr41 cSJ/2Q+4MSH2psRSeFPvFjlY= X-Received: by 127.0.0.2 with SMTP id RH6oYY7687511xwK1Gz8qNhU; Thu, 22 Feb 2024 02:54:16 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mx.groups.io with SMTP id smtpd.web10.10182.1708599256307653671 for ; Thu, 22 Feb 2024 02:54:16 -0800 X-Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-588-hy3D31lqPeuQ2nXgXtCmYw-1; Thu, 22 Feb 2024 05:54:12 -0500 X-MC-Unique: hy3D31lqPeuQ2nXgXtCmYw-1 X-Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 73C851065066; Thu, 22 Feb 2024 10:54:11 +0000 (UTC) X-Received: from sirius.home.kraxel.org (unknown [10.39.192.237]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 7B5D81C060AF; Thu, 22 Feb 2024 10:54:10 +0000 (UTC) X-Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 254A818017F6; Thu, 22 Feb 2024 11:54:07 +0100 (CET) From: "Gerd Hoffmann" To: devel@edk2.groups.io Cc: Michael Roth , Jiewen Yao , Liming Gao , Laszlo Ersek , Tom Lendacky , Paolo Bonzini , Ard Biesheuvel , Gerd Hoffmann , Min Xu , Erdem Aktas , Oliver Steffen , Ard Biesheuvel Subject: [edk2-devel] [PATCH v4 3/3] OvmfPkg/PlatformInitLib: add 5-level paging support Date: Thu, 22 Feb 2024 11:54:07 +0100 Message-ID: <20240222105407.75735-4-kraxel@redhat.com> In-Reply-To: <20240222105407.75735-1-kraxel@redhat.com> References: <20240222105407.75735-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.7 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,kraxel@redhat.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: prXEbXmxtizFHcZ8KMZdbhFAx7686176AA= Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="US-ASCII"; x-default=true X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=Fwb9CYha; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=redhat.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Adjust physical address space logic for la57 mode (5-level paging). With a larger logical address space we can identity-map a larger physical address space. Signed-off-by: Gerd Hoffmann Reviewed-by: Laszlo Ersek Acked-by: Ard Biesheuvel --- OvmfPkg/Library/PlatformInitLib/MemDetect.c | 63 ++++++++++++++------- 1 file changed, 44 insertions(+), 19 deletions(-) diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/PlatformInitLib/MemDetect.c index f042517bb64a..7b6e5102ad55 100644 --- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c +++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c @@ -628,11 +628,12 @@ PlatformAddressWidthFromCpuid ( IN BOOLEAN QemuQuirk ) { - UINT32 RegEax, RegEbx, RegEcx, RegEdx, Max; - UINT8 PhysBits; - CHAR8 Signature[13]; - BOOLEAN Valid = FALSE; - BOOLEAN Page1GSupport = FALSE; + UINT32 RegEax, RegEbx, RegEcx, RegEdx, Max; + UINT8 PhysBits; + CHAR8 Signature[13]; + IA32_CR4 Cr4; + BOOLEAN Valid = FALSE; + BOOLEAN Page1GSupport = FALSE; ZeroMem (Signature, sizeof (Signature)); @@ -670,30 +671,54 @@ PlatformAddressWidthFromCpuid ( } } + Cr4.UintN = AsmReadCr4 (); + DEBUG (( DEBUG_INFO, - "%a: Signature: '%a', PhysBits: %d, QemuQuirk: %a, Valid: %a\n", + "%a: Signature: '%a', PhysBits: %d, QemuQuirk: %a, la57: %a, Valid: %a\n", __func__, Signature, PhysBits, QemuQuirk ? "On" : "Off", + Cr4.Bits.LA57 ? "On" : "Off", Valid ? "Yes" : "No" )); if (Valid) { - if (PhysBits > 46) { - /* - * Avoid 5-level paging altogether for now, which limits - * PhysBits to 48. Also avoid using address bit 48, due to sign - * extension we can't identity-map these addresses (and lots of - * places in edk2 assume we have everything identity-mapped). - * So the actual limit is 47. - * - * Also some older linux kernels apparently have problems handling - * phys-bits > 46 correctly, so use that as limit. - */ - DEBUG ((DEBUG_INFO, "%a: limit PhysBits to 46 (avoid 5-level paging)\n", __func__)); - PhysBits = 46; + /* + * Due to the sign extension we can use only the lower half of the + * virtual address space to identity-map physical address space, + * which gives us a 47 bit wide address space with 4 paging levels + * and a 56 bit wide address space with 5 paging levels. + */ + if (Cr4.Bits.LA57) { + if (PhysBits > 48) { + /* + * Some Intel CPUs support 5-level paging, have more than 48 + * phys-bits but support only 4-level EPT, which effectively + * limits guest phys-bits to 48. + * + * AMD Processors have a different but somewhat related + * problem: They can handle guest phys-bits larger than 48 + * only in case the host runs in 5-level paging mode. + * + * Until we have some way to communicate that kind of + * limitations from hypervisor to guest, limit phys-bits + * to 48 unconditionally. + */ + DEBUG ((DEBUG_INFO, "%a: limit PhysBits to 48 (5-level paging)\n", __func__)); + PhysBits = 48; + } + } else { + if (PhysBits > 46) { + /* + * Some older linux kernels apparently have problems handling + * phys-bits > 46 correctly, so use that instead of 47 as + * limit. + */ + DEBUG ((DEBUG_INFO, "%a: limit PhysBits to 46 (4-level paging)\n", __func__)); + PhysBits = 46; + } } if (!Page1GSupport && (PhysBits > 40)) { -- 2.43.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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