From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 84C697803CC for ; Fri, 1 Mar 2024 07:44:19 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=DZQk9Elm9zpI+tELvGeSt4d0zIl99Fjkmyq9609xobY=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding:Content-Type; s=20140610; t=1709279058; v=1; b=S9t9lb93wVPTlQnb6EKMU3SNTAMsD4wHD34AKX1sRqD+WpNPzAL2IJcOAj/OnPGx7GmRrgtM +oUYRDmeKocYJukeO8rkyS/IqC3UIHOpnLhD62thCtAR6Rk86Lc1g15ffZDi6iHWuNCP743MqN7 c6cH8p2Ttce+01K1s1q5dJ08= X-Received: by 127.0.0.2 with SMTP id baNeYY7687511xm4Bvh9mOe6; Thu, 29 Feb 2024 23:44:18 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mx.groups.io with SMTP id smtpd.web11.17788.1709279057392932284 for ; Thu, 29 Feb 2024 23:44:17 -0800 X-Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-208-AHfX3Bd0NYW8dowgGbziIg-1; Fri, 01 Mar 2024 02:44:13 -0500 X-MC-Unique: AHfX3Bd0NYW8dowgGbziIg-1 X-Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id F232B185A788; Fri, 1 Mar 2024 07:44:12 +0000 (UTC) X-Received: from sirius.home.kraxel.org (unknown [10.39.192.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 3ED62492BC6; Fri, 1 Mar 2024 07:44:12 +0000 (UTC) X-Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id EC81F18014A5; Fri, 1 Mar 2024 08:44:02 +0100 (CET) From: "Gerd Hoffmann" To: devel@edk2.groups.io Cc: Jiewen Yao , Oliver Steffen , Laszlo Ersek , Michael Roth , Erdem Aktas , Gerd Hoffmann , Min Xu , Ard Biesheuvel , Tom Lendacky Subject: [edk2-devel] [PATCH v2 10/10] OvmfPkg/ResetVector: wire up 5-level paging for SEV Date: Fri, 1 Mar 2024 08:44:02 +0100 Message-ID: <20240301074402.98625-11-kraxel@redhat.com> In-Reply-To: <20240301074402.98625-1-kraxel@redhat.com> References: <20240301074402.98625-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.9 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,kraxel@redhat.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: HhFkR1ruAw2fIyE1bqxvzZO6x7686176AA= Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="US-ASCII"; x-default=true X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=S9t9lb93; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=redhat.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Turn the GetSevCBitMaskAbove31 OneTimeCall into a macro because we need that twice (for 4-level and 5-level paging). Change include order to allow AmdSev.asm macros being used in PageTables64.asm. Signed-off-by: Gerd Hoffmann --- OvmfPkg/ResetVector/Ia32/AmdSev.asm | 16 ++++++++-------- OvmfPkg/ResetVector/Ia32/PageTables64.asm | 14 +++++++++++++- OvmfPkg/ResetVector/ResetVector.nasmb | 4 ++-- 3 files changed, 23 insertions(+), 11 deletions(-) diff --git a/OvmfPkg/ResetVector/Ia32/AmdSev.asm b/OvmfPkg/ResetVector/Ia32/AmdSev.asm index cbb86871636f..c577f5572f04 100644 --- a/OvmfPkg/ResetVector/Ia32/AmdSev.asm +++ b/OvmfPkg/ResetVector/Ia32/AmdSev.asm @@ -146,6 +146,14 @@ BITS 32 jmp %%TerminateHlt %endmacro +; Get the C-bit mask above 31. +; Modified: EDX +; +; The value is returned in the EDX +%macro GetSevCBitMaskAbove31 0 + mov edx, dword[SEV_ES_WORK_AREA_ENC_MASK + 4] +%endmacro + ; Terminate the guest due to unexpected response code. SevEsUnexpectedRespTerminate: TerminateVmgExit TERM_UNEXPECTED_RESP_CODE @@ -191,14 +199,6 @@ pageTableEntries4kLoop: SevClearPageEncMaskForGhcbPageExit: OneTimeCallRet SevClearPageEncMaskForGhcbPage -; Get the C-bit mask above 31. -; Modified: EDX -; -; The value is returned in the EDX -GetSevCBitMaskAbove31: - mov edx, dword[SEV_ES_WORK_AREA_ENC_MASK + 4] - OneTimeCallRet GetSevCBitMaskAbove31 - %endif ; Check if Secure Encrypted Virtualization (SEV) features are enabled. diff --git a/OvmfPkg/ResetVector/Ia32/PageTables64.asm b/OvmfPkg/ResetVector/Ia32/PageTables64.asm index 29ce155eed8d..92d134441abe 100644 --- a/OvmfPkg/ResetVector/Ia32/PageTables64.asm +++ b/OvmfPkg/ResetVector/Ia32/PageTables64.asm @@ -247,11 +247,23 @@ SevInit: ; SEV workflow ; ClearOvmfPageTables +%if PG_5_LEVEL + Check5LevelPaging Sev4Level ; If SEV is enabled, the C-bit position is always above 31. ; The mask will be saved in the EDX and applied during the ; the page table build below. - OneTimeCall GetSevCBitMaskAbove31 + GetSevCBitMaskAbove31 + CreatePageTables5Level edx + Enable5LevelPaging + jmp SevCommon +Sev4Level: +%endif + ; If SEV is enabled, the C-bit position is always above 31. + ; The mask will be saved in the EDX and applied during the + ; the page table build below. + GetSevCBitMaskAbove31 CreatePageTables4Level edx +SevCommon: ; Clear the C-bit from the GHCB page if the SEV-ES is enabled. OneTimeCall SevClearPageEncMaskForGhcbPage OneTimeCall SevClearVcHandlerAndStack diff --git a/OvmfPkg/ResetVector/ResetVector.nasmb b/OvmfPkg/ResetVector/ResetVector.nasmb index 2bd80149e58b..ba83bc7b3124 100644 --- a/OvmfPkg/ResetVector/ResetVector.nasmb +++ b/OvmfPkg/ResetVector/ResetVector.nasmb @@ -92,6 +92,8 @@ %define SNP_SEC_MEM_BASE_DESC_3 (CPUID_BASE + CPUID_SIZE + SEV_SNP_KERNEL_HASHES_SIZE) %define SNP_SEC_MEM_SIZE_DESC_3 (FixedPcdGet32 (PcdOvmfPeiMemFvBase) - SNP_SEC_MEM_BASE_DESC_3) +%include "Ia32/AmdSev.asm" + %ifdef ARCH_X64 #include @@ -144,8 +146,6 @@ %include "X64/OvmfSevMetadata.asm" %endif -%include "Ia32/AmdSev.asm" - %include "Ia16/Real16ToFlat32.asm" %include "Ia16/Init16.asm" -- 2.44.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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