* [edk2-devel] [PATCH 1/4] AMD/AmdPlatformPkg: Use HpetTimerDxe to replace 8254Timer.
2024-03-11 7:22 [edk2-devel] [PATCH 0/4] Update Vangogh platform reference code Zhai, MingXin (Duke) via groups.io
@ 2024-03-11 7:22 ` Zhai, MingXin (Duke) via groups.io
2024-03-11 7:22 ` [edk2-devel] [PATCH 2/4] AMD/AmdPlatformPkg: Fix Bug Microcode version cannot show correctly at BIOS setup Zhai, MingXin (Duke) via groups.io
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Zhai, MingXin (Duke) via groups.io @ 2024-03-11 7:22 UTC (permalink / raw)
To: devel; +Cc: Abner Chang, Igniculus Fu, Ken Yao, Eric Xing
From: Duke Zhai <Duke.Zhai@amd.com>
BZ #:4718
As the new EDK2 no supports 8254 timer, so used HpetTimer to replace it.
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igniculus Fu <igniculus.fu@amd.com>
Reviewed-by: Ken Yao <ken.yao@amd.com>
Reviewed-by: Eric Xing <eric.xing@amd.com>
Signed-off-by: Duke Zhai <Duke.Zhai@amd.com>
---
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Project.dsc | 2 --
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Project.fdf | 3 +--
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Project.dsc b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Project.dsc
index 510ce10c0c..20f06dd851 100644
--- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Project.dsc
+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Project.dsc
@@ -745,8 +745,6 @@
MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
FatPkg/EnhancedFatDxe/Fat.inf
PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
- OvmfPkg/8259InterruptControllerDxe/8259.inf
- OvmfPkg/8254TimerDxe/8254Timer.inf
MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Project.fdf b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Project.fdf
index 5194a8c10d..0d844689b3 100644
--- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Project.fdf
+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Project.fdf
@@ -416,8 +416,7 @@ NumBlocks = 0x100
# Platform
#
INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
- INF OvmfPkg/8259InterruptControllerDxe/8259.inf
- INF OvmfPkg/8254TimerDxe/8254Timer.inf
+ INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
#
# ACPI
--
2.31.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [edk2-devel] [PATCH 2/4] AMD/AmdPlatformPkg: Fix Bug Microcode version cannot show correctly at BIOS setup
2024-03-11 7:22 [edk2-devel] [PATCH 0/4] Update Vangogh platform reference code Zhai, MingXin (Duke) via groups.io
2024-03-11 7:22 ` [edk2-devel] [PATCH 1/4] AMD/AmdPlatformPkg: Use HpetTimerDxe to replace 8254Timer Zhai, MingXin (Duke) via groups.io
@ 2024-03-11 7:22 ` Zhai, MingXin (Duke) via groups.io
2024-03-11 7:22 ` [edk2-devel] [PATCH 3/4] AMD/AmdPlatformPkg: Enable capsule at linux build Zhai, MingXin (Duke) via groups.io
2024-03-11 7:22 ` [edk2-devel] [PATCH 4/4] AMD/AmdPlatformPkg: Update FspWrapper UPD table for BIOS setup options Zhai, MingXin (Duke) via groups.io
3 siblings, 0 replies; 5+ messages in thread
From: Zhai, MingXin (Duke) via groups.io @ 2024-03-11 7:22 UTC (permalink / raw)
To: devel; +Cc: Abner Chang, Igniculus Fu, Ken Yao, Eric Xing
From: Duke Zhai <Duke.Zhai@amd.com>
BZ #:4719
Microcode not load correct cause BIOS setup not show microcode version, modify Microcode binary's instance to fixed this issue.
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igniculus Fu <igniculus.fu@amd.com>
Reviewed-by: Ken Yao <ken.yao@amd.com>
Reviewed-by: Eric Xing <eric.xing@amd.com>
Signed-off-by: Duke Zhai <Duke.Zhai@amd.com>
---
.../AMD/VanGoghBoard/ChachaniBoardPkg/BIOSImageDirectory32M.xml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/BIOSImageDirectory32M.xml b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/BIOSImageDirectory32M.xml
index 22af6623e2..585e12d487 100644
--- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/BIOSImageDirectory32M.xml
+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/BIOSImageDirectory32M.xml
@@ -57,7 +57,7 @@
<IMAGE_ENTRY Type="0x65" Instance="0x01" SubProgram="0x0" File="TypeId0x65D0.csbin" />
<IMAGE_ENTRY Type="0x64" Instance="0x02" SubProgram="0x0" File="TypeId0x64L1.csbin" />
<IMAGE_ENTRY Type="0x65" Instance="0x02" SubProgram="0x0" File="TypeId0x65D1.csbin" />
- <IMAGE_ENTRY Type="0x66" Instance="0x03" File="TypeId0x66.bin" />
+ <IMAGE_ENTRY Type="0x66" Instance="0x00" File="TypeId0x66.bin" />
<IMAGE_ENTRY Type="0x6A" File="TypeId0x6A.sbin" />
</BIOS_DIR>
</DIRS>
--
2.31.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [edk2-devel] [PATCH 3/4] AMD/AmdPlatformPkg: Enable capsule at linux build
2024-03-11 7:22 [edk2-devel] [PATCH 0/4] Update Vangogh platform reference code Zhai, MingXin (Duke) via groups.io
2024-03-11 7:22 ` [edk2-devel] [PATCH 1/4] AMD/AmdPlatformPkg: Use HpetTimerDxe to replace 8254Timer Zhai, MingXin (Duke) via groups.io
2024-03-11 7:22 ` [edk2-devel] [PATCH 2/4] AMD/AmdPlatformPkg: Fix Bug Microcode version cannot show correctly at BIOS setup Zhai, MingXin (Duke) via groups.io
@ 2024-03-11 7:22 ` Zhai, MingXin (Duke) via groups.io
2024-03-11 7:22 ` [edk2-devel] [PATCH 4/4] AMD/AmdPlatformPkg: Update FspWrapper UPD table for BIOS setup options Zhai, MingXin (Duke) via groups.io
3 siblings, 0 replies; 5+ messages in thread
From: Zhai, MingXin (Duke) via groups.io @ 2024-03-11 7:22 UTC (permalink / raw)
To: devel; +Cc: Abner Chang, Igniculus Fu, Ken Yao, Eric Xing
From: Duke Zhai <Duke.Zhai@amd.com>
BZ #:4720
Linux build script include capsule build.
Fix winodws capsule build issue.
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igniculus Fu <igniculus.fu@amd.com>
Reviewed-by: Ken Yao <ken.yao@amd.com>
Reviewed-by: Eric Xing <eric.xing@amd.com>
Signed-off-by: Duke Zhai <Duke.Zhai@amd.com>
---
.../ChachaniBoardPkg/GenCapsule.bat | 2 +-
.../VanGoghBoard/ChachaniBoardPkg/build.sh | 22 +++++++++++++++++--
2 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/GenCapsule.bat b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/GenCapsule.bat
index 7dca22a4e3..c55f561772 100644
--- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/GenCapsule.bat
+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/GenCapsule.bat
@@ -36,7 +36,7 @@ if not exist %WORKSPACE%\%BIOS_FILE_NAME% (
goto ERROR
)
- Setup OpenSSL Command Line Environment
+echo Setup OpenSSL Command Line Environment
if not "%OPENSSL_PATH%" == "" (
set OPENSSL_PATH_TEMP=%OPENSSL_PATH%
)
diff --git a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/build.sh b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/build.sh
index f4652e91c6..0984876ef2 100644
--- a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/build.sh
+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/build.sh
@@ -1,3 +1,4 @@
+#!/bin/bash
## @file
# Linux build script file to launch Chachani Board BIOS build
#
@@ -22,6 +23,7 @@ export OemBoard=Chachani
export PLATFORM_PATH=edk2-platforms/Platform/AMD/VanGoghBoard
export BUILD_TYPE=RELEASE
export TOOLCHAIN_TAG=CLANGPDB
+export OTA_CAPSULE_NAME=OTACAPSULE # You need to keep this name sync with PlatformCapsule.fdf
#TRUE / FALSE
export COMPRESS_FSP_REGION=TRUE
export KEY_MODE=TK
@@ -35,16 +37,25 @@ export NASM_PREFIX=
export GCC5_BIN=
#CLANG_BIN shall end with a slash.
export CLANG_BIN=
+#OPENSSL_PATH shall end with a slash.
+export OPENSSL_PATH=
echo "Building for ${OemBoard} board, ${BUILD_TYPE} mode with ${TOOLCHAIN_TAG}."
-echo "IASL: ${IASL_PREFIX}iasl, NASM: ${NASM_PREFIX}nasm, GCC: ${GCC5_BIN}gcc, CLANG:${CLANG_BIN}clang."
+echo "IASL: ${IASL_PREFIX}iasl, NASM: ${NASM_PREFIX}nasm, GCC: ${GCC5_BIN}gcc, CLANG:${CLANG_BIN}clang, OPENSSL:${OPENSSL_PATH}openssl."
[[ ${COMPRESS_FSP_REGION} == "TRUE" ]] && echo "FSP will be built with compress support."
# Env check
echo_section "Checking compilation environment"
[[ "${IASL_PREFIX}" == "" ]] && export IASL_PREFIX=$(dirname $(which iasl))/
[[ "${NASM_PREFIX}" == "" ]] && export NASM_PREFIX=$(dirname $(which nasm))/
+[[ "${OPENSSL_PATH}" == "" ]] && export OPENSSL_PATH=$(dirname $(which openssl))/
[[ -f ${IASL_PREFIX}iasl ]] || (echo "IASL not found! Please specify IASL_PREFIX!";exit -1)
-[[ -f ${IASL_PREFIX}nasm ]] || (echo "NASM not found! Please specify NASM_PREFIX!";exit -1)
+[[ -f ${NASM_PREFIX}nasm ]] || (echo "NASM not found! Please specify NASM_PREFIX!";exit -1)
+[[ -f ${OPENSSL_PATH}openssl ]] || (echo "OpenSSL not found! Please specify OPENSSL_PATH!";exit -1)
+
+echo "IASL version $(LC_ALL=C ${IASL_PREFIX}iasl -v | sed -n '3,3p' | cut -d' ' -f5) detected."
+echo "NASM version $(LC_ALL=C ${NASM_PREFIX}nasm --version | head -n1 | cut -d' ' -f3) detected."
+echo "OpenSSL version $(LC_ALL=C ${OPENSSL_PATH}openssl version | head -n1 | cut -d' ' -f2) detected."
+
if [ ${TOOLCHAIN_TAG} != "CLANGPDB" ]
then
[[ "${GCC5_BIN}" == "" ]] && export GCC5_BIN=$(dirname $(which gcc))/
@@ -174,4 +185,11 @@ python3 FlashABImage32M.py ${F1_ECSIG} ${F2_EC} ${F3_EFS} ${F4_PSP_L1_DIRECTORY}
${F6_SLOT_HEADER_1} ${F7_SLOT_HEADER_2} ${F8_SLOT_A} ${F9_SLOT_B} ${F10_OUT_IMAGE}
popd
+echo_section "Generating Capsule image"
+rm -r ${WORKSPACE}/Build/ChachaniBoardPkg/${BUILD_TYPE}_${TOOLCHAIN_TAG}/FV/SYSTEMFIRMWAREUPDATECARGO*
+touch ${WORKSPACE}/Build/ChachaniBoardPkg/${BUILD_TYPE}_${TOOLCHAIN_TAG}/FV/SYSTEMFIRMWAREUPDATECARGO.Fv
+build -p ${PROJECT_PKG}/PlatformCapsule.dsc -t ${TOOLCHAIN_TAG} -b ${BUILD_TYPE} -D BIOS_FILE=${BIOSNAME}UDK.FD
+[[ $? -ne 0 ]] && exit -1
+cp ${WORKSPACE}/Build/ChachaniBoardPkg/${BUILD_TYPE}_${TOOLCHAIN_TAG}/FV/${OTA_CAPSULE_NAME}.Cap .
+
echo_section "Build success @ $(date)"
--
2.31.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [edk2-devel] [PATCH 4/4] AMD/AmdPlatformPkg: Update FspWrapper UPD table for BIOS setup options
2024-03-11 7:22 [edk2-devel] [PATCH 0/4] Update Vangogh platform reference code Zhai, MingXin (Duke) via groups.io
` (2 preceding siblings ...)
2024-03-11 7:22 ` [edk2-devel] [PATCH 3/4] AMD/AmdPlatformPkg: Enable capsule at linux build Zhai, MingXin (Duke) via groups.io
@ 2024-03-11 7:22 ` Zhai, MingXin (Duke) via groups.io
3 siblings, 0 replies; 5+ messages in thread
From: Zhai, MingXin (Duke) via groups.io @ 2024-03-11 7:22 UTC (permalink / raw)
To: devel; +Cc: Abner Chang, Igniculus Fu, Ken Yao, Eric Xing
From: Duke Zhai <Duke.Zhai@amd.com>
BZ #:4728
1.Remove useless options like I2C enable
2.Add new option:SocVoltage
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igniculus Fu <igniculus.fu@amd.com>
Reviewed-by: Ken Yao <ken.yao@amd.com>
Reviewed-by: Eric Xing <eric.xing@amd.com>
Signed-off-by: Duke Zhai <Duke.Zhai@amd.com>
---
.../edk2/Fsp2WrapperPkg/Include/FspmUpd.h | 71 ++++++++++---------
.../FspWrapperPlatformLibSample.c | 29 --------
2 files changed, 36 insertions(+), 64 deletions(-)
diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Include/FspmUpd.h b/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Include/FspmUpd.h
index 8cadbe430a..875461a58a 100644
--- a/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Include/FspmUpd.h
+++ b/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Include/FspmUpd.h
@@ -16,41 +16,42 @@
/** Fsp M Configuration
**/
typedef struct {
- /** Offset 0x0040**/ UINT32 bert_size;
- /** Offset 0x0044**/ UINT32 tseg_size;
- /** Offset 0x0048**/ UINT32 dxio_descriptor_table_pointer;
- /** Offset 0x004C**/ UINT32 pcie_reset_function_pointer;
- /** Offset 0x0050**/ UINT32 ddi_descriptor_table_pointer;
- /** Offset 0x0054**/ UINT32 temp_memory_base_addr;
- /** Offset 0x0058**/ UINT32 temp_memory_size;
- /** Offset 0x005C**/ UINT32 fsp_o_pei_volume_address;
- /** Offset 0x0060**/ UINT32 fsp_o_pei_upd_address;
- /** Offset 0x0064**/ UINT32 pei_reset_ppi_addr;
- /** Offset 0x0068**/ UINT32 resource_size_for_each_rb_ptr;
- /** Offset 0x006C**/ UINT32 resource_size_for_each_rb_size;
- /** Offset 0x0070**/ UINT32 total_number_of_root_bridges_ptr;
- /** Offset 0x0074**/ UINT32 total_number_of_root_bridges_size;
- /** Offset 0x0078**/ UINT32 amd_pbs_setup_ptr;
- /** Offset 0x007C**/ UINT32 amd_pbs_setup_size;
- /** Offset 0x0080**/ UINT32 ap_sync_flag_nv_ptr;
- /** Offset 0x0084**/ UINT32 ap_sync_flag_nv_size;
- /** Offset 0x0088**/ UINT8 DbgFchUsbUsb0DrdMode;
- /** Offset 0x0089**/ UINT8 DbgFchUsbUsb2DrdMode;
- /** Offset 0x008A**/ UINT32 CmnGnbGfxUmaFrameBufferSize;
- /** Offset 0x008E**/ UINT8 CmnGnbNbIOMMU;
- /** Offset 0x008F**/ UINT32 DbgFastPPTLimit;
- /** Offset 0x0093**/ UINT32 DbgSlowPPTLimit;
- /** Offset 0x0097**/ UINT32 CmnCpuVoltageOffset;
- /** Offset 0x009B**/ UINT32 CmnGpuVoltageOffset;
- /** Offset 0x009F**/ UINT32 CmnSocVoltageOffset;
- /** Offset 0x00A3**/ UINT8 CmnGnbGfxUmaMode;
- /** Offset 0x00A4**/ UINT8 CmnFchI2C0Config;
- /** Offset 0x00A5**/ UINT8 CmnFchI2C1Config;
- /** Offset 0x00A6**/ UINT8 CmnFchI2C2Config;
- /** Offset 0x00A7**/ UINT8 CmnFchI2C3Config;
- /** Offset 0x00A8**/ UINT32 ids_nv_table_address;
- /** Offset 0x00AC**/ UINT32 ids_nv_table_size;
- /** Offset 0x00B0**/ UINT16 UpdTerminator;
+ /** Offset 0x0040**/ UINT32 bert_size;
+ /** Offset 0x0044**/ UINT32 tseg_size;
+ /** Offset 0x0048**/ UINT32 dxio_descriptor_table_pointer;
+ /** Offset 0x004C**/ UINT32 pcie_reset_function_pointer;
+ /** Offset 0x0050**/ UINT32 ddi_descriptor_table_pointer;
+ /** Offset 0x0054**/ UINT32 temp_memory_base_addr;
+ /** Offset 0x0058**/ UINT32 temp_memory_size;
+ /** Offset 0x005C**/ UINT32 fsp_o_pei_volume_address;
+ /** Offset 0x0060**/ UINT32 fsp_o_pei_upd_address;
+ /** Offset 0x0064**/ UINT32 pei_reset_ppi_addr;
+ /** Offset 0x0068**/ UINT32 resource_size_for_each_rb_ptr;
+ /** Offset 0x006C**/ UINT32 resource_size_for_each_rb_size;
+ /** Offset 0x0070**/ UINT32 total_number_of_root_bridges_ptr;
+ /** Offset 0x0074**/ UINT32 total_number_of_root_bridges_size;
+ /** Offset 0x0078**/ UINT32 amd_pbs_setup_ptr;
+ /** Offset 0x007C**/ UINT32 amd_pbs_setup_size;
+ /** Offset 0x0080**/ UINT32 ap_sync_flag_nv_ptr;
+ /** Offset 0x0084**/ UINT32 ap_sync_flag_nv_size;
+ /** Offset 0x0088**/ UINT8 FchUsbUsb0DrdMode;
+ /** Offset 0x0089**/ UINT8 FchUsbUsb2DrdMode;
+ /** Offset 0x008A**/ UINT8 CmnGnbGfxUmaMode;
+ /** Offset 0x008B**/ UINT32 CmnGnbGfxUmaFrameBufferSize;
+ /** Offset 0x008F**/ UINT8 CmnGnbNbIOMMU;
+ /** Offset 0x0090**/ UINT8 PPTCtl;
+ /** Offset 0x0091**/ UINT32 FastPPTLimit;
+ /** Offset 0x0095**/ UINT32 SlowPPTLimit;
+ /** Offset 0x0099**/ UINT8 CmnCpuVolOffsetCtl;
+ /** Offset 0x009A**/ UINT32 CmnCpuVoltageOffset;
+ /** Offset 0x009E**/ UINT8 CmnGpuVolOffsetCtl;
+ /** Offset 0x009F**/ UINT32 CmnGpuVoltageOffset;
+ /** Offset 0x00A3**/ UINT8 CmnSocVolOffsetCtl;
+ /** Offset 0x00A4**/ UINT32 CmnSocVoltageOffset;
+ /** Offset 0x00A8**/ UINT16 CclkFmaxOverride;
+ /** Offset 0x00AA**/ UINT16 GfxclkFmaxOverride;
+ /** Offset 0x00AC**/ UINT8 padding1[8];
+ /** Offset 0x00B4**/ UINT16 UpdTerminator;
} FSP_M_CONFIG;
/** Fsp M UPD Configuration
diff --git a/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c b/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c
index 1afcf68f85..2a616482e3 100644
--- a/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c
+++ b/Platform/AMD/VanGoghBoard/Override/edk2/Fsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c
@@ -61,35 +61,6 @@ GetIdsNvData (
FSPM_UPD *volatile FspmUpd
)
{
- VOID *IdsNvTableData;
- UINT32 IdsNvDataSize = 0;
- IDS_HOOK_STATUS Status = GetIdsNvTable (NULL, &IdsNvDataSize);
-
- if ((Status == IDS_HOOK_BUFFER_TOO_SMALL) || (Status == IDS_HOOK_SUCCESS)) {
- // The CBS code doesn't follow its header!
- IdsNvTableData = AllocatePool (IdsNvDataSize+100);
- if (IdsNvTableData != NULL) {
- Status = GetIdsNvTable (IdsNvTableData, &IdsNvDataSize);
- if (Status == IDS_HOOK_SUCCESS) {
- FspmUpd->FspmConfig.ids_nv_table_address = (UINT32)(UINTN)IdsNvTableData;
- FspmUpd->FspmConfig.ids_nv_table_size = IdsNvDataSize;
- DEBUG ((
- DEBUG_INFO,
- "IDS NV Table address:%x, size:%x\n", \
- FspmUpd->FspmConfig.ids_nv_table_address,
- FspmUpd->FspmConfig.ids_nv_table_size
- ));
- return EFI_SUCCESS;
- } else {
- DEBUG ((DEBUG_ERROR, "Get NV Table #3:%d\n", Status));
- }
- } else {
- DEBUG ((DEBUG_ERROR, "Get NV Table #2:%d\n", Status));
- }
- } else {
- DEBUG ((DEBUG_ERROR, "Get NV Table #1:%d\n", Status));
- }
-
return EFI_UNSUPPORTED;
}
--
2.31.1
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