From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 239D8D800F6 for ; Thu, 14 Mar 2024 13:39:53 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=jN/m6xcCCyssobKi7aC+euk1tWbMktNnzvLi2Jbvqz4=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20240206; t=1710423592; v=1; b=kJDMqXnk+PtllkkR9Mb52bhw+sCPMaOgqGnWZhCeFe8oSCSxJSQZdNx6hcGukTk3OhGJfFAD RBhmrTKpfZSencjB4nKCekvhDuQTTOJNaExzrHfKz+C0rD784FTxdVqlSnBltYfKV0SqlopPQhO G6kEKv4yqAX44cqi9B/NjLISDtg2cxg+l9sYKaOkmEuBwu45Act0acU9YWIPt+ZUVh25Eo3f+US CH6J6OGTTbBytfixZPWo6BMjPA80AzD59G2CBi5LvQY8UhKJh6e0s6d0xTio77Y76fhu/P1NH7Q +tPeWWB6N+y+TKM3vCHBsH1+C5XmbvYuLJUWxegEaHm7A== X-Received: by 127.0.0.2 with SMTP id W7HyYY7687511x72ZRLeSbdg; Thu, 14 Mar 2024 06:39:52 -0700 X-Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) by mx.groups.io with SMTP id smtpd.web11.12786.1710423592019979462 for ; Thu, 14 Mar 2024 06:39:52 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,11012"; a="5177074" X-IronPort-AV: E=Sophos;i="6.07,125,1708416000"; d="scan'208";a="5177074" X-Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Mar 2024 06:39:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,125,1708416000"; d="scan'208";a="12223785" X-Received: from chiuyihs-desk1.gar.corp.intel.com ([10.225.76.77]) by fmviesa009.fm.intel.com with ESMTP; 14 Mar 2024 06:39:50 -0700 From: "Chiu, Ian" To: devel@edk2.groups.io Cc: Ian Chiu , Hao A Wu , Ray Ni , More Shih Subject: [edk2-devel] [PATCH] MdeModulePkg/XhciDxe: Increase 1ms extra delay for xHCI issue HCRST Date: Thu, 14 Mar 2024 21:39:45 +0800 Message-Id: <20240314133945.3018-1-ian.chiu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Thu, 14 Mar 2024 06:39:52 -0700 Reply-To: devel@edk2.groups.io,ian.chiu@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: 93o83SRnuLof8xyMQyELqlTax7686176AA= Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=kJDMqXnk; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none) From: Ian Chiu https://bugzilla.tianocore.org/show_bug.cgi?id=3D4727 More and more XHCI host controllers require to have extra 1ms delay before accessing any MMIO register during reset. Since PHY transition from P3 to P0 can take around 1.3ms and the xHCI reset can take around 1.5ms. Hence, need delay increase between issuing HCRST on xHCI controller till first MMIO read for reset completion check. Cc: Hao A Wu Cc: Ray Ni Cc: More Shih Signed-off-by: Ian Chiu --- MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c b/MdeModulePkg/Bus/Pci/= XhciDxe/XhciReg.c index 40f2f1f227..eafe4b0d11 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c @@ -861,10 +861,11 @@ XhcResetHC ( XhcSetOpRegBit (Xhc, XHC_USBCMD_OFFSET, XHC_USBCMD_RESET);=0D //=0D // Some XHCI host controllers require to have extra 1ms delay before a= ccessing any MMIO register during reset.=0D + // PHY transition from P3 to P0 can take around 1.3ms and the xHCI res= et can take around 1.5ms.=0D // Otherwise there may have the timeout case happened.=0D - // The below is a workaround to solve such problem.=0D + // Stall for 2ms workaround to solve such problem.=0D //=0D - gBS->Stall (XHC_1_MILLISECOND);=0D + gBS->Stall (XHC_1_MILLISECOND*2);=0D Status =3D XhcWaitOpRegBit (Xhc, XHC_USBCMD_OFFSET, XHC_USBCMD_RESET, = FALSE, Timeout);=0D =0D if (!EFI_ERROR (Status)) {=0D --=20 2.38.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#116751): https://edk2.groups.io/g/devel/message/116751 Mute This Topic: https://groups.io/mt/104926466/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-