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From: "Tuan Phan" <tphan@ventanamicro.com>
To: devel@edk2.groups.io
Cc: michael.d.kinney@intel.com,
gaoliming@byosoft.com.cn,
zhiguang.liu@intel.com,
kraxel@redhat.com,
lersek@redhat.com,
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Tuan Phan <tphan@ventanamicro.com>
Subject: [edk2-devel] [PATCH v4 1/4] MdePkg.dec: RISC-V: Define override bit for Svpbmt extension
Date: Thu, 14 Mar 2024 13:19:14 -0700
Message-Id: <20240314201917.1756-2-tphan@ventanamicro.com>
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Define the BIT 2 as the override bit for Svpbmt extension. This will
be used by RISC-V MMU library to support EFI_MEMORY_UC and
EFI_MEMORY_WC.
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
---
MdePkg/MdePkg.dec | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
index 0459418906f8..6850acb96b92 100644
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -2407,6 +2407,8 @@
# previous stage has feature enabled and user wants to disable it.=0D
# BIT 1 =3D Supervisor Time Compare (Sstc). This bit is relevant only if=
=0D
# previous stage has feature enabled and user wants to disable it.=0D
+ # BIT 2 =3D Page-Based Memory Types (Pbmt). This bit is relevant only if=
=0D
+ # previous stage has feature enabled and user wants to disable it.=0D
#=0D
gEfiMdePkgTokenSpaceGuid.PcdRiscVFeatureOverride|0xFFFFFFFFFFFFFFFF|UINT=
64|0x69=0D
=0D
--=20
2.25.1
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