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[73.223.207.212]) by smtp.gmail.com with ESMTPSA id y20-20020a63b514000000b005d34cf68664sm1135859pge.25.2024.03.14.13.19.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Mar 2024 13:19:27 -0700 (PDT) From: "Tuan Phan" To: devel@edk2.groups.io Cc: michael.d.kinney@intel.com, gaoliming@byosoft.com.cn, zhiguang.liu@intel.com, kraxel@redhat.com, lersek@redhat.com, rahul1.kumar@intel.com, ray.ni@intel.com, sunilvl@ventanamicro.com, jiewen.yao@intel.com, andrei.warkentin@intel.com, ardb+tianocore@kernel.org, Tuan Phan Subject: [edk2-devel] [PATCH v4 3/4] UefiCpuPkg: RISC-V: MMU: Support Svpbmt extension Date: Thu, 14 Mar 2024 13:19:16 -0700 Message-Id: <20240314201917.1756-4-tphan@ventanamicro.com> In-Reply-To: <20240314201917.1756-1-tphan@ventanamicro.com> References: <20240314201917.1756-1-tphan@ventanamicro.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Thu, 14 Mar 2024 13:21:35 -0700 Reply-To: devel@edk2.groups.io,tphan@ventanamicro.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=17VVpCh6; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io The GCD EFI_MEMORY_UC and EFI_MEMORY_WC memory attributes will be supported when Svpbmt extension available. Cc: Gerd Hoffmann Cc: Laszlo Ersek Cc: Rahul Kumar Cc: Ray Ni Signed-off-by: Tuan Phan --- .../Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c | 106 ++++++++++++++---- .../BaseRiscVMmuLib/BaseRiscVMmuLib.inf | 1 + 2 files changed, 86 insertions(+), 21 deletions(-) diff --git a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c b/UefiCpu= Pkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c index 46ba4b4709b1..34300dca5c34 100644 --- a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c +++ b/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c @@ -36,6 +36,11 @@ #define PTE_PPN_SHIFT 10=0D #define RISCV_MMU_PAGE_SHIFT 12=0D =0D +#define RISCV_CPU_FEATURE_PBMT_BITMASK BIT2=0D +#define PTE_PBMT_NC BIT61=0D +#define PTE_PBMT_IO BIT62=0D +#define PTE_PBMT_MASK (PTE_PBMT_NC | PTE_PBMT_IO)=0D +=0D STATIC UINTN mModeSupport[] =3D { SATP_MODE_SV57, SATP_MODE_SV48, SATP_MO= DE_SV39, SATP_MODE_OFF };=0D STATIC UINTN mMaxRootTableLevel;=0D STATIC UINTN mBitPerLevel;=0D @@ -487,32 +492,82 @@ UpdateRegionMapping ( /**=0D Convert GCD attribute to RISC-V page attribute.=0D =0D - @param GcdAttributes The GCD attribute.=0D + @param GcdAttributes The GCD attribute.=0D + @param RiscVAttributes The pointer of RISC-V page attribute.=0D =0D - @return The RISC-V page attribute.=0D + @retval EFI_INVALID_PARAMETER The RiscVAttributes is NULL or cache typ= e mask not valid.=0D + @retval EFI_SUCCESS The operation succesfully.=0D =0D **/=0D STATIC=0D -UINT64=0D +EFI_STATUS=0D GcdAttributeToPageAttribute (=0D - IN UINT64 GcdAttributes=0D + IN UINT64 GcdAttributes,=0D + OUT UINT64 *RiscVAttributes=0D )=0D {=0D - UINT64 RiscVAttributes;=0D + UINT64 CacheTypeMask;=0D + BOOLEAN PmbtExtEnabled;=0D =0D - RiscVAttributes =3D RISCV_PG_R | RISCV_PG_W | RISCV_PG_X;=0D + if (RiscVAttributes =3D=3D NULL) {=0D + return EFI_INVALID_PARAMETER;=0D + }=0D +=0D + *RiscVAttributes =3D RISCV_PG_R | RISCV_PG_W | RISCV_PG_X;=0D +=0D + PmbtExtEnabled =3D FALSE;=0D + if ((PcdGet64 (PcdRiscVFeatureOverride) & RISCV_CPU_FEATURE_PBMT_BITMASK= ) !=3D 0) {=0D + PmbtExtEnabled =3D TRUE;=0D + }=0D =0D // Determine protection attributes=0D if ((GcdAttributes & EFI_MEMORY_RO) !=3D 0) {=0D - RiscVAttributes &=3D ~(UINT64)(RISCV_PG_W);=0D + *RiscVAttributes &=3D ~(UINT64)(RISCV_PG_W);=0D }=0D =0D // Process eXecute Never attribute=0D if ((GcdAttributes & EFI_MEMORY_XP) !=3D 0) {=0D - RiscVAttributes &=3D ~(UINT64)RISCV_PG_X;=0D + *RiscVAttributes &=3D ~(UINT64)RISCV_PG_X;=0D + }=0D +=0D + CacheTypeMask =3D GcdAttributes & EFI_CACHE_ATTRIBUTE_MASK;=0D + if ((CacheTypeMask !=3D 0) &&=0D + (((CacheTypeMask - 1) & CacheTypeMask) !=3D 0))=0D + {=0D + DEBUG ((=0D + DEBUG_ERROR,=0D + "%a: More than one bit set in cache type mask (0x%LX)\n",=0D + __func__,=0D + CacheTypeMask=0D + ));=0D + return EFI_INVALID_PARAMETER;=0D + }=0D +=0D + switch (CacheTypeMask) {=0D + case EFI_MEMORY_UC:=0D + if (PmbtExtEnabled) {=0D + *RiscVAttributes |=3D PTE_PBMT_IO;=0D + }=0D +=0D + break;=0D + case EFI_MEMORY_WC:=0D + if (PmbtExtEnabled) {=0D + *RiscVAttributes |=3D PTE_PBMT_NC;=0D + } else {=0D + DEBUG ((=0D + DEBUG_VERBOSE,=0D + "%a: EFI_MEMORY_WC set but Pmbt extension not available\n",=0D + __func__=0D + ));=0D + }=0D +=0D + break;=0D + default:=0D + // Default PMA mode=0D + break;=0D }=0D =0D - return RiscVAttributes;=0D + return EFI_SUCCESS;=0D }=0D =0D /**=0D @@ -535,29 +590,38 @@ RiscVSetMemoryAttributes ( IN UINT64 Attributes=0D )=0D {=0D - UINT64 PageAttributesSet;=0D + UINT64 PageAttributesSet;=0D + UINT64 PageAttributesClear;=0D + EFI_STATUS Status;=0D =0D - PageAttributesSet =3D GcdAttributeToPageAttribute (Attributes);=0D + Status =3D GcdAttributeToPageAttribute (Attributes, &PageAttributesSet);= =0D + if (EFI_ERROR (Status)) {=0D + return Status;=0D + }=0D =0D if (!RiscVMmuEnabled ()) {=0D return EFI_SUCCESS;=0D }=0D =0D - DEBUG (=0D - (=0D - DEBUG_VERBOSE,=0D - "%a: Set %llX page attribute 0x%X\n",=0D - __func__,=0D - BaseAddress,=0D - PageAttributesSet=0D - )=0D - );=0D + PageAttributesClear =3D PTE_ATTRIBUTES_MASK;=0D + if ((PcdGet64 (PcdRiscVFeatureOverride) & RISCV_CPU_FEATURE_PBMT_BITMASK= ) !=3D 0) {=0D + PageAttributesClear |=3D PTE_PBMT_MASK;=0D + }=0D +=0D + DEBUG ((=0D + DEBUG_VERBOSE,=0D + "%a: %LX: set attributes 0x%LX, clear attributes 0x%LX\n",=0D + __func__,=0D + BaseAddress,=0D + PageAttributesSet,=0D + PageAttributesClear=0D + ));=0D =0D return UpdateRegionMapping (=0D BaseAddress,=0D Length,=0D PageAttributesSet,=0D - PTE_ATTRIBUTES_MASK,=0D + PageAttributesClear,=0D (UINT64 *)RiscVGetRootTranslateTable (),=0D TRUE=0D );=0D diff --git a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf b/UefiC= puPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf index 51ebe1750e97..1dbaa81f3608 100644 --- a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf +++ b/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf @@ -28,3 +28,4 @@ =0D [Pcd]=0D gUefiCpuPkgTokenSpaceGuid.PcdCpuRiscVMmuMaxSatpMode ## CONSUMES=0D + gEfiMdePkgTokenSpaceGuid.PcdRiscVFeatureOverride ## CONSUMES=0D --=20 2.25.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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