public inbox for devel@edk2.groups.io
 help / color / mirror / Atom feed
* [edk2-devel] [PATCH v10 0/4] get rid of DeviceTree from SbsaQemu
@ 2024-03-27 14:03 Xiong Yining
  2024-03-27 14:03 ` [edk2-devel] [PATCH v10 1/4] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib Xiong Yining
                   ` (3 more replies)
  0 siblings, 4 replies; 7+ messages in thread
From: Xiong Yining @ 2024-03-27 14:03 UTC (permalink / raw)
  To: devel
  Cc: quic_llindhol, ardb+tianocore, graeme, marcin.juszkiewicz,
	chenbaozi, Xiong Yining

We want to stop parsing DeviceTree to gather hardware information.

Instead we ask TF-A for those details using SMC calls. On real hardware
platform it could be asking on-board Embedded Controller.

Hardware information (CPU, Memory) is now in SbsaQemuHardwareInfoLib
together with new code for handling SMC stuff. There is no DT parsing
anywhere.

TF-A part is merged already (and we have it in edk2-non-osi):
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/25707

Patch 4 needs work to pass MemInfo as reference.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
Changes in v10:
- drop use aggregates as return types
- Link to v9: https://openfw.io/edk2-devel/20240322-no-dt-for-cpu-v9-0-92e947e0fbdf@linaro.org/

Changes in v9:
- recreated 3rd patch to drop all traces of Device Tree use
- Link to v8: https://openfw.io/edk2-devel/20240320-no-dt-for-cpu-v8-0-599ba99861ec@linaro.org

Changes in v8:
- added HardwareInfoLib library class
- created SbsaQemuHardwareInfoLib as HardwareInfoLib
- dropped SbsaQemu from functions (to keep HardwareInfoLib class generic)
- Link to v7: https://openfw.io/edk2-devel/20240319-no-dt-for-cpu-v7-0-ac0a57a23a8f@linaro.org

Changes in v7:
- dropped CoreCount Pcd - code calls SbsaQemuGetCpuCount() instead
- dropped DT fallbacks - we have up-to-date TF-A in edk2-non-osi
- system shutdowns when there is no cpu or memory information
- SbsaQemuHardwareInfoLib debug calls show function names
- Link to v6: https://openfw.io/edk2-devel/20240306-no-dt-for-cpu-v6-0-acd8727a1b59@linaro.org

Changes in v6 (Marcin Juszkiewicz):
- patch 5 now shutdowns system in case of no CPU information

Changes in v5 (Xiong Yining):
- added missing patch
- Link to v4: https://openfw.io/edk2-devel/20240131132400.3022662-1-xiongyining1480@phytium.com.cn/

Changes in v4 (Xiong Yining):
- patch 6 add the support for getting the hardware information of memory via SMC calls.
- patch 7 add the callback of DeviceTree when SMC calls defined on patch 6 failled.
- replace FdtHelperGetMpidr() with SbsaQemuGetMpidr() on patch 4 to compile successfully.
- Link to v3: https://openfw.io/edk2-devel/20240131100027.2538549-1-xiongyining1480@phytium.com.cn/

Changes in v3:
- added SMC_SIP_CALL_SUCCESS
- on SMC call fail tell that SMC call failed instead of blaming TF-A
- hang when there is no cpu information (TODO: shutdown instead)
- Link to v2: https://openfw.io/edk2-devel/20240124-no-dt-for-cpu-v3-0-5375fcf09037@linaro.org/

Marcin Juszkiewicz (3):
  Platform/SbsaQemu: add SbsaQemuHardwareInfoLib
  Platform/SbsaQemu: use SbsaQemuHardwareInfoLib for cpu information
  Platform/SbsaQemu: drop use of DeviceTree

Xiong Yining (1):
  Platform/SbsaQemu: get the information of memory via SMC calls

 Silicon/Qemu/SbsaQemu/SbsaQemu.dec            |   3 +-
 Platform/Qemu/SbsaQemu/SbsaQemu.dsc           |  11 +-
 .../Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf   |   6 +-
 .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf       |   5 +-
 .../Library/FdtHelperLib/FdtHelperLib.inf     |  33 ----
 .../SbsaQemuHardwareInfoLib.inf               |  29 ++++
 .../Library/SbsaQemuLib/SbsaQemuLib.inf       |   5 +-
 .../Include/IndustryStandard/SbsaQemuSmc.h    |  19 ++-
 .../SbsaQemu/Include/Library/FdtHelperLib.h   |  36 -----
 .../Include/Library/HardwareInfoLib.h         |  76 +++++++++
 .../Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c     |  11 +-
 .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c |  21 +--
 .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c |   2 -
 .../Library/FdtHelperLib/FdtHelperLib.c       |  98 ------------
 .../SbsaQemuHardwareInfoLib.c                 | 145 ++++++++++++++++++
 .../Library/SbsaQemuLib/SbsaQemuMem.c         |  54 ++-----
 16 files changed, 301 insertions(+), 253 deletions(-)
 delete mode 100644 Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf
 create mode 100644 Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
 delete mode 100644 Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h
 create mode 100644 Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
 delete mode 100644 Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c
 create mode 100644 Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c

-- 
2.34.1



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#117174): https://edk2.groups.io/g/devel/message/117174
Mute This Topic: https://groups.io/mt/105177616/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-



^ permalink raw reply	[flat|nested] 7+ messages in thread

* [edk2-devel] [PATCH v10 1/4] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib
  2024-03-27 14:03 [edk2-devel] [PATCH v10 0/4] get rid of DeviceTree from SbsaQemu Xiong Yining
@ 2024-03-27 14:03 ` Xiong Yining
  2024-03-27 15:02   ` Leif Lindholm
  2024-03-27 14:03 ` [edk2-devel] [PATCH v10 2/4] Platform/SbsaQemu: use SbsaQemuHardwareInfoLib for cpu information Xiong Yining
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 7+ messages in thread
From: Xiong Yining @ 2024-03-27 14:03 UTC (permalink / raw)
  To: devel; +Cc: quic_llindhol, ardb+tianocore, graeme, marcin.juszkiewicz,
	chenbaozi

From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>

This library provides functions to check for hardware information.
For now it covers CPU ones:

- amount of cpu cores
- MPIDR value for cpu core
- NUMA node id for cpu core

Values are read from TF-A using platform specific SMC calls.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
 Silicon/Qemu/SbsaQemu/SbsaQemu.dec            |  2 +
 Platform/Qemu/SbsaQemu/SbsaQemu.dsc           |  3 +-
 .../SbsaQemuHardwareInfoLib.inf               | 29 ++++++
 .../Include/IndustryStandard/SbsaQemuSmc.h    | 17 +++-
 .../Include/Library/HardwareInfoLib.h         | 45 +++++++++
 .../SbsaQemuHardwareInfoLib.c                 | 96 +++++++++++++++++++
 6 files changed, 187 insertions(+), 5 deletions(-)
 create mode 100644 Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
 create mode 100644 Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
 create mode 100644 Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c

diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
index 913d1d75ef29..427ff8b31aac 100644
--- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
+++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
@@ -12,6 +12,8 @@
   PACKAGE_GUID                   = 8db32c5a-2821-43e2-b4ac-bc148e2b0b05
   PACKAGE_VERSION                = 0.1
 
+[LibraryClasses]
+HardwareInfoLib|Include/Library/HardwareInfoLib.h
 ################################################################################
 #
 # Include Section - list of Include Paths that are provided by this package.
diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
index 378600050df9..3c3d2449bff4 100644
--- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
+++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
@@ -1,6 +1,6 @@
 #
 #  Copyright (c) 2021, NUVIA Inc. All rights reserved.
-#  Copyright (c) 2019, Linaro Limited. All rights reserved.
+#  Copyright (c) 2019-2024, Linaro Ltd. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -128,6 +128,7 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE       = FALSE
 
   FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf
   OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
+  HardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
 
   # Debug Support
   PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
new file mode 100644
index 000000000000..2acb2a1e7c76
--- /dev/null
+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
@@ -0,0 +1,29 @@
+#/* @file
+#
+#  Copyright (c) 2024, Linaro Ltd. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#*/
+
+[Defines]
+  INF_VERSION                    = 0x0001001c
+  BASE_NAME                      = SbsaQemuHardwareInfoLib
+  FILE_GUID                      = 6454006f-6502-46e2-9be4-4bba8d4b29fb
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = HardwareInfoLib
+
+[Sources]
+  SbsaQemuHardwareInfoLib.c
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  Silicon/Qemu/SbsaQemu/SbsaQemu.dec
+
+[LibraryClasses]
+  ArmSmcLib
+  ResetSystemLib
diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
index 7934875e4aba..2317c1f0ae69 100644
--- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
+++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2023, Linaro Ltd. All rights reserved.<BR>
+*  Copyright (c) 2023-2024, Linaro Ltd. All rights reserved.<BR>
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -11,8 +11,17 @@
 
 #include <IndustryStandard/ArmStdSmc.h>
 
-#define SIP_SVC_VERSION  SMC_SIP_FUNCTION_ID(1)
-#define SIP_SVC_GET_GIC  SMC_SIP_FUNCTION_ID(100)
-#define SIP_SVC_GET_GIC_ITS  SMC_SIP_FUNCTION_ID(101)
+#define SIP_SVC_VERSION        SMC_SIP_FUNCTION_ID(1)
+#define SIP_SVC_GET_GIC        SMC_SIP_FUNCTION_ID(100)
+#define SIP_SVC_GET_GIC_ITS    SMC_SIP_FUNCTION_ID(101)
+#define SIP_SVC_GET_CPU_COUNT  SMC_SIP_FUNCTION_ID(200)
+#define SIP_SVC_GET_CPU_NODE   SMC_SIP_FUNCTION_ID(201)
+
+/*
+ *  SMCC does not define return codes for SiP functions.
+ *  We use Architecture ones then.
+ */
+
+#define SMC_SIP_CALL_SUCCESS  SMC_ARCH_CALL_SUCCESS
 
 #endif /* SBSA_QEMU_SMC_H_ */
diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
new file mode 100644
index 000000000000..8b1b5e5e1b93
--- /dev/null
+++ b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
@@ -0,0 +1,45 @@
+/** @file
+*
+*  Copyright (c) 2024, Linaro Ltd. All rights reserved.
+*
+*  SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#ifndef HARDWARE_INFO_LIB
+#define HARDWARE_INFO_LIB
+
+/**
+  Get CPU count from information passed by Qemu.
+
+**/
+UINT32
+GetCpuCount (
+  VOID
+  );
+
+/**
+  Get MPIDR for a given cpu from device tree passed by Qemu.
+
+  @param [in]   CpuId    Index of cpu to retrieve MPIDR value for.
+
+  @retval                MPIDR value of CPU at index <CpuId>
+**/
+UINT64
+GetMpidr (
+  IN UINTN  CpuId
+  );
+
+/**
+  Get NUMA node id for a given cpu from device tree passed by Qemu.
+
+  @param [in]   CpuId    Index of cpu to retrieve NUMA node id for.
+
+  @retval                NUMA node id for CPU at index <CpuId>
+**/
+UINT64
+GetCpuNumaNode (
+  IN UINTN  CpuId
+  );
+
+#endif /* HARDWARE_INFO_LIB */
diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
new file mode 100644
index 000000000000..e96328978a55
--- /dev/null
+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
@@ -0,0 +1,96 @@
+/** @file
+*
+*  Copyright (c) 2021, NUVIA Inc. All rights reserved.
+*  Copyright (c) 2024, Linaro Ltd. All rights reserved.
+*
+*  SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Library/ArmSmcLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/ResetSystemLib.h>
+#include <Library/HardwareInfoLib.h>
+#include <IndustryStandard/SbsaQemuSmc.h>
+
+/**
+  Get CPU count from information passed by Qemu.
+
+**/
+UINT32
+GetCpuCount (
+  VOID
+  )
+{
+  UINTN          Arg0;
+  UINTN          SmcResult;
+
+  SmcResult = ArmCallSmc0 (SIP_SVC_GET_CPU_COUNT, &Arg0, NULL, NULL);
+  if (SmcResult != SMC_SIP_CALL_SUCCESS) {
+    DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_CPU_COUNT call failed. We have no cpu information.\n", __FUNCTION__));
+    ResetShutdown ();
+  }
+
+  DEBUG ((DEBUG_INFO, "%a: We have %d cpus.\n", __FUNCTION__, Arg0));
+
+  return Arg0;
+}
+
+/**
+  Get MPIDR for a given cpu from device tree passed by Qemu.
+
+  @param [in]   CpuId    Index of cpu to retrieve MPIDR value for.
+
+  @retval                MPIDR value of CPU at index <CpuId>
+**/
+UINT64
+GetMpidr (
+  IN UINTN  CpuId
+  )
+{
+  UINTN  SmcResult;
+  UINTN  Arg0;
+  UINTN  Arg1;
+
+  Arg0 = CpuId;
+
+  SmcResult = ArmCallSmc0 (SIP_SVC_GET_CPU_NODE, &Arg0, &Arg1, NULL);
+  if (SmcResult != SMC_SIP_CALL_SUCCESS) {
+    DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_CPU_NODE call failed. We have no MPIDR for CPU%d.\n", __FUNCTION__, CpuId));
+    ResetShutdown ();
+  }
+
+  DEBUG ((DEBUG_INFO, "%a: MPIDR for CPU%d: = %d\n", __FUNCTION__, CpuId, Arg1));
+
+  return Arg1;
+}
+
+/**
+  Get NUMA node id for a given cpu from device tree passed by Qemu.
+
+  @param [in]   CpuId    Index of cpu to retrieve NUMA node id for.
+
+  @retval                NUMA node id for CPU at index <CpuId>
+**/
+UINT64
+GetCpuNumaNode (
+  IN UINTN  CpuId
+  )
+{
+  UINTN  SmcResult;
+  UINTN  Arg0;
+  UINTN  Arg1;
+
+  Arg0 = CpuId;
+
+  SmcResult = ArmCallSmc0 (SIP_SVC_GET_CPU_NODE, &Arg0, &Arg1, NULL);
+  if (SmcResult != SMC_SIP_CALL_SUCCESS) {
+    DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_CPU_NODE call failed. Could not find information for CPU%d.\n", __FUNCTION__, CpuId));
+    return 0;
+  }
+
+  DEBUG ((DEBUG_INFO, "%a: NUMA node for CPU%d: = %d\n", __FUNCTION__, CpuId, Arg0));
+
+  return Arg0;
+}
-- 
2.34.1



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#117170): https://edk2.groups.io/g/devel/message/117170
Mute This Topic: https://groups.io/mt/105177611/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-



^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [edk2-devel] [PATCH v10 2/4] Platform/SbsaQemu: use SbsaQemuHardwareInfoLib for cpu information
  2024-03-27 14:03 [edk2-devel] [PATCH v10 0/4] get rid of DeviceTree from SbsaQemu Xiong Yining
  2024-03-27 14:03 ` [edk2-devel] [PATCH v10 1/4] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib Xiong Yining
@ 2024-03-27 14:03 ` Xiong Yining
  2024-03-27 14:03 ` [edk2-devel] [PATCH v10 3/4] Platform/SbsaQemu: drop use of DeviceTree Xiong Yining
  2024-03-27 14:03 ` [edk2-devel] [PATCH v10 4/4] Platform/SbsaQemu: get the information of memory via SMC calls Xiong Yining
  3 siblings, 0 replies; 7+ messages in thread
From: Xiong Yining @ 2024-03-27 14:03 UTC (permalink / raw)
  To: devel; +Cc: quic_llindhol, ardb+tianocore, graeme, marcin.juszkiewicz,
	chenbaozi

From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>

We have SbsaQemuHardwareInfoLib to ask for hardware details. No need to
parse DeviceTree anymore.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
---
 .../Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf   |  6 ++----
 .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf       |  5 ++---
 .../Library/SbsaQemuLib/SbsaQemuLib.inf       |  4 ++--
 .../Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c     | 11 +++++-----
 .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 21 +++++++------------
 5 files changed, 18 insertions(+), 29 deletions(-)

diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
index a34f54d431d4..f959d8e0e4ee 100644
--- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
+++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
@@ -3,7 +3,7 @@
 #
 #    Copyright (c) 2021, NUVIA Inc. All rights reserved.
 #    Copyright (c) 2018, Hisilicon Limited. All rights reserved.
-#    Copyright (c) 2018, Linaro Limited. All rights reserved.
+#    Copyright (c) 2018-2024, Linaro Ltd. All rights reserved.
 #
 #    SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -29,8 +29,7 @@
 
 [LibraryClasses]
   BaseMemoryLib
-  FdtLib
-  FdtHelperLib
+  HardwareInfoLib
   IoLib
   PcdLib
 
@@ -40,7 +39,6 @@
 [Pcd]
   gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease
   gArmTokenSpaceGuid.PcdSystemBiosRelease
-  gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
 
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
index 291743b19115..727c8e82d16e 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
@@ -1,7 +1,7 @@
 ## @file
 #  This driver modifies ACPI tables for the Qemu SBSA platform
 #
-#  Copyright (c) 2020, Linaro Ltd. All rights reserved.
+#  Copyright (c) 2020-2024, Linaro Ltd. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -35,7 +35,7 @@
   BaseLib
   DebugLib
   DxeServicesLib
-  FdtHelperLib
+  HardwareInfoLib
   PcdLib
   PrintLib
   UefiDriverEntryPoint
@@ -44,7 +44,6 @@
 
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile
-  gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount
 
   gArmTokenSpaceGuid.PcdGicDistributorBase
diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
index c067a80cc715..07e6bc4e9b11 100644
--- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
@@ -1,6 +1,6 @@
 #/* @file
 #
-#  Copyright (c) 2019, Linaro Limited. All rights reserved.
+#  Copyright (c) 2019-2024, Linaro Limited. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -32,9 +32,9 @@
   ArmLib
   BaseMemoryLib
   DebugLib
-  FdtLib
   MemoryAllocationLib
   PcdLib
+  SbsaQemuHardwareInfoLib
 
 [Pcd]
   gArmTokenSpaceGuid.PcdSystemMemoryBase
diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
index c38f2851904f..854f6f4072d5 100644
--- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
+++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
@@ -2,7 +2,7 @@
 *  OemMiscLib.c
 *
 *  Copyright (c) 2021, NUVIA Inc. All rights reserved.
-*  Copyright (c) 2020, Linaro Ltd. All rights reserved.
+*  Copyright (c) 2020-2024, Linaro Ltd. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -12,14 +12,13 @@
 #include <Guid/ZeroGuid.h>
 #include <Library/BaseMemoryLib.h>
 #include <Library/DebugLib.h>
-#include <Library/FdtHelperLib.h>
 #include <Library/HiiLib.h>
 #include <Library/IoLib.h>
 #include <Library/OemMiscLib.h>
 #include <Library/PcdLib.h>
+#include <Library/HardwareInfoLib.h>
 #include <Library/SerialPortLib.h>
 #include <Library/TimerLib.h>
-#include <libfdt.h>
 
 /** Returns whether the specified processor is present or not.
 
@@ -33,7 +32,7 @@ OemIsProcessorPresent (
   UINTN ProcessorIndex
   )
 {
-  if (ProcessorIndex < FdtHelperCountCpus ()) {
+  if (ProcessorIndex < GetCpuCount ()) {
     return TRUE;
   }
 
@@ -76,7 +75,7 @@ OemGetProcessorInformation (
 {
   UINT16 ProcessorCount;
 
-  ProcessorCount = FdtHelperCountCpus ();
+  ProcessorCount = GetCpuCount ();
 
   if (ProcessorIndex < ProcessorCount) {
     ProcessorStatus->Bits.CpuStatus       = 1; // CPU enabled
@@ -121,7 +120,7 @@ OemGetMaxProcessors (
   VOID
   )
 {
-  return FdtHelperCountCpus ();
+  return GetCpuCount ();
 }
 
 /** Gets information about the cache at the specified cache level.
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index 9fb17151d7b8..4ebe2a445344 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
@@ -1,7 +1,7 @@
 /** @file
 *  This file is an ACPI driver for the Qemu SBSA platform.
 *
-*  Copyright (c) 2020, Linaro Ltd. All rights reserved.
+*  Copyright (c) 2020-2024, Linaro Ltd. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -15,10 +15,10 @@
 #include <Library/ArmLib.h>
 #include <Library/BaseMemoryLib.h>
 #include <Library/DebugLib.h>
-#include <Library/FdtHelperLib.h>
 #include <Library/MemoryAllocationLib.h>
 #include <Library/PcdLib.h>
 #include <Library/PrintLib.h>
+#include <Library/HardwareInfoLib.h>
 #include <Library/UefiBootServicesTableLib.h>
 #include <Library/UefiDriverEntryPoint.h>
 #include <Library/UefiLib.h>
@@ -255,8 +255,7 @@ AddMadtTable (
  // Initialize GIC Redistributor Structure
   EFI_ACPI_6_0_GICR_STRUCTURE Gicr = SBSAQEMU_MADT_GICR_INIT();
 
-  // Get CoreCount which was determined eariler after parsing device tree
-  NumCores = PcdGet32 (PcdCoreCount);
+  NumCores = GetCpuCount ();
 
   // Calculate the new table size based on the number of cores
   TableSize = sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER) +
@@ -291,13 +290,13 @@ AddMadtTable (
   New += sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER);
 
   // Add new GICC structures for the Cores
-  for (CoreIndex = 0; CoreIndex < PcdGet32 (PcdCoreCount); CoreIndex++) {
+  for (CoreIndex = 0; CoreIndex < NumCores; CoreIndex++) {
     EFI_ACPI_6_0_GIC_STRUCTURE *GiccPtr;
 
     CopyMem (New, &Gicc, sizeof (EFI_ACPI_6_0_GIC_STRUCTURE));
     GiccPtr = (EFI_ACPI_6_0_GIC_STRUCTURE *) New;
     GiccPtr->AcpiProcessorUid = CoreIndex;
-    GiccPtr->MPIDR = FdtHelperGetMpidr (CoreIndex);
+    GiccPtr->MPIDR = GetMpidr (CoreIndex);
     New += sizeof (EFI_ACPI_6_0_GIC_STRUCTURE);
   }
 
@@ -396,7 +395,7 @@ AddSsdtTable (
   UINT32                CpuId;
   UINT32                Offset;
   UINT8                 ScopeOpName[] =  SBSAQEMU_ACPI_SCOPE_NAME;
-  UINT32                NumCores = PcdGet32 (PcdCoreCount);
+  UINT32                NumCores = GetCpuCount ();
 
   EFI_ACPI_DESCRIPTION_HEADER Header =
     SBSAQEMU_ACPI_HEADER (
@@ -497,7 +496,7 @@ AddPpttTable (
   EFI_PHYSICAL_ADDRESS  PageAddress;
   UINT8                 *New;
   UINT32                CpuId;
-  UINT32                NumCores = PcdGet32 (PcdCoreCount);
+  UINT32                NumCores = GetCpuCount ();
 
   EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L1DCache = SBSAQEMU_ACPI_PPTT_L1_D_CACHE_STRUCT;
   EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L1ICache = SBSAQEMU_ACPI_PPTT_L1_I_CACHE_STRUCT;
@@ -758,12 +757,6 @@ InitializeSbsaQemuAcpiDxe (
 {
   EFI_STATUS                     Status;
   EFI_ACPI_TABLE_PROTOCOL        *AcpiTable;
-  UINT32                         NumCores;
-
-  // Parse the device tree and get the number of CPUs
-  NumCores = FdtHelperCountCpus ();
-  Status = PcdSet32S (PcdCoreCount, NumCores);
-  ASSERT_RETURN_ERROR (Status);
 
   // Check if ACPI Table Protocol has been installed
   Status = gBS->LocateProtocol (
-- 
2.34.1



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#117172): https://edk2.groups.io/g/devel/message/117172
Mute This Topic: https://groups.io/mt/105177614/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-



^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [edk2-devel] [PATCH v10 3/4] Platform/SbsaQemu: drop use of DeviceTree
  2024-03-27 14:03 [edk2-devel] [PATCH v10 0/4] get rid of DeviceTree from SbsaQemu Xiong Yining
  2024-03-27 14:03 ` [edk2-devel] [PATCH v10 1/4] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib Xiong Yining
  2024-03-27 14:03 ` [edk2-devel] [PATCH v10 2/4] Platform/SbsaQemu: use SbsaQemuHardwareInfoLib for cpu information Xiong Yining
@ 2024-03-27 14:03 ` Xiong Yining
  2024-03-27 14:03 ` [edk2-devel] [PATCH v10 4/4] Platform/SbsaQemu: get the information of memory via SMC calls Xiong Yining
  3 siblings, 0 replies; 7+ messages in thread
From: Xiong Yining @ 2024-03-27 14:03 UTC (permalink / raw)
  To: devel; +Cc: quic_llindhol, ardb+tianocore, graeme, marcin.juszkiewicz,
	chenbaozi

From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>

There is no need for EDK2 to know that there is DeviceTree around.
All hardware information is read using functions from
SbsaQemuHardwareInfoLib library.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
---
 Silicon/Qemu/SbsaQemu/SbsaQemu.dec            |  1 -
 Platform/Qemu/SbsaQemu/SbsaQemu.dsc           |  8 +-
 .../Library/FdtHelperLib/FdtHelperLib.inf     | 33 -------
 .../SbsaQemu/Include/Library/FdtHelperLib.h   | 36 -------
 .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c |  2 -
 .../Library/FdtHelperLib/FdtHelperLib.c       | 98 -------------------
 6 files changed, 1 insertion(+), 177 deletions(-)
 delete mode 100644 Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf
 delete mode 100644 Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h
 delete mode 100644 Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c

diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
index 427ff8b31aac..8f3533800767 100644
--- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
+++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
@@ -36,7 +36,6 @@ HardwareInfoLib|Include/Library/HardwareInfoLib.h
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize|0x10000|UINT32|0x00000002
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciBase|0|UINT64|0x00000003
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciSize|0x10000|UINT32|0x00000004
-  gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress|0x10000000000|UINT64|0x00000005
 
   # PCDs complementing PCIe layout pulled into ACPI tables
   # Limit = Base + Size - 1
diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
index 3c3d2449bff4..d5888b1192e3 100644
--- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
+++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
@@ -80,7 +80,6 @@ [LibraryClasses.common]
   FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
   ImagePropertiesRecordLib|MdeModulePkg/Library/ImagePropertiesRecordLib/ImagePropertiesRecordLib.inf
 
-  FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
   UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
   OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf
 
@@ -126,7 +125,6 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE       = FALSE
   # ARM PL011 UART Driver
   PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
 
-  FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf
   OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
   HardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
 
@@ -430,9 +428,6 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE       = FALSE
   #
   gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16
 
-  # Initial Device Tree Location
-  gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress|0x10000000000
-
   # Non discoverable devices (AHCI,XHCI)
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase|0x60100000
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize|0x00010000
@@ -731,7 +726,6 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE       = FALSE
   #
   ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
   ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
-  EmbeddedPkg/Library/FdtLib/FdtLib.inf
   MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
   Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuSmbiosDxe/SbsaQemuSmbiosDxe.inf
 
diff --git a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf b/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf
deleted file mode 100644
index 9c059f3e5851..000000000000
--- a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf
+++ /dev/null
@@ -1,33 +0,0 @@
-#/** @file
-#
-#  Component description file for FdtHelperLib module
-#
-#  Copyright (c) 2021, NUVIA Inc. All rights reserved.
-#
-#  SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-#**/
-
-[Defines]
-  INF_VERSION                    = 1.29
-  BASE_NAME                      = FdtHelperLib
-  FILE_GUID                      = 34e4396f-c2fc-4f9e-ad58-0f98e99e3875
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = FdtHelperLib
-
-[Sources.common]
-  FdtHelperLib.c
-
-[Packages]
-  EmbeddedPkg/EmbeddedPkg.dec
-  MdePkg/MdePkg.dec
-  Silicon/Qemu/SbsaQemu/SbsaQemu.dec
-
-[LibraryClasses]
-  DebugLib
-  FdtLib
-  PcdLib
-
-[FixedPcd]
-  gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h
deleted file mode 100644
index ea9159857215..000000000000
--- a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/** @file
-*  FdtHelperLib.h
-*
-*  Copyright (c) 2021, NUVIA Inc. All rights reserved.
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-**/
-
-#ifndef FDT_HELPER_LIB_
-#define FDT_HELPER_LIB_
-
-/**
-  Get MPIDR for a given cpu from device tree passed by Qemu.
-
-  @param [in]   CpuId    Index of cpu to retrieve MPIDR value for.
-
-  @retval                MPIDR value of CPU at index <CpuId>
-**/
-UINT64
-FdtHelperGetMpidr (
-  IN UINTN   CpuId
-  );
-
-/** Walks through the Device Tree created by Qemu and counts the number
-    of CPUs present in it.
-
-    @return The number of CPUs present.
-**/
-EFIAPI
-UINT32
-FdtHelperCountCpus (
-  VOID
-  );
-
-#endif /* FDT_HELPER_LIB_ */
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
index 4ebbe7c93a19..56be2455970d 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
@@ -17,8 +17,6 @@
 #include <IndustryStandard/SbsaQemuSmc.h>
 #include <IndustryStandard/SbsaQemuPlatformVersion.h>
 
-#include <Protocol/FdtClient.h>
-
 EFI_STATUS
 EFIAPI
 InitializeSbsaQemuPlatformDxe (
diff --git a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c b/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c
deleted file mode 100644
index 7fdfb055db76..000000000000
--- a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c
+++ /dev/null
@@ -1,98 +0,0 @@
-/** @file
-*  FdtHelperLib.c
-*
-*  Copyright (c) 2021, NUVIA Inc. All rights reserved.
-*  Copyright (c) 2020, Linaro Ltd. All rights reserved.
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-**/
-
-#include <Uefi.h>
-#include <Library/DebugLib.h>
-#include <Library/FdtHelperLib.h>
-#include <Library/PcdLib.h>
-#include <libfdt.h>
-
-STATIC INT32 mFdtFirstCpuOffset;
-STATIC INT32 mFdtCpuNodeSize;
-
-/**
-  Get MPIDR for a given cpu from device tree passed by Qemu.
-
-  @param [in]   CpuId    Index of cpu to retrieve MPIDR value for.
-
-  @retval                MPIDR value of CPU at index <CpuId>
-**/
-UINT64
-FdtHelperGetMpidr (
-  IN UINTN   CpuId
-  )
-{
-  VOID           *DeviceTreeBase;
-  CONST UINT64   *RegVal;
-  INT32          Len;
-
-  DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress);
-  ASSERT (DeviceTreeBase != NULL);
-
-  RegVal = fdt_getprop (DeviceTreeBase,
-             mFdtFirstCpuOffset + (CpuId * mFdtCpuNodeSize),
-             "reg",
-             &Len);
-  if (!RegVal) {
-    DEBUG ((DEBUG_ERROR, "Couldn't find reg property for CPU:%d\n", CpuId));
-    return 0;
-  }
-
-  return (fdt64_to_cpu (ReadUnaligned64 (RegVal)));
-}
-
-/** Walks through the Device Tree created by Qemu and counts the number
-    of CPUs present in it.
-
-    @return The number of CPUs present.
-**/
-EFIAPI
-UINT32
-FdtHelperCountCpus (
-  VOID
-  )
-{
-  VOID   *DeviceTreeBase;
-  INT32  Node;
-  INT32  Prev;
-  INT32  CpuNode;
-  UINT32 CpuCount;
-
-  DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress);
-  ASSERT (DeviceTreeBase != NULL);
-
-  // Make sure we have a valid device tree blob
-  ASSERT (fdt_check_header (DeviceTreeBase) == 0);
-
-  CpuNode = fdt_path_offset (DeviceTreeBase, "/cpus");
-  if (CpuNode <= 0) {
-    DEBUG ((DEBUG_ERROR, "Unable to locate /cpus in device tree\n"));
-    return 0;
-  }
-
-  CpuCount = 0;
-
-  // Walk through /cpus node and count the number of subnodes.
-  // The count of these subnodes corresponds to the number of
-  // CPUs created by Qemu.
-  Prev = fdt_first_subnode (DeviceTreeBase, CpuNode);
-  mFdtFirstCpuOffset = Prev;
-  while (1) {
-    CpuCount++;
-    Node = fdt_next_subnode (DeviceTreeBase, Prev);
-    if (Node < 0) {
-      break;
-    }
-    mFdtCpuNodeSize = Node - Prev;
-    Prev = Node;
-  }
-
-  return CpuCount;
-}
-- 
2.34.1



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#117171): https://edk2.groups.io/g/devel/message/117171
Mute This Topic: https://groups.io/mt/105177613/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-



^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [edk2-devel] [PATCH v10 4/4] Platform/SbsaQemu: get the information of memory via SMC calls
  2024-03-27 14:03 [edk2-devel] [PATCH v10 0/4] get rid of DeviceTree from SbsaQemu Xiong Yining
                   ` (2 preceding siblings ...)
  2024-03-27 14:03 ` [edk2-devel] [PATCH v10 3/4] Platform/SbsaQemu: drop use of DeviceTree Xiong Yining
@ 2024-03-27 14:03 ` Xiong Yining
  2024-03-27 15:06   ` Leif Lindholm
  3 siblings, 1 reply; 7+ messages in thread
From: Xiong Yining @ 2024-03-27 14:03 UTC (permalink / raw)
  To: devel
  Cc: quic_llindhol, ardb+tianocore, graeme, marcin.juszkiewicz,
	chenbaozi, Xiong Yining, Ard Biesheuvel

Provide functions to check for memory information:

- amount of memory nodes
- memory address
- NUMA node id for memory

Values are read from TF-A using platform specific SMC calls.

Signed-off-by: Xiong Yining <xiongyining1480@phytium.com.cn>
Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn>
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
---
 .../Library/SbsaQemuLib/SbsaQemuLib.inf       |  3 +-
 .../Include/IndustryStandard/SbsaQemuSmc.h    |  2 +
 .../Include/Library/HardwareInfoLib.h         | 31 +++++++++++
 .../SbsaQemuHardwareInfoLib.c                 | 49 +++++++++++++++++
 .../Library/SbsaQemuLib/SbsaQemuMem.c         | 54 +++++--------------
 5 files changed, 96 insertions(+), 43 deletions(-)

diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
index 07e6bc4e9b11..384cbb349200 100644
--- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
@@ -32,14 +32,13 @@
   ArmLib
   BaseMemoryLib
   DebugLib
+  HardwareInfoLib
   MemoryAllocationLib
   PcdLib
-  SbsaQemuHardwareInfoLib
 
 [Pcd]
   gArmTokenSpaceGuid.PcdSystemMemoryBase
   gArmTokenSpaceGuid.PcdSystemMemorySize
-  gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
 
 [FixedPcd]
   gArmTokenSpaceGuid.PcdFdBaseAddress
diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
index 2317c1f0ae69..e3092007d27d 100644
--- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
+++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
@@ -16,6 +16,8 @@
 #define SIP_SVC_GET_GIC_ITS    SMC_SIP_FUNCTION_ID(101)
 #define SIP_SVC_GET_CPU_COUNT  SMC_SIP_FUNCTION_ID(200)
 #define SIP_SVC_GET_CPU_NODE   SMC_SIP_FUNCTION_ID(201)
+#define SIP_SVC_GET_MEMORY_NODE_COUNT SMC_SIP_FUNCTION_ID(300)
+#define SIP_SVC_GET_MEMORY_NODE SMC_SIP_FUNCTION_ID(301)
 
 /*
  *  SMCC does not define return codes for SiP functions.
diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
index 8b1b5e5e1b93..5db0eacc9d2d 100644
--- a/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
+++ b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
@@ -9,6 +9,12 @@
 #ifndef HARDWARE_INFO_LIB
 #define HARDWARE_INFO_LIB
 
+typedef struct{
+  UINT32  NodeId;
+  UINT64  AddressBase;
+  UINT64  AddressSize;
+} MemoryInfo;
+
 /**
   Get CPU count from information passed by Qemu.
 
@@ -42,4 +48,29 @@ GetCpuNumaNode (
   IN UINTN  CpuId
   );
 
+/**
+  Get the number of memory node from device tree passed by Qemu.
+
+  @retval                   the number of memory nodes.
+**/
+UINT32
+GetMemNodeCount (
+  VOID
+  );
+
+/**
+  Get memory information(node-id, addressbase, addresssize) for a given memory node from device tree passed by Qemu.
+
+  @param [in]   MemoryId    Index of memory to retrieve memory information.
+  @param [out]  MemInfo     A pointer to the memory information of given memory-id.
+
+
+  @retval                   memory infomation for given memory node.
+**/
+VOID
+GetMemInfo (
+  IN  UINTN       MemoryId,
+  OUT MemoryInfo  *MemInfo
+  );
+
 #endif /* HARDWARE_INFO_LIB */
diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
index e96328978a55..b178cf6c6c43 100644
--- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
@@ -94,3 +94,52 @@ GetCpuNumaNode (
 
   return Arg0;
 }
+
+UINT32
+GetMemNodeCount (
+  VOID
+  )
+{
+  UINTN            SmcResult;
+  UINTN            Arg0;
+
+  SmcResult = ArmCallSmc0 (SIP_SVC_GET_MEMORY_NODE_COUNT, &Arg0, NULL, NULL);
+  if (SmcResult != SMC_SIP_CALL_SUCCESS) {
+    DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_MEMORY_NODE_COUNT call failed. We have no memory information.\n", __FUNCTION__));
+    ResetShutdown ();
+  }
+
+  DEBUG (( DEBUG_INFO, "%a: The number of the memory nodes is %ld\n", __FUNCTION__, Arg0));
+  return (UINT32)Arg0;
+}
+
+VOID
+GetMemInfo (
+  IN  UINTN       MemoryId,
+  OUT MemoryInfo  *MemInfo 
+  )
+{
+  UINTN           SmcResult;
+  UINTN           Arg0;
+  UINTN           Arg1;
+  UINTN           Arg2;
+
+  Arg0 = MemoryId;
+
+  SmcResult = ArmCallSmc1 (SIP_SVC_GET_MEMORY_NODE, &Arg0, &Arg1, &Arg2);
+  if (SmcResult != SMC_SIP_CALL_SUCCESS) {
+    DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_MEMORY_NODE call failed. We have no memory information.\n", __FUNCTION__));
+    ResetShutdown ();
+  } else {
+    MemInfo->NodeId = Arg0;
+    MemInfo->AddressBase = Arg1;
+    MemInfo->AddressSize = Arg2;
+  }
+
+  DEBUG(( DEBUG_INFO, "%a: NUMA node for System RAM:%d = 0x%lx - 0x%lx\n",
+      __FUNCTION__,
+      MemInfo->NodeId,
+      MemInfo->AddressBase,
+      MemInfo->AddressBase + MemInfo->AddressSize -1 ));
+
+}
diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
index 8c2eb0b6a028..f838fdcf274d 100644
--- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
@@ -12,7 +12,7 @@
 #include <Library/DebugLib.h>
 #include <Library/MemoryAllocationLib.h>
 #include <Library/PcdLib.h>
-#include <libfdt.h>
+#include <Library/HardwareInfoLib.h>
 
 // Number of Virtual Memory Map Descriptors
 #define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS          4
@@ -23,53 +23,25 @@ SbsaQemuLibConstructor (
   VOID
   )
 {
-  VOID          *DeviceTreeBase;
-  INT32         Node, Prev;
   UINT64        NewBase, CurBase;
   UINT64        NewSize, CurSize;
-  CONST CHAR8   *Type;
-  INT32         Len;
-  CONST UINT64  *RegProp;
+  UINT32        NumMemNodes;
+  UINT32        Index;
+  MemoryInfo    MemInfo;
   RETURN_STATUS PcdStatus;
 
   NewBase = 0;
   NewSize = 0;
 
-  DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress);
-  ASSERT (DeviceTreeBase != NULL);
-
-  // Make sure we have a valid device tree blob
-  ASSERT (fdt_check_header (DeviceTreeBase) == 0);
-
-  // Look for the lowest memory node
-  for (Prev = 0;; Prev = Node) {
-    Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
-    if (Node < 0) {
-      break;
-    }
-
-    // Check for memory node
-    Type = fdt_getprop (DeviceTreeBase, Node, "device_type", &Len);
-    if (Type && AsciiStrnCmp (Type, "memory", Len) == 0) {
-      // Get the 'reg' property of this node. For now, we will assume
-      // two 8 byte quantities for base and size, respectively.
-      RegProp = fdt_getprop (DeviceTreeBase, Node, "reg", &Len);
-      if (RegProp != 0 && Len == (2 * sizeof (UINT64))) {
-
-        CurBase = fdt64_to_cpu (ReadUnaligned64 (RegProp));
-        CurSize = fdt64_to_cpu (ReadUnaligned64 (RegProp + 1));
-
-        DEBUG ((DEBUG_INFO, "%a: System RAM @ 0x%lx - 0x%lx\n",
-          __FUNCTION__, CurBase, CurBase + CurSize - 1));
-
-        if (NewBase > CurBase || NewBase == 0) {
-          NewBase = CurBase;
-          NewSize = CurSize;
-        }
-      } else {
-        DEBUG ((DEBUG_ERROR, "%a: Failed to parse FDT memory node\n",
-          __FUNCTION__));
-      }
+  NumMemNodes = GetMemNodeCount();
+  for(Index = 0; Index < NumMemNodes; Index++){
+    GetMemInfo(Index, &MemInfo);
+    CurBase = MemInfo.AddressBase;
+    CurSize = MemInfo.AddressSize;
+
+    if (NewBase > CurBase || NewBase == 0) {
+      NewBase = CurBase;
+      NewSize = CurSize;
     }
   }
 
-- 
2.34.1



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#117173): https://edk2.groups.io/g/devel/message/117173
Mute This Topic: https://groups.io/mt/105177615/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-



^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [edk2-devel] [PATCH v10 1/4] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib
  2024-03-27 14:03 ` [edk2-devel] [PATCH v10 1/4] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib Xiong Yining
@ 2024-03-27 15:02   ` Leif Lindholm
  0 siblings, 0 replies; 7+ messages in thread
From: Leif Lindholm @ 2024-03-27 15:02 UTC (permalink / raw)
  To: Xiong Yining; +Cc: devel, ardb+tianocore, graeme, marcin.juszkiewicz, chenbaozi

On Wed, Mar 27, 2024 at 14:03:02 +0000, Xiong Yining wrote:
> From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
> 
> This library provides functions to check for hardware information.
> For now it covers CPU ones:
> 
> - amount of cpu cores
> - MPIDR value for cpu core
> - NUMA node id for cpu core
> 
> Values are read from TF-A using platform specific SMC calls.
> 
> Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>

This is fine, because you're re-submitting a patch already sent out
for review by Marcin. There is public record that he made this
statement.
But when resubmitting patches, you should also add your own
signed-off-by, to indicate that you, to the best of your
knowledge, complies with the statements in
https://github.com/tianocore/edk2?tab=readme-ov-file#developer-certificate-of-origin

/
    Leif

> ---
>  Silicon/Qemu/SbsaQemu/SbsaQemu.dec            |  2 +
>  Platform/Qemu/SbsaQemu/SbsaQemu.dsc           |  3 +-
>  .../SbsaQemuHardwareInfoLib.inf               | 29 ++++++
>  .../Include/IndustryStandard/SbsaQemuSmc.h    | 17 +++-
>  .../Include/Library/HardwareInfoLib.h         | 45 +++++++++
>  .../SbsaQemuHardwareInfoLib.c                 | 96 +++++++++++++++++++
>  6 files changed, 187 insertions(+), 5 deletions(-)
>  create mode 100644 Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
>  create mode 100644 Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
>  create mode 100644 Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
> 
> diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
> index 913d1d75ef29..427ff8b31aac 100644
> --- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
> +++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
> @@ -12,6 +12,8 @@
>    PACKAGE_GUID                   = 8db32c5a-2821-43e2-b4ac-bc148e2b0b05
>    PACKAGE_VERSION                = 0.1
>  
> +[LibraryClasses]
> +HardwareInfoLib|Include/Library/HardwareInfoLib.h
>  ################################################################################
>  #
>  # Include Section - list of Include Paths that are provided by this package.
> diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
> index 378600050df9..3c3d2449bff4 100644
> --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
> +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
> @@ -1,6 +1,6 @@
>  #
>  #  Copyright (c) 2021, NUVIA Inc. All rights reserved.
> -#  Copyright (c) 2019, Linaro Limited. All rights reserved.
> +#  Copyright (c) 2019-2024, Linaro Ltd. All rights reserved.
>  #
>  #  SPDX-License-Identifier: BSD-2-Clause-Patent
>  #
> @@ -128,6 +128,7 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE       = FALSE
>  
>    FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf
>    OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
> +  HardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
>  
>    # Debug Support
>    PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
> diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
> new file mode 100644
> index 000000000000..2acb2a1e7c76
> --- /dev/null
> +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
> @@ -0,0 +1,29 @@
> +#/* @file
> +#
> +#  Copyright (c) 2024, Linaro Ltd. All rights reserved.
> +#
> +#  SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#*/
> +
> +[Defines]
> +  INF_VERSION                    = 0x0001001c
> +  BASE_NAME                      = SbsaQemuHardwareInfoLib
> +  FILE_GUID                      = 6454006f-6502-46e2-9be4-4bba8d4b29fb
> +  MODULE_TYPE                    = BASE
> +  VERSION_STRING                 = 1.0
> +  LIBRARY_CLASS                  = HardwareInfoLib
> +
> +[Sources]
> +  SbsaQemuHardwareInfoLib.c
> +
> +[Packages]
> +  ArmPkg/ArmPkg.dec
> +  EmbeddedPkg/EmbeddedPkg.dec
> +  MdePkg/MdePkg.dec
> +  MdeModulePkg/MdeModulePkg.dec
> +  Silicon/Qemu/SbsaQemu/SbsaQemu.dec
> +
> +[LibraryClasses]
> +  ArmSmcLib
> +  ResetSystemLib
> diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
> index 7934875e4aba..2317c1f0ae69 100644
> --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
> +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
> @@ -1,6 +1,6 @@
>  /** @file
>  *
> -*  Copyright (c) 2023, Linaro Ltd. All rights reserved.<BR>
> +*  Copyright (c) 2023-2024, Linaro Ltd. All rights reserved.<BR>
>  *
>  *  SPDX-License-Identifier: BSD-2-Clause-Patent
>  *
> @@ -11,8 +11,17 @@
>  
>  #include <IndustryStandard/ArmStdSmc.h>
>  
> -#define SIP_SVC_VERSION  SMC_SIP_FUNCTION_ID(1)
> -#define SIP_SVC_GET_GIC  SMC_SIP_FUNCTION_ID(100)
> -#define SIP_SVC_GET_GIC_ITS  SMC_SIP_FUNCTION_ID(101)
> +#define SIP_SVC_VERSION        SMC_SIP_FUNCTION_ID(1)
> +#define SIP_SVC_GET_GIC        SMC_SIP_FUNCTION_ID(100)
> +#define SIP_SVC_GET_GIC_ITS    SMC_SIP_FUNCTION_ID(101)
> +#define SIP_SVC_GET_CPU_COUNT  SMC_SIP_FUNCTION_ID(200)
> +#define SIP_SVC_GET_CPU_NODE   SMC_SIP_FUNCTION_ID(201)
> +
> +/*
> + *  SMCC does not define return codes for SiP functions.
> + *  We use Architecture ones then.
> + */
> +
> +#define SMC_SIP_CALL_SUCCESS  SMC_ARCH_CALL_SUCCESS
>  
>  #endif /* SBSA_QEMU_SMC_H_ */
> diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
> new file mode 100644
> index 000000000000..8b1b5e5e1b93
> --- /dev/null
> +++ b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
> @@ -0,0 +1,45 @@
> +/** @file
> +*
> +*  Copyright (c) 2024, Linaro Ltd. All rights reserved.
> +*
> +*  SPDX-License-Identifier: BSD-2-Clause-Patent
> +*
> +**/
> +
> +#ifndef HARDWARE_INFO_LIB
> +#define HARDWARE_INFO_LIB
> +
> +/**
> +  Get CPU count from information passed by Qemu.
> +
> +**/
> +UINT32
> +GetCpuCount (
> +  VOID
> +  );
> +
> +/**
> +  Get MPIDR for a given cpu from device tree passed by Qemu.
> +
> +  @param [in]   CpuId    Index of cpu to retrieve MPIDR value for.
> +
> +  @retval                MPIDR value of CPU at index <CpuId>
> +**/
> +UINT64
> +GetMpidr (
> +  IN UINTN  CpuId
> +  );
> +
> +/**
> +  Get NUMA node id for a given cpu from device tree passed by Qemu.
> +
> +  @param [in]   CpuId    Index of cpu to retrieve NUMA node id for.
> +
> +  @retval                NUMA node id for CPU at index <CpuId>
> +**/
> +UINT64
> +GetCpuNumaNode (
> +  IN UINTN  CpuId
> +  );
> +
> +#endif /* HARDWARE_INFO_LIB */
> diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
> new file mode 100644
> index 000000000000..e96328978a55
> --- /dev/null
> +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
> @@ -0,0 +1,96 @@
> +/** @file
> +*
> +*  Copyright (c) 2021, NUVIA Inc. All rights reserved.
> +*  Copyright (c) 2024, Linaro Ltd. All rights reserved.
> +*
> +*  SPDX-License-Identifier: BSD-2-Clause-Patent
> +*
> +**/
> +
> +#include <Library/ArmSmcLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/ResetSystemLib.h>
> +#include <Library/HardwareInfoLib.h>
> +#include <IndustryStandard/SbsaQemuSmc.h>
> +
> +/**
> +  Get CPU count from information passed by Qemu.
> +
> +**/
> +UINT32
> +GetCpuCount (
> +  VOID
> +  )
> +{
> +  UINTN          Arg0;
> +  UINTN          SmcResult;
> +
> +  SmcResult = ArmCallSmc0 (SIP_SVC_GET_CPU_COUNT, &Arg0, NULL, NULL);
> +  if (SmcResult != SMC_SIP_CALL_SUCCESS) {
> +    DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_CPU_COUNT call failed. We have no cpu information.\n", __FUNCTION__));
> +    ResetShutdown ();
> +  }
> +
> +  DEBUG ((DEBUG_INFO, "%a: We have %d cpus.\n", __FUNCTION__, Arg0));
> +
> +  return Arg0;
> +}
> +
> +/**
> +  Get MPIDR for a given cpu from device tree passed by Qemu.
> +
> +  @param [in]   CpuId    Index of cpu to retrieve MPIDR value for.
> +
> +  @retval                MPIDR value of CPU at index <CpuId>
> +**/
> +UINT64
> +GetMpidr (
> +  IN UINTN  CpuId
> +  )
> +{
> +  UINTN  SmcResult;
> +  UINTN  Arg0;
> +  UINTN  Arg1;
> +
> +  Arg0 = CpuId;
> +
> +  SmcResult = ArmCallSmc0 (SIP_SVC_GET_CPU_NODE, &Arg0, &Arg1, NULL);
> +  if (SmcResult != SMC_SIP_CALL_SUCCESS) {
> +    DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_CPU_NODE call failed. We have no MPIDR for CPU%d.\n", __FUNCTION__, CpuId));
> +    ResetShutdown ();
> +  }
> +
> +  DEBUG ((DEBUG_INFO, "%a: MPIDR for CPU%d: = %d\n", __FUNCTION__, CpuId, Arg1));
> +
> +  return Arg1;
> +}
> +
> +/**
> +  Get NUMA node id for a given cpu from device tree passed by Qemu.
> +
> +  @param [in]   CpuId    Index of cpu to retrieve NUMA node id for.
> +
> +  @retval                NUMA node id for CPU at index <CpuId>
> +**/
> +UINT64
> +GetCpuNumaNode (
> +  IN UINTN  CpuId
> +  )
> +{
> +  UINTN  SmcResult;
> +  UINTN  Arg0;
> +  UINTN  Arg1;
> +
> +  Arg0 = CpuId;
> +
> +  SmcResult = ArmCallSmc0 (SIP_SVC_GET_CPU_NODE, &Arg0, &Arg1, NULL);
> +  if (SmcResult != SMC_SIP_CALL_SUCCESS) {
> +    DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_CPU_NODE call failed. Could not find information for CPU%d.\n", __FUNCTION__, CpuId));
> +    return 0;
> +  }
> +
> +  DEBUG ((DEBUG_INFO, "%a: NUMA node for CPU%d: = %d\n", __FUNCTION__, CpuId, Arg0));
> +
> +  return Arg0;
> +}
> -- 
> 2.34.1
> 


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#117176): https://edk2.groups.io/g/devel/message/117176
Mute This Topic: https://groups.io/mt/105177611/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-



^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [edk2-devel] [PATCH v10 4/4] Platform/SbsaQemu: get the information of memory via SMC calls
  2024-03-27 14:03 ` [edk2-devel] [PATCH v10 4/4] Platform/SbsaQemu: get the information of memory via SMC calls Xiong Yining
@ 2024-03-27 15:06   ` Leif Lindholm
  0 siblings, 0 replies; 7+ messages in thread
From: Leif Lindholm @ 2024-03-27 15:06 UTC (permalink / raw)
  To: Xiong Yining
  Cc: devel, ardb+tianocore, graeme, marcin.juszkiewicz, chenbaozi,
	Ard Biesheuvel

I think the patch ordering relative to 3/4 breaks bisect?

/
    Leif

On Wed, Mar 27, 2024 at 14:03:05 +0000, Xiong Yining wrote:
> Provide functions to check for memory information:
> 
> - amount of memory nodes
> - memory address
> - NUMA node id for memory
> 
> Values are read from TF-A using platform specific SMC calls.
> 
> Signed-off-by: Xiong Yining <xiongyining1480@phytium.com.cn>
> Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn>
> Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
> ---
>  .../Library/SbsaQemuLib/SbsaQemuLib.inf       |  3 +-
>  .../Include/IndustryStandard/SbsaQemuSmc.h    |  2 +
>  .../Include/Library/HardwareInfoLib.h         | 31 +++++++++++
>  .../SbsaQemuHardwareInfoLib.c                 | 49 +++++++++++++++++
>  .../Library/SbsaQemuLib/SbsaQemuMem.c         | 54 +++++--------------
>  5 files changed, 96 insertions(+), 43 deletions(-)
> 
> diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
> index 07e6bc4e9b11..384cbb349200 100644
> --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
> +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
> @@ -32,14 +32,13 @@
>    ArmLib
>    BaseMemoryLib
>    DebugLib
> +  HardwareInfoLib
>    MemoryAllocationLib
>    PcdLib
> -  SbsaQemuHardwareInfoLib
>  
>  [Pcd]
>    gArmTokenSpaceGuid.PcdSystemMemoryBase
>    gArmTokenSpaceGuid.PcdSystemMemorySize
> -  gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
>  
>  [FixedPcd]
>    gArmTokenSpaceGuid.PcdFdBaseAddress
> diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
> index 2317c1f0ae69..e3092007d27d 100644
> --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
> +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
> @@ -16,6 +16,8 @@
>  #define SIP_SVC_GET_GIC_ITS    SMC_SIP_FUNCTION_ID(101)
>  #define SIP_SVC_GET_CPU_COUNT  SMC_SIP_FUNCTION_ID(200)
>  #define SIP_SVC_GET_CPU_NODE   SMC_SIP_FUNCTION_ID(201)
> +#define SIP_SVC_GET_MEMORY_NODE_COUNT SMC_SIP_FUNCTION_ID(300)
> +#define SIP_SVC_GET_MEMORY_NODE SMC_SIP_FUNCTION_ID(301)
>  
>  /*
>   *  SMCC does not define return codes for SiP functions.
> diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
> index 8b1b5e5e1b93..5db0eacc9d2d 100644
> --- a/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
> +++ b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
> @@ -9,6 +9,12 @@
>  #ifndef HARDWARE_INFO_LIB
>  #define HARDWARE_INFO_LIB
>  
> +typedef struct{
> +  UINT32  NodeId;
> +  UINT64  AddressBase;
> +  UINT64  AddressSize;
> +} MemoryInfo;
> +
>  /**
>    Get CPU count from information passed by Qemu.
>  
> @@ -42,4 +48,29 @@ GetCpuNumaNode (
>    IN UINTN  CpuId
>    );
>  
> +/**
> +  Get the number of memory node from device tree passed by Qemu.
> +
> +  @retval                   the number of memory nodes.
> +**/
> +UINT32
> +GetMemNodeCount (
> +  VOID
> +  );
> +
> +/**
> +  Get memory information(node-id, addressbase, addresssize) for a given memory node from device tree passed by Qemu.
> +
> +  @param [in]   MemoryId    Index of memory to retrieve memory information.
> +  @param [out]  MemInfo     A pointer to the memory information of given memory-id.
> +
> +
> +  @retval                   memory infomation for given memory node.
> +**/
> +VOID
> +GetMemInfo (
> +  IN  UINTN       MemoryId,
> +  OUT MemoryInfo  *MemInfo
> +  );
> +
>  #endif /* HARDWARE_INFO_LIB */
> diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
> index e96328978a55..b178cf6c6c43 100644
> --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
> +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
> @@ -94,3 +94,52 @@ GetCpuNumaNode (
>  
>    return Arg0;
>  }
> +
> +UINT32
> +GetMemNodeCount (
> +  VOID
> +  )
> +{
> +  UINTN            SmcResult;
> +  UINTN            Arg0;
> +
> +  SmcResult = ArmCallSmc0 (SIP_SVC_GET_MEMORY_NODE_COUNT, &Arg0, NULL, NULL);
> +  if (SmcResult != SMC_SIP_CALL_SUCCESS) {
> +    DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_MEMORY_NODE_COUNT call failed. We have no memory information.\n", __FUNCTION__));
> +    ResetShutdown ();
> +  }
> +
> +  DEBUG (( DEBUG_INFO, "%a: The number of the memory nodes is %ld\n", __FUNCTION__, Arg0));
> +  return (UINT32)Arg0;
> +}
> +
> +VOID
> +GetMemInfo (
> +  IN  UINTN       MemoryId,
> +  OUT MemoryInfo  *MemInfo 
> +  )
> +{
> +  UINTN           SmcResult;
> +  UINTN           Arg0;
> +  UINTN           Arg1;
> +  UINTN           Arg2;
> +
> +  Arg0 = MemoryId;
> +
> +  SmcResult = ArmCallSmc1 (SIP_SVC_GET_MEMORY_NODE, &Arg0, &Arg1, &Arg2);
> +  if (SmcResult != SMC_SIP_CALL_SUCCESS) {
> +    DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_MEMORY_NODE call failed. We have no memory information.\n", __FUNCTION__));
> +    ResetShutdown ();
> +  } else {
> +    MemInfo->NodeId = Arg0;
> +    MemInfo->AddressBase = Arg1;
> +    MemInfo->AddressSize = Arg2;
> +  }
> +
> +  DEBUG(( DEBUG_INFO, "%a: NUMA node for System RAM:%d = 0x%lx - 0x%lx\n",
> +      __FUNCTION__,
> +      MemInfo->NodeId,
> +      MemInfo->AddressBase,
> +      MemInfo->AddressBase + MemInfo->AddressSize -1 ));
> +
> +}
> diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
> index 8c2eb0b6a028..f838fdcf274d 100644
> --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
> +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
> @@ -12,7 +12,7 @@
>  #include <Library/DebugLib.h>
>  #include <Library/MemoryAllocationLib.h>
>  #include <Library/PcdLib.h>
> -#include <libfdt.h>
> +#include <Library/HardwareInfoLib.h>
>  
>  // Number of Virtual Memory Map Descriptors
>  #define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS          4
> @@ -23,53 +23,25 @@ SbsaQemuLibConstructor (
>    VOID
>    )
>  {
> -  VOID          *DeviceTreeBase;
> -  INT32         Node, Prev;
>    UINT64        NewBase, CurBase;
>    UINT64        NewSize, CurSize;
> -  CONST CHAR8   *Type;
> -  INT32         Len;
> -  CONST UINT64  *RegProp;
> +  UINT32        NumMemNodes;
> +  UINT32        Index;
> +  MemoryInfo    MemInfo;
>    RETURN_STATUS PcdStatus;
>  
>    NewBase = 0;
>    NewSize = 0;
>  
> -  DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress);
> -  ASSERT (DeviceTreeBase != NULL);
> -
> -  // Make sure we have a valid device tree blob
> -  ASSERT (fdt_check_header (DeviceTreeBase) == 0);
> -
> -  // Look for the lowest memory node
> -  for (Prev = 0;; Prev = Node) {
> -    Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
> -    if (Node < 0) {
> -      break;
> -    }
> -
> -    // Check for memory node
> -    Type = fdt_getprop (DeviceTreeBase, Node, "device_type", &Len);
> -    if (Type && AsciiStrnCmp (Type, "memory", Len) == 0) {
> -      // Get the 'reg' property of this node. For now, we will assume
> -      // two 8 byte quantities for base and size, respectively.
> -      RegProp = fdt_getprop (DeviceTreeBase, Node, "reg", &Len);
> -      if (RegProp != 0 && Len == (2 * sizeof (UINT64))) {
> -
> -        CurBase = fdt64_to_cpu (ReadUnaligned64 (RegProp));
> -        CurSize = fdt64_to_cpu (ReadUnaligned64 (RegProp + 1));
> -
> -        DEBUG ((DEBUG_INFO, "%a: System RAM @ 0x%lx - 0x%lx\n",
> -          __FUNCTION__, CurBase, CurBase + CurSize - 1));
> -
> -        if (NewBase > CurBase || NewBase == 0) {
> -          NewBase = CurBase;
> -          NewSize = CurSize;
> -        }
> -      } else {
> -        DEBUG ((DEBUG_ERROR, "%a: Failed to parse FDT memory node\n",
> -          __FUNCTION__));
> -      }
> +  NumMemNodes = GetMemNodeCount();
> +  for(Index = 0; Index < NumMemNodes; Index++){
> +    GetMemInfo(Index, &MemInfo);
> +    CurBase = MemInfo.AddressBase;
> +    CurSize = MemInfo.AddressSize;
> +
> +    if (NewBase > CurBase || NewBase == 0) {
> +      NewBase = CurBase;
> +      NewSize = CurSize;
>      }
>    }
>  
> -- 
> 2.34.1
> 


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#117177): https://edk2.groups.io/g/devel/message/117177
Mute This Topic: https://groups.io/mt/105177615/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-



^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2024-03-27 15:06 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-03-27 14:03 [edk2-devel] [PATCH v10 0/4] get rid of DeviceTree from SbsaQemu Xiong Yining
2024-03-27 14:03 ` [edk2-devel] [PATCH v10 1/4] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib Xiong Yining
2024-03-27 15:02   ` Leif Lindholm
2024-03-27 14:03 ` [edk2-devel] [PATCH v10 2/4] Platform/SbsaQemu: use SbsaQemuHardwareInfoLib for cpu information Xiong Yining
2024-03-27 14:03 ` [edk2-devel] [PATCH v10 3/4] Platform/SbsaQemu: drop use of DeviceTree Xiong Yining
2024-03-27 14:03 ` [edk2-devel] [PATCH v10 4/4] Platform/SbsaQemu: get the information of memory via SMC calls Xiong Yining
2024-03-27 15:06   ` Leif Lindholm

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox