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From: "Chao Li" <lichao@loongson.cn>
To: devel@edk2.groups.io
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>,
	Jiewen Yao <jiewen.yao@intel.com>,
	Gerd Hoffmann <kraxel@redhat.com>,
	Xianglai Li <lixianglai@loongson.cn>
Subject: [edk2-devel] [PATCH v1 3/4] OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version
Date: Wed, 17 Apr 2024 16:13:46 +0800	[thread overview]
Message-ID: <20240417081346.3125462-1-lichao@loongson.cn> (raw)
In-Reply-To: <20240417081256.3125187-1-lichao@loongson.cn>

Added the PEI stage library for QemuFwCfgMmioLib, which uses the FDT to
find the fw_cfg and parse it.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Co-authored-by: Xianglai Li <lixianglai@loongson.cn>
Signed-off-by: Chao Li <lichao@loongson.cn>
---
 .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 159 ++++++++++++++++++
 .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf      |  50 ++++++
 2 files changed, 209 insertions(+)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
new file mode 100644
index 0000000000..233a88c353
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
@@ -0,0 +1,159 @@
+/** @file
+
+  Stateful and implicitly initialized fw_cfg library implementation.
+
+  Copyright (C) 2013 - 2014, Red Hat, Inc.
+  Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
+  (C) Copyright 2021 Hewlett Packard Enterprise Development LP<BR>
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights reserved.<BR>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include <Uefi.h>
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/QemuFwCfgLib.h>
+
+#include <libfdt.h>
+
+#include "QemuFwCfgLibMmioInternal.h"
+
+//
+// These correspond to the implementation we detect at runtime.
+//
+READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = MmioReadBytes;
+WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
+SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
+
+RETURN_STATUS
+EFIAPI
+QemuFwCfgInitialize (
+  VOID
+  )
+{
+  VOID          *DeviceTreeBase;
+  INT32         Node;
+  INT32         Prev;
+  CONST CHAR8   *Type;
+  INT32         Len;
+  CONST UINT64  *Reg;
+  UINT64        FwCfgSelectorAddress;
+  UINT64        FwCfgSelectorSize;
+  UINT64        FwCfgDataAddress;
+  UINT64        FwCfgDataSize;
+  UINT64        FwCfgDmaAddress;
+  UINT64        FwCfgDmaSize;
+
+  DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
+  ASSERT (DeviceTreeBase != NULL);
+  //
+  // Make sure we have a valid device tree blob
+  //
+  ASSERT (fdt_check_header (DeviceTreeBase) == 0);
+
+  for (Prev = 0; ; Prev = Node) {
+    Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
+    if (Node < 0) {
+      break;
+    }
+
+    //
+    // Check for memory node
+    //
+    Type = fdt_getprop (DeviceTreeBase, Node, "compatible", &Len);
+    if ((Type) &&
+        (AsciiStrnCmp (Type, "qemu,fw-cfg-mmio", Len) == 0))
+    {
+      //
+      // Get the 'reg' property of this node. For now, we will assume
+      // two 8 byte quantities for base and size, respectively.
+      //
+      Reg = fdt_getprop (DeviceTreeBase, Node, "reg", &Len);
+      if ((Reg != 0) &&
+          (Len == (2 * sizeof (UINT64))))
+      {
+        FwCfgDataAddress     = SwapBytes64 (Reg[0]);
+        FwCfgDataSize        = 8;
+        FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
+        FwCfgSelectorSize    = 2;
+
+        //
+        // The following ASSERT()s express
+        //
+        //   Address + Size - 1 <= MAX_UINTN
+        //
+        // for both registers, that is, that the last byte in each MMIO range is
+        // expressible as a MAX_UINTN. The form below is mathematically
+        // equivalent, and it also prevents any unsigned overflow before the
+        // comparison.
+        //
+        ASSERT (FwCfgSelectorAddress <= MAX_UINTN - FwCfgSelectorSize + 1);
+        ASSERT (FwCfgDataAddress     <= MAX_UINTN - FwCfgDataSize     + 1);
+
+        PcdSet64S (PcdFwCfgSelectorAddress, FwCfgSelectorAddress);
+        PcdSet64S (PcdFwCfgDataAddress, FwCfgDataAddress);
+        DEBUG ((
+          DEBUG_INFO,
+          "Found FwCfg @ 0x%Lx/0x%Lx\n",
+          FwCfgSelectorAddress,
+          FwCfgDataAddress
+          ));
+
+        if (SwapBytes64 (Reg[1]) >= 0x18) {
+          FwCfgDmaAddress = FwCfgDataAddress + 0x10;
+          FwCfgDmaSize    = 0x08;
+
+          //
+          // See explanation above.
+          //
+          ASSERT (FwCfgDmaAddress <= MAX_UINTN - FwCfgDmaSize + 1);
+
+          DEBUG ((DEBUG_INFO, "Found FwCfg DMA @ 0x%Lx\n", FwCfgDmaAddress));
+        } else {
+          FwCfgDmaAddress = 0;
+        }
+
+        if (QemuFwCfgIsAvailable ()) {
+          UINT32  Signature;
+
+          QemuFwCfgSelectItem (QemuFwCfgItemSignature);
+          Signature = QemuFwCfgRead32 ();
+          if (Signature == SIGNATURE_32 ('Q', 'E', 'M', 'U')) {
+            //
+            // For DMA support, we require the DTB to advertise the register, and the
+            // feature bitmap (which we read without DMA) to confirm the feature.
+            //
+            if (FwCfgDmaAddress != 0) {
+              UINT32  Features;
+
+              QemuFwCfgSelectItem (QemuFwCfgItemInterfaceVersion);
+              Features = QemuFwCfgRead32 ();
+              if ((Features & FW_CFG_F_DMA) != 0) {
+                PcdSet64S (PcdFwCfgDmaAddress, FwCfgDmaAddress);
+                InternalQemuFwCfgReadBytes  = DmaReadBytes;
+                InternalQemuFwCfgWriteBytes = DmaWriteBytes;
+                InternalQemuFwCfgSkipBytes  = DmaSkipBytes;
+              }
+            }
+          } else {
+            PcdSet64S (PcdFwCfgSelectorAddress, 0x0);
+            PcdSet64S (PcdFwCfgDataAddress, 0x0);
+          }
+        }
+
+        break;
+      } else {
+        DEBUG ((
+          DEBUG_ERROR,
+          "%a: Failed to parse FDT QemuCfg node\n",
+          __func__
+          ));
+        break;
+      }
+    }
+  }
+
+  return RETURN_SUCCESS;
+}
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf
new file mode 100644
index 0000000000..cd2b2707a2
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf
@@ -0,0 +1,50 @@
+## @file
+#
+#  Stateful, implicitly initialized fw_cfg library.
+#
+#  Copyright (C) 2013 - 2014, Red Hat, Inc.
+#  Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
+#  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights reserved.<BR>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION                    = 1.29
+  BASE_NAME                      = QemuFwCfgPeiLib
+  FILE_GUID                      = CDF9A9D5-7422-4DCB-B41D-607151AD320B
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = QemuFwCfgLib|PEIM
+
+  CONSTRUCTOR                    = QemuFwCfgInitialize
+
+#
+# The following information is for reference only and not required by the build
+# tools.
+#
+#  VALID_ARCHITECTURES           = LOONGARCH64
+#
+
+[Sources]
+  QemuFwCfgLibMmio.c
+  QemuFwCfgMmioPei.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  DebugLib
+  IoLib
+  PcdLib
+
+[Pcd]
+  gUefiOvmfPkgTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress
+  gUefiOvmfPkgTokenSpaceGuid.PcdFwCfgSelectorAddress           ## CONSUMES
+  gUefiOvmfPkgTokenSpaceGuid.PcdFwCfgDataAddress               ## CONSUMES
+  gUefiOvmfPkgTokenSpaceGuid.PcdFwCfgDmaAddress                ## CONSUMES
-- 
2.27.0



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  parent reply	other threads:[~2024-04-17  8:14 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-17  8:12 [edk2-devel] [PATCH v1 0/4] Adjust the QemuFwCfgLibMmio and add PEI stage Chao Li
2024-04-17  8:13 ` [edk2-devel] [PATCH v1 1/4] OvmfPkg: Add three PCDs for QemuFwCfgLib Chao Li
2024-04-17  8:13 ` [edk2-devel] [PATCH v1 2/4] OvmfPkg: Separate QemuFwCfgLibMmio.c into two files Chao Li
2024-04-17  8:13 ` Chao Li [this message]
2024-04-17  8:13 ` [edk2-devel] [PATCH v1 4/4] OvmfPkg: Rename QemuFwCfgLibMmio.inf and enable new name in AARCH64 and RISCV64 virtual machines Chao Li
2024-04-17  9:35 ` [edk2-devel] [PATCH v1 0/4] Adjust the QemuFwCfgLibMmio and add PEI stage Gerd Hoffmann
2024-04-17 10:01   ` Chao Li
     [not found]   ` <17C70907D38C479B.20815@groups.io>
2024-04-22  9:21     ` Chao Li
     [not found]     ` <17C88FBD6FF53AEF.31749@groups.io>
2024-04-24  1:57       ` Chao Li
2024-04-24 11:19         ` Gerd Hoffmann
2024-04-24 16:23           ` Ard Biesheuvel
2024-04-25  1:25             ` Chao Li
2024-04-25  1:23           ` Chao Li

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