From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail04.groups.io (mail04.groups.io [45.79.224.9]) by spool.mail.gandi.net (Postfix) with ESMTPS id 246367803CE for ; Wed, 17 Apr 2024 11:27:44 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=DEhagHcgIX4PxO5SsT3hqVf/7BowreP8JoT/mlTCW0o=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Resent-From:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20240206; t=1713353263; v=1; b=wbGnAqtPV60NQklrpKaX2A3Nv/uaTMpK38dxipvtaGqb9dWncyCg8JiBZ7p497hQOSRAS5v/ gc5ZdjEbX8UPo3DtfA9y2W+moD+SyKaVk22GDHSU5bDBIwtQpFtf7CxrfG7GNoFZOCjytPbUOyA 0hC323s0xT3ks6RcYa1+OniHCT/Vp+KIMKUPeWOmk5fn4+CdmpHfFficSWq20n10Twv4q3qSNPT ISsnme0gYtv9vNoCa1vOnsQu/W/WA3dduYof6ihLwDxKichGO3sSzTA26o/jNVz+tgjvDlFST6G Pe4xlHk1KrzcDBSIl7eYyYXD5VriabzBWFOiMzDeLCMQw== X-Received: by 127.0.0.2 with SMTP id ubZ4YY7687511x3VKl6ZoY0l; Wed, 17 Apr 2024 04:27:43 -0700 X-Received: from zg8tmja5ljk3lje4ms43mwaa.icoremail.net (zg8tmja5ljk3lje4ms43mwaa.icoremail.net [209.97.181.73]) by mx.groups.io with SMTP id smtpd.web10.10399.1713353256626072616 for ; Wed, 17 Apr 2024 04:27:37 -0700 X-Received: from prodtpl.icoremail.net (unknown [10.12.1.20]) by hzbj-icmmx-6 (Coremail) with SMTP id AQAAfwBX1EEksh9msczBCA--.58532S2; Wed, 17 Apr 2024 19:27:32 +0800 (CST) X-Received: from phytium.com.cn (unknown [218.76.62.144]) by mail (Coremail) with SMTP id AQAAfwDneaMdsh9mcowAAA--.1062S5; Wed, 17 Apr 2024 19:27:31 +0800 (CST) From: "Xiong Yining" To: devel@edk2.groups.io Cc: quic_llindhol@quicinc.com, ardb+tianocore@kernel.org, graeme@xora.org.uk, marcin.juszkiewicz@linaro.org, chenbaozi@phytium.com.cn, Xiong Yining Subject: [edk2-devel] [PATCH 2/2] Silicon/SbsaQemu: align the PPTT tables with qemu configuration Date: Wed, 17 Apr 2024 11:26:34 +0000 Message-Id: <20240417112634.120633-3-xiongyining1480@phytium.com.cn> In-Reply-To: <20240417112634.120633-1-xiongyining1480@phytium.com.cn> References: <20240417112634.120633-1-xiongyining1480@phytium.com.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAfwDneaMdsh9mcowAAA--.1062S5 X-CM-SenderInfo: x0lr0wp1lqx0bjrumio6sk53xlxphulrpou0/1tbiAQASBmYe0uQEdQAEsu X-Coremail-Antispam: 1Uk129KBjvAXoWfGrW7uFy3tFWUJF1rtFyrJFb_yoW8JrW8Zo Waqa4Iga48Gr4UJF18Kw1kZFWYkr17Zry3Ars7ZrZxJr43ZrnxtasFqw45Wry7Wrn0vr98 Gr1Sg347AF4fKw1Un29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXasCq-sGcSsGvf J3UbIjqfuFe4nvWSU8nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2KfnxnUUI43ZEXa7xR_UU UUUUUUU== Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Wed, 17 Apr 2024 04:27:37 -0700 Resent-From: xiongyining1480@phytium.com.cn Reply-To: devel@edk2.groups.io,xiongyining1480@phytium.com.cn List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: ZF3PAfgmkn5X3YMhSAXDL2JUx7686176AA= Content-Transfer-Encoding: 8bit X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=wbGnAqtP; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.9 as permitted sender) smtp.mailfrom=bounce@groups.io To align the CPU topology information recognized by the operating system with the CPU topology information configured by QEMU, we need to make use of the CPU topology information to create complex PPTT tables setups. We can get the CPU topology information via SMC. Signed-off-by: Xiong Yining --- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h | 12 ++ .../Include/IndustryStandard/SbsaQemuAcpi.h | 32 ---- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 140 +++++++++++++----- 3 files changed, 114 insertions(+), 70 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h index 83a085cd86f4..e29635b28938 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h @@ -90,4 +90,16 @@ typedef struct { ClockDomain /* Clock Domain */ \ } +#define SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT( \ + Flags, Parent, ACPIProcessorID, NumberOfPrivateResources) \ + { \ + EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, /* Type */ \ + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + NumberOfPrivateResources * sizeof (UINT32), /* Length */ \ + { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, /* Reserved */ \ + Flags, /* Flags */ \ + Parent, /* Parent */ \ + ACPIProcessorID, /* ACPI Processor ID */ \ + NumberOfPrivateResources /* Number of private resources */ \ + } + #endif diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h index 61d8bce8c959..7ef85b7e2f79 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h @@ -166,36 +166,4 @@ typedef struct { 64 /* LineSize */ \ } -#define SBSAQEMU_ACPI_PPTT_CLUSTER_STRUCT { \ - EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, \ - sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR), \ - { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, \ - { \ - EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL, /* PhysicalPackage */ \ - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, /* AcpiProcessorIdValid */ \ - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, /* Is not a Thread */ \ - EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, /* Not Leaf */ \ - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL, /* Identical Cores */ \ - }, \ - 0, /* Parent */ \ - 0, /* AcpiProcessorId */ \ - 0, /* NumberOfPrivateResources */ \ - } - -#define SBSAQEMU_ACPI_PPTT_CORE_STRUCT { \ - EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, \ - (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + (2 * sizeof (UINT32))), \ - { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, \ - { \ - EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, /* PhysicalPackage */ \ - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, /* AcpiProcessorValid */ \ - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, /* Is not a Thread */ \ - EFI_ACPI_6_3_PPTT_NODE_IS_LEAF, /* Leaf */ \ - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL, /* Identical Cores */ \ - }, \ - 0, /* Parent */ \ - 0, /* AcpiProcessorId */ \ - 2, /* NumberOfPrivateResources */ \ - } - #endif diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index 30239e7dca0d..6e2258a3a54d 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -496,14 +496,23 @@ AddPpttTable ( EFI_PHYSICAL_ADDRESS PageAddress; UINT8 *New; UINT32 CpuId; - UINT32 NumCores = GetCpuCount (); + CpuTopology CpuTopo; EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L1DCache = SBSAQEMU_ACPI_PPTT_L1_D_CACHE_STRUCT; EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L1ICache = SBSAQEMU_ACPI_PPTT_L1_I_CACHE_STRUCT; EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L2Cache = SBSAQEMU_ACPI_PPTT_L2_CACHE_STRUCT; - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster = SBSAQEMU_ACPI_PPTT_CLUSTER_STRUCT; - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Core = SBSAQEMU_ACPI_PPTT_CORE_STRUCT; + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS SocketFlags = { EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL, EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL, }; + + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS ClusterFlags = { EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL, }; + + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS CoreFlags = { EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, EFI_ACPI_6_3_PPTT_NODE_IS_LEAF, EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL, }; + + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS ThreadFlags = { EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_THREAD, EFI_ACPI_6_3_PPTT_NODE_IS_LEAF, EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL, }; EFI_ACPI_DESCRIPTION_HEADER Header = SBSAQEMU_ACPI_HEADER ( @@ -511,11 +520,17 @@ AddPpttTable ( EFI_ACPI_DESCRIPTION_HEADER, EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION); + GetCpuTopology(&CpuTopo); TableSize = sizeof (EFI_ACPI_DESCRIPTION_HEADER) + - sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + - (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE) * 3) + - (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) * NumCores) + - (sizeof (UINT32) * 2 * NumCores); + CpuTopo.Sockets * (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + + CpuTopo.Clusters * (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE) * 3 + + CpuTopo.Cores * (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + + sizeof (UINT32) * 2))); + + if (CpuTopo.Threads > 1){ + TableSize += CpuTopo.Sockets * CpuTopo.Clusters * CpuTopo.Cores * CpuTopo.Threads * sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + } Status = gBS->AllocatePages ( AllocateAnyPages, @@ -536,39 +551,88 @@ AddPpttTable ( ((EFI_ACPI_DESCRIPTION_HEADER*) New)->Length = TableSize; New += sizeof (EFI_ACPI_DESCRIPTION_HEADER); - // Add the Cluster PPTT structure - CopyMem (New, &Cluster, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR)); - New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); - - // Add L1 D Cache structure - CopyMem (New, &L1DCache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)); - ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE*) New)->NextLevelOfCache = L2_CACHE_INDEX; - New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); - - // Add L1 I Cache structure - CopyMem (New, &L1ICache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)); - ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE*) New)->NextLevelOfCache = L2_CACHE_INDEX; - New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); - - // Add L2 Cache structure - CopyMem (New, &L2Cache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)); - ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE*) New)->NextLevelOfCache = 0; /* L2 is LLC */ - New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); - - for (CpuId = 0; CpuId < NumCores; CpuId++) { - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR *CorePtr; - UINT32 *PrivateResourcePtr; - - CopyMem (New, &Core, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR)); - CorePtr = (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR *) New; - CorePtr->Parent = CLUSTER_INDEX; - CorePtr->AcpiProcessorId = CpuId; + UINT32 SocketNum, ClusterNum, CoreNum, ThreadNum; + UINT32 SocketIndex, ClusterIndex, CoreIndex, L1DCacheIndex, L1ICacheIndex, L2CacheIndex; + + CpuId = 0; + SocketIndex = sizeof (EFI_ACPI_DESCRIPTION_HEADER); + for (SocketNum = 0; SocketNum < CpuTopo.Sockets; SocketNum++) { + // Add the Socket PPTT structure + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Socket = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT(SocketFlags, 0, 0, 0); + CopyMem (New, &Socket, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR)); New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); - PrivateResourcePtr = (UINT32 *) New; - PrivateResourcePtr[0] = L1_D_CACHE_INDEX; - PrivateResourcePtr[1] = L1_I_CACHE_INDEX; - New += (2 * sizeof (UINT32)); + ClusterIndex = SocketIndex + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + for(ClusterNum = 0; ClusterNum < CpuTopo.Clusters; ClusterNum++) { + L1DCacheIndex = ClusterIndex + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + L1ICacheIndex = L1DCacheIndex + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); + L2CacheIndex = L1ICacheIndex + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); + CoreIndex = L2CacheIndex + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); + + // Add the Cluster PPTT structure + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT(ClusterFlags, SocketIndex , 0, 0); + CopyMem (New, &Cluster, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR)); + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + + // Add L1 D Cache structure + CopyMem (New, &L1DCache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)); + ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE*) New)->NextLevelOfCache = L2CacheIndex; + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); + + // Add L1 I Cache structure + CopyMem (New, &L1ICache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)); + ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE*) New)->NextLevelOfCache = L2CacheIndex; + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); + + // Add L2 Cache structure + CopyMem (New, &L2Cache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)); + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); + + for (CoreNum = 0; CoreNum < CpuTopo.Cores; CoreNum++) { + UINT32 *PrivateResourcePtr; + + if (CpuTopo.Threads > 1) { + // Add the Core PPTT structure. The Thread structure is the leaf structure, adjust the value of CoreFlags. + CoreFlags.AcpiProcessorIdValid = EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID; + CoreFlags.NodeIsALeaf = EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF; + + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Core = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT(CoreFlags, ClusterIndex, 0, 2); + CopyMem (New, &Core, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR)); + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + + PrivateResourcePtr = (UINT32 *) New; + PrivateResourcePtr[0] = L1DCacheIndex; + PrivateResourcePtr[1] = L1ICacheIndex; + New += (2 * sizeof (UINT32)); + + // Add the Thread PPTT structure + for (ThreadNum = 0; ThreadNum < CpuTopo.Threads; ThreadNum++) { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Thread = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT(ThreadFlags, CoreIndex, CpuId, 0); + CopyMem (New, &Thread, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR)); + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + CpuId ++; + } + + CoreIndex += CpuTopo.Threads * sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + } else { + // Add the Core PPTT structure + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Core = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT(CoreFlags, ClusterIndex, CpuId, 2); + CopyMem (New, &Core, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR)); + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + + PrivateResourcePtr = (UINT32 *) New; + PrivateResourcePtr[0] = L1DCacheIndex; + PrivateResourcePtr[1] = L1ICacheIndex; + New += (2 * sizeof (UINT32)); + CpuId ++; + } + + CoreIndex += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + sizeof (UINT32) * 2; + } + + ClusterIndex = CoreIndex; + } + SocketIndex = ClusterIndex; } // Perform Checksum -- 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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