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* [edk2-devel] [PATCH] ArmVirtPkg/ArmVirtQemu: always build XIP code with strict alignment
@ 2024-04-19 17:50 Ard Biesheuvel via groups.io
  2024-04-22  9:30 ` Jonathan Cameron via groups.io
  0 siblings, 1 reply; 2+ messages in thread
From: Ard Biesheuvel via groups.io @ 2024-04-19 17:50 UTC (permalink / raw)
  To: devel
  Cc: quic_llindhol, Ard Biesheuvel, Jonathan Cameron,
	Richard Henderson, Philippe Mathieu-Daud�, Idan Horowitz,
	qemu-arm

From: Ard Biesheuvel <ardb@kernel.org>

The optimization that enabled entry with MMU and caches enabled at EL1
removed the strict alignment requirement for XIP code (roughly, any code
that might execute with the MMU and caches off, which means SEC and PEI
phase modules but also *all* BASE libraries), on the basis that QEMU can
only run guest payloads at EL2 in TCG emulation, which used to ignore
alignment violations, and execution at EL1 would always occur with the
MMU enabled.

This assumption no longer holds: not only does QEMU now enforce strict
alignment for memory accesses with device semantics, there are also
cases where this code might execute at EL2 under virtualization (i.e.,
under NV2 nested virtualization) where the strict alignment is required
too.

The latter case could be optimized too, by enabling VHE and pretending
execution is occurring at EL1, which would allow the existing logic for
entry with the MMU enabled to be reused. However, this would leave
non-VHE CPUs behind.

So in summary, strict alignment needs to be enforced for any code that
may execute with the MMU off, so drop the override that sets the XIP
flags to the empty string.

Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Richard Henderson <richard.henderson@linaro.org>
Cc: Philippe Mathieu-Daud� <philmd@linaro.org>
Cc: Idan Horowitz <idan.horowitz@gmail.com>
Cc: qemu-arm@nongnu.org
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
 ArmVirtPkg/ArmVirtQemu.dsc | 2 --
 1 file changed, 2 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index e48c75b5e99f..f6f78359552d 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -124,8 +124,6 @@ [LibraryClasses.common.UEFI_DRIVER]
 [BuildOptions]

 !if $(CAVIUM_ERRATUM_27456) == TRUE

   GCC:*_*_AARCH64_PP_FLAGS = -DCAVIUM_ERRATUM_27456

-!else

-  GCC:*_*_AARCH64_CC_XIPFLAGS ==

 !endif

 

 !include NetworkPkg/NetworkBuildOptions.dsc.inc

--
2.44.0.769.g3c40516874-goog



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^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [edk2-devel] [PATCH] ArmVirtPkg/ArmVirtQemu: always build XIP code with strict alignment
  2024-04-19 17:50 [edk2-devel] [PATCH] ArmVirtPkg/ArmVirtQemu: always build XIP code with strict alignment Ard Biesheuvel via groups.io
@ 2024-04-22  9:30 ` Jonathan Cameron via groups.io
  0 siblings, 0 replies; 2+ messages in thread
From: Jonathan Cameron via groups.io @ 2024-04-22  9:30 UTC (permalink / raw)
  To: Ard Biesheuvel
  Cc: devel, quic_llindhol, Ard Biesheuvel, Richard Henderson,
	Philippe Mathieu-Daud_, Idan Horowitz, qemu-arm, salil.mehta

On Fri, 19 Apr 2024 19:50:13 +0200
Ard Biesheuvel <ardb+git@google.com> wrote:

> From: Ard Biesheuvel <ardb@kernel.org>
> 
> The optimization that enabled entry with MMU and caches enabled at EL1
> removed the strict alignment requirement for XIP code (roughly, any code
> that might execute with the MMU and caches off, which means SEC and PEI
> phase modules but also *all* BASE libraries), on the basis that QEMU can
> only run guest payloads at EL2 in TCG emulation, which used to ignore
> alignment violations, and execution at EL1 would always occur with the
> MMU enabled.
> 
> This assumption no longer holds: not only does QEMU now enforce strict
> alignment for memory accesses with device semantics, there are also
> cases where this code might execute at EL2 under virtualization (i.e.,
> under NV2 nested virtualization) where the strict alignment is required
> too.
> 
> The latter case could be optimized too, by enabling VHE and pretending
> execution is occurring at EL1, which would allow the existing logic for
> entry with the MMU enabled to be reused. However, this would leave
> non-VHE CPUs behind.
> 
> So in summary, strict alignment needs to be enforced for any code that
> may execute with the MMU off, so drop the override that sets the XIP
> flags to the empty string.
> 
> Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Cc: Richard Henderson <richard.henderson@linaro.org>
> Cc: Philippe Mathieu-Daud� <philmd@linaro.org>
> Cc: Idan Horowitz <idan.horowitz@gmail.com>
> Cc: qemu-arm@nongnu.org
> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>

This matches what I was testing with locally. Thanks sorting this
out.

Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

> ---
>  ArmVirtPkg/ArmVirtQemu.dsc | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
> index e48c75b5e99f..f6f78359552d 100644
> --- a/ArmVirtPkg/ArmVirtQemu.dsc
> +++ b/ArmVirtPkg/ArmVirtQemu.dsc
> @@ -124,8 +124,6 @@ [LibraryClasses.common.UEFI_DRIVER]
>  [BuildOptions]
> 
>  !if $(CAVIUM_ERRATUM_27456) == TRUE
> 
>    GCC:*_*_AARCH64_PP_FLAGS = -DCAVIUM_ERRATUM_27456
> 
> -!else
> 
> -  GCC:*_*_AARCH64_CC_XIPFLAGS ==
> 
>  !endif
> 
>  
> 
>  !include NetworkPkg/NetworkBuildOptions.dsc.inc
> 
> --
> 2.44.0.769.g3c40516874-goog
> 



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^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2024-04-22  9:30 UTC | newest]

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2024-04-19 17:50 [edk2-devel] [PATCH] ArmVirtPkg/ArmVirtQemu: always build XIP code with strict alignment Ard Biesheuvel via groups.io
2024-04-22  9:30 ` Jonathan Cameron via groups.io

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