From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail05.groups.io (mail05.groups.io [45.79.224.7]) by spool.mail.gandi.net (Postfix) with ESMTPS id 60058D811DD for ; Mon, 22 Apr 2024 09:30:43 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=p/ce+erDv78N8Y1vkvJlZAAPY5scAeAEEPHwJ3AkZxY=; c=relaxed/simple; d=groups.io; h=Date:From:To:CC:Subject:Message-ID:In-Reply-To:References:Organization:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Resent-From:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Transfer-Encoding; s=20240206; t=1713778242; v=1; b=uEERuxzhWb46Xn88VkTclkMWOzhOOtDSWqwSYTY0c3zepp/eDxB7evimB0OeBIUHMybc2SzX E/TXjD/K/g3OB35O1zWItBXC1uGF8H2vjiRhZjiofpgN3TNhtYwWHmCjTwcL8sVK8JdknExol1P nKBh71FiTgC7PvxzxNgg2meQpc1WFBkbrf2mb4l2JqhHlGworMEJOSX6XEsLwNtpmx3Ib/NjNYo +dt7PjtpQyFFgQg6EfW4/JovTSvg4h/492Xdnq00XQeVGRK0HoknLpoHbDdsx3qBLHA9WvdHpN0 GfmI9p0Ql3PXZ6J+M6uXL5rYDuAVnlcvdtM9bq4S6hdXg== X-Received: by 127.0.0.2 with SMTP id xcAuYY7687511x2uvSxMpnD7; Mon, 22 Apr 2024 02:30:42 -0700 X-Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) by mx.groups.io with SMTP id smtpd.web10.14249.1713778240949269397 for ; Mon, 22 Apr 2024 02:30:41 -0700 X-Received: from mail.maildlp.com (unknown [172.18.186.216]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4VNKgF2TVFz6JBNX; Mon, 22 Apr 2024 17:28:25 +0800 (CST) X-Received: from lhrpeml500005.china.huawei.com (unknown [7.191.163.240]) by mail.maildlp.com (Postfix) with ESMTPS id B3DDC140B18; Mon, 22 Apr 2024 17:30:38 +0800 (CST) X-Received: from localhost (10.202.227.76) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.35; Mon, 22 Apr 2024 10:30:38 +0100 Date: Mon, 22 Apr 2024 10:30:37 +0100 From: "Jonathan Cameron via groups.io" To: Ard Biesheuvel CC: , , Ard Biesheuvel , Richard Henderson , Philippe Mathieu-Daud_ , Idan Horowitz , , Subject: Re: [edk2-devel] [PATCH] ArmVirtPkg/ArmVirtQemu: always build XIP code with strict alignment Message-ID: <20240422103037.00000a96@Huawei.com> In-Reply-To: <20240419175013.3983824-1-ardb+git@google.com> References: <20240419175013.3983824-1-ardb+git@google.com> Organization: Huawei Technologies Research and Development (UK) Ltd. MIME-Version: 1.0 X-Originating-IP: [10.202.227.76] X-ClientProxiedBy: lhrpeml500006.china.huawei.com (7.191.161.198) To lhrpeml500005.china.huawei.com (7.191.163.240) Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Mon, 22 Apr 2024 02:30:41 -0700 Resent-From: jonathan.cameron@huawei.com Reply-To: devel@edk2.groups.io,jonathan.cameron@huawei.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: uKnmlHxPFVQJi4XGaRfaeGeBx7686176AA= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=uEERuxzh; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=pass (policy=none) header.from=groups.io On Fri, 19 Apr 2024 19:50:13 +0200 Ard Biesheuvel wrote: > From: Ard Biesheuvel >=20 > The optimization that enabled entry with MMU and caches enabled at EL1 > removed the strict alignment requirement for XIP code (roughly, any code > that might execute with the MMU and caches off, which means SEC and PEI > phase modules but also *all* BASE libraries), on the basis that QEMU can > only run guest payloads at EL2 in TCG emulation, which used to ignore > alignment violations, and execution at EL1 would always occur with the > MMU enabled. >=20 > This assumption no longer holds: not only does QEMU now enforce strict > alignment for memory accesses with device semantics, there are also > cases where this code might execute at EL2 under virtualization (i.e., > under NV2 nested virtualization) where the strict alignment is required > too. >=20 > The latter case could be optimized too, by enabling VHE and pretending > execution is occurring at EL1, which would allow the existing logic for > entry with the MMU enabled to be reused. However, this would leave > non-VHE CPUs behind. >=20 > So in summary, strict alignment needs to be enforced for any code that > may execute with the MMU off, so drop the override that sets the XIP > flags to the empty string. >=20 > Cc: Jonathan Cameron > Cc: Richard Henderson > Cc: Philippe Mathieu-Daud=EF=BF=BD > Cc: Idan Horowitz > Cc: qemu-arm@nongnu.org > Signed-off-by: Ard Biesheuvel This matches what I was testing with locally. Thanks sorting this out. Tested-by: Jonathan Cameron Reviewed-by: Jonathan Cameron > --- > ArmVirtPkg/ArmVirtQemu.dsc | 2 -- > 1 file changed, 2 deletions(-) >=20 > diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc > index e48c75b5e99f..f6f78359552d 100644 > --- a/ArmVirtPkg/ArmVirtQemu.dsc > +++ b/ArmVirtPkg/ArmVirtQemu.dsc > @@ -124,8 +124,6 @@ [LibraryClasses.common.UEFI_DRIVER] > [BuildOptions] >=20 > !if $(CAVIUM_ERRATUM_27456) =3D=3D TRUE >=20 > GCC:*_*_AARCH64_PP_FLAGS =3D -DCAVIUM_ERRATUM_27456 >=20 > -!else >=20 > - GCC:*_*_AARCH64_CC_XIPFLAGS =3D=3D >=20 > !endif >=20 > =20 >=20 > !include NetworkPkg/NetworkBuildOptions.dsc.inc >=20 > -- > 2.44.0.769.g3c40516874-goog >=20 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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