* [edk2-devel] [PATCH v5 1/8] OvmfPkg: Add a GUID for QemuFwCfgLib
2024-04-30 7:47 [edk2-devel] [PATCH v5 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage Chao Li
@ 2024-04-30 7:47 ` Chao Li
2024-04-30 7:48 ` [edk2-devel] [PATCH v5 2/8] OvmfPkg: Separate QemuFwCfgLibMmio.c into two files Chao Li
` (7 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Chao Li @ 2024-04-30 7:47 UTC (permalink / raw)
To: devel; +Cc: Ard Biesheuvel, Jiewen Yao, Gerd Hoffmann
Added a new GUID for QemuFwCfgLib MMIO version, called
gQemuFirmwareResourceHobGuid, which is used to save QEMU firmware
configure resource during PEI stage.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
---
OvmfPkg/OvmfPkg.dec | 1 +
1 file changed, 1 insertion(+)
diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 2f7bded926..731f67b727 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -167,6 +167,7 @@ [Guids]
gUefiOvmfPkgTdxAcpiHobGuid = {0x6a0c5870, 0xd4ed, 0x44f4, {0xa1, 0x35, 0xdd, 0x23, 0x8b, 0x6f, 0x0c, 0x8d}}
gEfiNonCcFvGuid = {0xae047c6d, 0xbce9, 0x426c, {0xae, 0x03, 0xa6, 0x8e, 0x3b, 0x8a, 0x04, 0x88}}
gOvmfVariableGuid = {0x50bea1e5, 0xa2c5, 0x46e9, {0x9b, 0x3a, 0x59, 0x59, 0x65, 0x16, 0xb0, 0x0a}}
+ gQemuFirmwareResourceHobGuid = {0x3cc47b04, 0x0d3e, 0xaa64, {0x06, 0xa6, 0x4b, 0xdc, 0x9a, 0x2c, 0x61, 0x19}}
[Ppis]
# PPI whose presence in the PPI database signals that the TPM base address
--
2.27.0
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#118423): https://edk2.groups.io/g/devel/message/118423
Mute This Topic: https://groups.io/mt/105816963/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-
^ permalink raw reply related [flat|nested] 10+ messages in thread* [edk2-devel] [PATCH v5 2/8] OvmfPkg: Separate QemuFwCfgLibMmio.c into two files
2024-04-30 7:47 [edk2-devel] [PATCH v5 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage Chao Li
2024-04-30 7:47 ` [edk2-devel] [PATCH v5 1/8] OvmfPkg: Add a GUID for QemuFwCfgLib Chao Li
@ 2024-04-30 7:48 ` Chao Li
2024-04-30 7:48 ` [edk2-devel] [PATCH v5 3/8] OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio Chao Li
` (6 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Chao Li @ 2024-04-30 7:48 UTC (permalink / raw)
To: devel
Cc: Ard Biesheuvel, Jiewen Yao, Gerd Hoffmann, Leif Lindholm,
Sami Mujawar, Sunil V L, Andrei Warkentin
Separate QemuFwCfgLibMmio.c into two files named QemuFwCfgLibMmio.c and
QemuFwCfgLibMmioDxe.c, added a new header named
QemuFwCfgLibMmioInternal.h for MMIO version.
Some DXE stage variables became non-static in this patch, they will be
restored to static in the next patch.
Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
---
.../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c | 192 +-----------------
.../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf | 3 +-
.../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h | 173 ++++++++++++++++
.../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c | 145 +++++++++++++
4 files changed, 327 insertions(+), 186 deletions(-)
create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index 115a210759..2a2f3e67ac 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -1,7 +1,5 @@
/** @file
- Stateful and implicitly initialized fw_cfg library implementation.
-
Copyright (C) 2013 - 2014, Red Hat, Inc.
Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2021 Hewlett Packard Enterprise Development LP<BR>
@@ -20,63 +18,14 @@
#include <Protocol/FdtClient.h>
-STATIC UINTN mFwCfgSelectorAddress;
-STATIC UINTN mFwCfgDataAddress;
-STATIC UINTN mFwCfgDmaAddress;
-
-/**
- Reads firmware configuration bytes into a buffer
-
- @param[in] Size Size in bytes to read
- @param[in] Buffer Buffer to store data into (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI READ_BYTES_FUNCTION)(
- IN UINTN Size,
- IN VOID *Buffer OPTIONAL
- );
-
-/**
- Writes bytes from a buffer to firmware configuration
-
- @param[in] Size Size in bytes to write
- @param[in] Buffer Buffer to transfer data from (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI WRITE_BYTES_FUNCTION)(
- IN UINTN Size,
- IN VOID *Buffer OPTIONAL
- );
-
-/**
- Skips bytes in firmware configuration
-
- @param[in] Size Size in bytes to skip
-
-**/
-typedef
-VOID(EFIAPI SKIP_BYTES_FUNCTION)(
- IN UINTN Size
- );
-
-//
-// Forward declaration of the two implementations we have.
-//
-STATIC READ_BYTES_FUNCTION MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION MmioSkipBytes;
-STATIC READ_BYTES_FUNCTION DmaReadBytes;
-STATIC WRITE_BYTES_FUNCTION DmaWriteBytes;
-STATIC SKIP_BYTES_FUNCTION DmaSkipBytes;
+#include "QemuFwCfgLibMmioInternal.h"
//
// These correspond to the implementation we detect at runtime.
//
-STATIC READ_BYTES_FUNCTION *InternalQemuFwCfgReadBytes = MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION *InternalQemuFwCfgSkipBytes = MmioSkipBytes;
+READ_BYTES_FUNCTION *InternalQemuFwCfgReadBytes = MmioReadBytes;
+WRITE_BYTES_FUNCTION *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
+SKIP_BYTES_FUNCTION *InternalQemuFwCfgSkipBytes = MmioSkipBytes;
/**
Returns a boolean indicating if the firmware configuration interface
@@ -97,126 +46,6 @@ QemuFwCfgIsAvailable (
return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
}
-RETURN_STATUS
-EFIAPI
-QemuFwCfgInitialize (
- VOID
- )
-{
- EFI_STATUS Status;
- FDT_CLIENT_PROTOCOL *FdtClient;
- CONST UINT64 *Reg;
- UINT32 RegSize;
- UINTN AddressCells, SizeCells;
- UINT64 FwCfgSelectorAddress;
- UINT64 FwCfgSelectorSize;
- UINT64 FwCfgDataAddress;
- UINT64 FwCfgDataSize;
- UINT64 FwCfgDmaAddress;
- UINT64 FwCfgDmaSize;
-
- Status = gBS->LocateProtocol (
- &gFdtClientProtocolGuid,
- NULL,
- (VOID **)&FdtClient
- );
- ASSERT_EFI_ERROR (Status);
-
- Status = FdtClient->FindCompatibleNodeReg (
- FdtClient,
- "qemu,fw-cfg-mmio",
- (CONST VOID **)&Reg,
- &AddressCells,
- &SizeCells,
- &RegSize
- );
- if (EFI_ERROR (Status)) {
- DEBUG ((
- DEBUG_WARN,
- "%a: No 'qemu,fw-cfg-mmio' compatible DT node found (Status == %r)\n",
- __func__,
- Status
- ));
- return EFI_SUCCESS;
- }
-
- ASSERT (AddressCells == 2);
- ASSERT (SizeCells == 2);
- ASSERT (RegSize == 2 * sizeof (UINT64));
-
- FwCfgDataAddress = SwapBytes64 (Reg[0]);
- FwCfgDataSize = 8;
- FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
- FwCfgSelectorSize = 2;
-
- //
- // The following ASSERT()s express
- //
- // Address + Size - 1 <= MAX_UINTN
- //
- // for both registers, that is, that the last byte in each MMIO range is
- // expressible as a MAX_UINTN. The form below is mathematically
- // equivalent, and it also prevents any unsigned overflow before the
- // comparison.
- //
- ASSERT (FwCfgSelectorAddress <= MAX_UINTN - FwCfgSelectorSize + 1);
- ASSERT (FwCfgDataAddress <= MAX_UINTN - FwCfgDataSize + 1);
-
- mFwCfgSelectorAddress = FwCfgSelectorAddress;
- mFwCfgDataAddress = FwCfgDataAddress;
-
- DEBUG ((
- DEBUG_INFO,
- "Found FwCfg @ 0x%Lx/0x%Lx\n",
- FwCfgSelectorAddress,
- FwCfgDataAddress
- ));
-
- if (SwapBytes64 (Reg[1]) >= 0x18) {
- FwCfgDmaAddress = FwCfgDataAddress + 0x10;
- FwCfgDmaSize = 0x08;
-
- //
- // See explanation above.
- //
- ASSERT (FwCfgDmaAddress <= MAX_UINTN - FwCfgDmaSize + 1);
-
- DEBUG ((DEBUG_INFO, "Found FwCfg DMA @ 0x%Lx\n", FwCfgDmaAddress));
- } else {
- FwCfgDmaAddress = 0;
- }
-
- if (QemuFwCfgIsAvailable ()) {
- UINT32 Signature;
-
- QemuFwCfgSelectItem (QemuFwCfgItemSignature);
- Signature = QemuFwCfgRead32 ();
- if (Signature == SIGNATURE_32 ('Q', 'E', 'M', 'U')) {
- //
- // For DMA support, we require the DTB to advertise the register, and the
- // feature bitmap (which we read without DMA) to confirm the feature.
- //
- if (FwCfgDmaAddress != 0) {
- UINT32 Features;
-
- QemuFwCfgSelectItem (QemuFwCfgItemInterfaceVersion);
- Features = QemuFwCfgRead32 ();
- if ((Features & FW_CFG_F_DMA) != 0) {
- mFwCfgDmaAddress = FwCfgDmaAddress;
- InternalQemuFwCfgReadBytes = DmaReadBytes;
- InternalQemuFwCfgWriteBytes = DmaWriteBytes;
- InternalQemuFwCfgSkipBytes = DmaSkipBytes;
- }
- }
- } else {
- mFwCfgSelectorAddress = 0;
- mFwCfgDataAddress = 0;
- }
- }
-
- return RETURN_SUCCESS;
-}
-
/**
Selects a firmware configuration item for reading.
@@ -240,7 +69,6 @@ QemuFwCfgSelectItem (
/**
Slow READ_BYTES_FUNCTION.
**/
-STATIC
VOID
EFIAPI
MmioReadBytes (
@@ -252,7 +80,7 @@ MmioReadBytes (
UINT8 *Ptr;
UINT8 *End;
- #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64)
+ #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined (MDE_CPU_LOONGARCH64)
Left = Size & 7;
#else
Left = Size & 3;
@@ -262,7 +90,7 @@ MmioReadBytes (
Ptr = Buffer;
End = Ptr + Size;
- #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64)
+ #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined (MDE_CPU_LOONGARCH64)
while (Ptr < End) {
*(UINT64 *)Ptr = MmioRead64 (mFwCfgDataAddress);
Ptr += 8;
@@ -306,7 +134,6 @@ MmioReadBytes (
FW_CFG_DMA_CTL_READ - read from fw_cfg into Buffer.
FW_CFG_DMA_CTL_SKIP - skip bytes in fw_cfg.
**/
-STATIC
VOID
DmaTransferBytes (
IN UINTN Size,
@@ -340,7 +167,7 @@ DmaTransferBytes (
//
// This will fire off the transfer.
//
- #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64)
+ #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined (MDE_CPU_LOONGARCH64)
MmioWrite64 (mFwCfgDmaAddress, SwapBytes64 ((UINT64)&Access));
#else
MmioWrite32 ((UINT32)(mFwCfgDmaAddress + 4), SwapBytes32 ((UINT32)&Access));
@@ -365,7 +192,6 @@ DmaTransferBytes (
/**
Fast READ_BYTES_FUNCTION.
**/
-STATIC
VOID
EFIAPI
DmaReadBytes (
@@ -403,7 +229,6 @@ QemuFwCfgReadBytes (
/**
Slow WRITE_BYTES_FUNCTION.
**/
-STATIC
VOID
EFIAPI
MmioWriteBytes (
@@ -421,7 +246,6 @@ MmioWriteBytes (
/**
Fast WRITE_BYTES_FUNCTION.
**/
-STATIC
VOID
EFIAPI
DmaWriteBytes (
@@ -457,7 +281,6 @@ QemuFwCfgWriteBytes (
/**
Slow SKIP_BYTES_FUNCTION.
**/
-STATIC
VOID
EFIAPI
MmioSkipBytes (
@@ -484,7 +307,6 @@ MmioSkipBytes (
/**
Fast SKIP_BYTES_FUNCTION.
**/
-STATIC
VOID
EFIAPI
DmaSkipBytes (
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
index 4b0dfbcb0d..b3017aef80 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
@@ -23,11 +23,12 @@ [Defines]
# The following information is for reference only and not required by the build
# tools.
#
-# VALID_ARCHITECTURES = ARM AARCH64 RISCV64
+# VALID_ARCHITECTURES = ARM AARCH64 RISCV64 LOONGARCH64
#
[Sources]
QemuFwCfgLibMmio.c
+ QemuFwCfgMmioDxe.c
[Packages]
MdePkg/MdePkg.dec
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
new file mode 100644
index 0000000000..8c63cf12ef
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
@@ -0,0 +1,173 @@
+/** @file
+ Internal interfaces specific to the QemuFwCfgLibMmio instances in OvmfPkg.
+
+ Copyright (C) 2016, Red Hat, Inc.
+ Copyright (C) 2017, Advanced Micro Devices. All rights reserved
+ Copyright (c) 2024 Loongson Technology Corporation Limited. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef QEMU_FW_CFG_LIB_MMIO_INTERNAL_H_
+#define QEMU_FW_CFG_LIB_MMIO_INTERNAL_H_
+
+extern UINTN mFwCfgSelectorAddress;
+extern UINTN mFwCfgDataAddress;
+extern UINTN mFwCfgDmaAddress;
+
+/**
+ Reads firmware configuration bytes into a buffer
+
+ @param[in] Size Size in bytes to read
+ @param[in] Buffer Buffer to store data into (OPTIONAL if Size is 0)
+
+**/
+typedef
+VOID(EFIAPI READ_BYTES_FUNCTION)(
+ IN UINTN Size,
+ IN VOID *Buffer OPTIONAL
+ );
+
+/**
+ Writes bytes from a buffer to firmware configuration
+
+ @param[in] Size Size in bytes to write
+ @param[in] Buffer Buffer to transfer data from (OPTIONAL if Size is 0)
+
+**/
+typedef
+VOID(EFIAPI WRITE_BYTES_FUNCTION)(
+ IN UINTN Size,
+ IN VOID *Buffer OPTIONAL
+ );
+
+/**
+ Skips bytes in firmware configuration
+
+ @param[in] Size Size in bytes to skip
+
+**/
+typedef
+VOID(EFIAPI SKIP_BYTES_FUNCTION)(
+ IN UINTN Size
+ );
+
+/**
+ Reads firmware configuration bytes into a buffer
+
+ @param[in] Size Size in bytes to read
+ @param[in] Buffer Buffer to store data into (OPTIONAL if Size is 0)
+
+**/
+extern
+VOID (EFIAPI *InternalQemuFwCfgReadBytes)(
+ IN UINTN Size,
+ IN VOID *Buffer OPTIONAL
+ );
+
+/**
+ Writes bytes from a buffer to firmware configuration
+
+ @param[in] Size Size in bytes to write
+ @param[in] Buffer Buffer to transfer data from (OPTIONAL if Size is 0)
+
+**/
+extern
+VOID (EFIAPI *InternalQemuFwCfgWriteBytes)(
+ IN UINTN Size,
+ IN VOID *Buffer OPTIONAL
+ );
+
+/**
+ Skips bytes in firmware configuration
+
+ @param[in] Size Size in bytes to skip
+
+**/
+extern
+VOID (EFIAPI *InternalQemuFwCfgSkipBytes)(
+ IN UINTN Size
+ );
+
+/**
+ Slow READ_BYTES_FUNCTION.
+**/
+VOID
+EFIAPI
+MmioReadBytes (
+ IN UINTN Size,
+ IN VOID *Buffer OPTIONAL
+ );
+
+/**
+ Slow WRITE_BYTES_FUNCTION.
+**/
+VOID
+EFIAPI
+MmioWriteBytes (
+ IN UINTN Size,
+ IN VOID *Buffer OPTIONAL
+ );
+
+/**
+ Slow SKIP_BYTES_FUNCTION.
+**/
+VOID
+EFIAPI
+MmioSkipBytes (
+ IN UINTN Size
+ );
+
+/**
+ Fast READ_BYTES_FUNCTION.
+**/
+VOID
+EFIAPI
+DmaReadBytes (
+ IN UINTN Size,
+ IN VOID *Buffer OPTIONAL
+ );
+
+/**
+ Fast WRITE_BYTES_FUNCTION.
+**/
+VOID
+EFIAPI
+DmaWriteBytes (
+ IN UINTN Size,
+ IN VOID *Buffer OPTIONAL
+ );
+
+/**
+ Fast SKIP_BYTES_FUNCTION.
+**/
+VOID
+EFIAPI
+DmaSkipBytes (
+ IN UINTN Size
+ );
+
+/**
+ Transfer an array of bytes, or skip a number of bytes, using the DMA
+ interface.
+
+ @param[in] Size Size in bytes to transfer or skip.
+
+ @param[in,out] Buffer Buffer to read data into or write data from. Ignored,
+ and may be NULL, if Size is zero, or Control is
+ FW_CFG_DMA_CTL_SKIP.
+
+ @param[in] Control One of the following:
+ FW_CFG_DMA_CTL_WRITE - write to fw_cfg from Buffer.
+ FW_CFG_DMA_CTL_READ - read from fw_cfg into Buffer.
+ FW_CFG_DMA_CTL_SKIP - skip bytes in fw_cfg.
+**/
+VOID
+DmaTransferBytes (
+ IN UINTN Size,
+ IN OUT VOID *Buffer OPTIONAL,
+ IN UINT32 Control
+ );
+
+#endif
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c
new file mode 100644
index 0000000000..0536253845
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c
@@ -0,0 +1,145 @@
+/** @file
+
+ Stateful and implicitly initialized fw_cfg library implementation.
+
+ Copyright (C) 2013 - 2014, Red Hat, Inc.
+ Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
+ (C) Copyright 2021 Hewlett Packard Enterprise Development LP<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include <Uefi.h>
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/QemuFwCfgLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+#include <Protocol/FdtClient.h>
+
+#include "QemuFwCfgLibMmioInternal.h"
+
+UINTN mFwCfgSelectorAddress;
+UINTN mFwCfgDataAddress;
+UINTN mFwCfgDmaAddress;
+
+RETURN_STATUS
+EFIAPI
+QemuFwCfgInitialize (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ FDT_CLIENT_PROTOCOL *FdtClient;
+ CONST UINT64 *Reg;
+ UINT32 RegSize;
+ UINTN AddressCells, SizeCells;
+ UINT64 FwCfgSelectorAddress;
+ UINT64 FwCfgSelectorSize;
+ UINT64 FwCfgDataAddress;
+ UINT64 FwCfgDataSize;
+ UINT64 FwCfgDmaAddress;
+ UINT64 FwCfgDmaSize;
+
+ Status = gBS->LocateProtocol (
+ &gFdtClientProtocolGuid,
+ NULL,
+ (VOID **)&FdtClient
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ Status = FdtClient->FindCompatibleNodeReg (
+ FdtClient,
+ "qemu,fw-cfg-mmio",
+ (CONST VOID **)&Reg,
+ &AddressCells,
+ &SizeCells,
+ &RegSize
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_WARN,
+ "%a: No 'qemu,fw-cfg-mmio' compatible DT node found (Status == %r)\n",
+ __func__,
+ Status
+ ));
+ return EFI_SUCCESS;
+ }
+
+ ASSERT (AddressCells == 2);
+ ASSERT (SizeCells == 2);
+ ASSERT (RegSize == 2 * sizeof (UINT64));
+
+ FwCfgDataAddress = SwapBytes64 (Reg[0]);
+ FwCfgDataSize = 8;
+ FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
+ FwCfgSelectorSize = 2;
+
+ //
+ // The following ASSERT()s express
+ //
+ // Address + Size - 1 <= MAX_UINTN
+ //
+ // for both registers, that is, that the last byte in each MMIO range is
+ // expressible as a MAX_UINTN. The form below is mathematically
+ // equivalent, and it also prevents any unsigned overflow before the
+ // comparison.
+ //
+ ASSERT (FwCfgSelectorAddress <= MAX_UINTN - FwCfgSelectorSize + 1);
+ ASSERT (FwCfgDataAddress <= MAX_UINTN - FwCfgDataSize + 1);
+
+ mFwCfgSelectorAddress = FwCfgSelectorAddress;
+ mFwCfgDataAddress = FwCfgDataAddress;
+
+ DEBUG ((
+ DEBUG_INFO,
+ "Found FwCfg @ 0x%Lx/0x%Lx\n",
+ FwCfgSelectorAddress,
+ FwCfgDataAddress
+ ));
+
+ if (SwapBytes64 (Reg[1]) >= 0x18) {
+ FwCfgDmaAddress = FwCfgDataAddress + 0x10;
+ FwCfgDmaSize = 0x08;
+
+ //
+ // See explanation above.
+ //
+ ASSERT (FwCfgDmaAddress <= MAX_UINTN - FwCfgDmaSize + 1);
+
+ DEBUG ((DEBUG_INFO, "Found FwCfg DMA @ 0x%Lx\n", FwCfgDmaAddress));
+ } else {
+ FwCfgDmaAddress = 0;
+ }
+
+ if (QemuFwCfgIsAvailable ()) {
+ UINT32 Signature;
+
+ QemuFwCfgSelectItem (QemuFwCfgItemSignature);
+ Signature = QemuFwCfgRead32 ();
+ if (Signature == SIGNATURE_32 ('Q', 'E', 'M', 'U')) {
+ //
+ // For DMA support, we require the DTB to advertise the register, and the
+ // feature bitmap (which we read without DMA) to confirm the feature.
+ //
+ if (FwCfgDmaAddress != 0) {
+ UINT32 Features;
+
+ QemuFwCfgSelectItem (QemuFwCfgItemInterfaceVersion);
+ Features = QemuFwCfgRead32 ();
+ if ((Features & FW_CFG_F_DMA) != 0) {
+ mFwCfgDmaAddress = FwCfgDmaAddress;
+ InternalQemuFwCfgReadBytes = DmaReadBytes;
+ InternalQemuFwCfgWriteBytes = DmaWriteBytes;
+ InternalQemuFwCfgSkipBytes = DmaSkipBytes;
+ }
+ }
+ } else {
+ mFwCfgSelectorAddress = 0;
+ mFwCfgDataAddress = 0;
+ }
+ }
+
+ return RETURN_SUCCESS;
+}
--
2.27.0
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#118424): https://edk2.groups.io/g/devel/message/118424
Mute This Topic: https://groups.io/mt/105816967/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-
^ permalink raw reply related [flat|nested] 10+ messages in thread* [edk2-devel] [PATCH v5 3/8] OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio
2024-04-30 7:47 [edk2-devel] [PATCH v5 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage Chao Li
2024-04-30 7:47 ` [edk2-devel] [PATCH v5 1/8] OvmfPkg: Add a GUID for QemuFwCfgLib Chao Li
2024-04-30 7:48 ` [edk2-devel] [PATCH v5 2/8] OvmfPkg: Separate QemuFwCfgLibMmio.c into two files Chao Li
@ 2024-04-30 7:48 ` Chao Li
2024-04-30 7:48 ` [edk2-devel] [PATCH v5 4/8] OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version Chao Li
` (5 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Chao Li @ 2024-04-30 7:48 UTC (permalink / raw)
To: devel
Cc: Ard Biesheuvel, Jiewen Yao, Gerd Hoffmann, Leif Lindholm,
Sami Mujawar, Sunil V L, Andrei Warkentin
Added the HOB methods to load and store the QEMU firmware configure
address, data address and DMA address, which are not enabled during the
DXE stage.
Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
---
.../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c | 70 +++++++++++--
.../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf | 5 +
.../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h | 71 +++++++++++++-
.../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c | 97 ++++++++++++++++---
4 files changed, 216 insertions(+), 27 deletions(-)
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index 2a2f3e67ac..6da689b1df 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -3,15 +3,21 @@
Copyright (C) 2013 - 2014, Red Hat, Inc.
Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2021 Hewlett Packard Enterprise Development LP<BR>
+ Copyright (c) 2024 Loongson Technology Corporation Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
+#include <Base.h>
#include <Uefi.h>
+#include <Pi/PiBootMode.h>
+#include <Pi/PiHob.h>
+
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
#include <Library/IoLib.h>
#include <Library/QemuFwCfgLib.h>
#include <Library/UefiBootServicesTableLib.h>
@@ -27,6 +33,50 @@ READ_BYTES_FUNCTION *InternalQemuFwCfgReadBytes = MmioReadBytes;
WRITE_BYTES_FUNCTION *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
SKIP_BYTES_FUNCTION *InternalQemuFwCfgSkipBytes = MmioSkipBytes;
+/**
+ Build firmware configure resource HOB.
+
+ @param[in] FwCfgResource A pointer to firmware configure resource.
+
+ @retval VOID
+**/
+VOID
+QemuBuildFwCfgResourceHob (
+ IN QEMU_FW_CFG_RESOURCE *FwCfgResource
+ )
+{
+ BuildGuidDataHob (
+ &gQemuFirmwareResourceHobGuid,
+ (VOID *)FwCfgResource,
+ sizeof (QEMU_FW_CFG_RESOURCE)
+ );
+}
+
+/**
+ Get firmware configure resource in HOB.
+
+ @param VOID
+
+ @retval non-NULL The firmware configure resource in HOB.
+ NULL The firmware configure resource not found.
+**/
+QEMU_FW_CFG_RESOURCE *
+QemuGetFwCfgResourceHob (
+ VOID
+ )
+{
+ EFI_HOB_GUID_TYPE *GuidHob;
+
+ GuidHob = NULL;
+
+ GuidHob = GetFirstGuidHob (&gQemuFirmwareResourceHobGuid);
+ if (GuidHob == NULL) {
+ return NULL;
+ }
+
+ return (QEMU_FW_CFG_RESOURCE *)GET_GUID_HOB_DATA (GuidHob);
+}
+
/**
Returns a boolean indicating if the firmware configuration interface
is available or not.
@@ -43,7 +93,7 @@ QemuFwCfgIsAvailable (
VOID
)
{
- return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
+ return (BOOLEAN)(QemuGetFwCfgSelectorAddress () != 0 && QemuGetFwCfgDataAddress () != 0);
}
/**
@@ -62,7 +112,7 @@ QemuFwCfgSelectItem (
)
{
if (QemuFwCfgIsAvailable ()) {
- MmioWrite16 (mFwCfgSelectorAddress, SwapBytes16 ((UINT16)QemuFwCfgItem));
+ MmioWrite16 (QemuGetFwCfgSelectorAddress (), SwapBytes16 ((UINT16)QemuFwCfgItem));
}
}
@@ -92,30 +142,30 @@ MmioReadBytes (
#if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined (MDE_CPU_LOONGARCH64)
while (Ptr < End) {
- *(UINT64 *)Ptr = MmioRead64 (mFwCfgDataAddress);
+ *(UINT64 *)Ptr = MmioRead64 (QemuGetFwCfgDataAddress ());
Ptr += 8;
}
if (Left & 4) {
- *(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
+ *(UINT32 *)Ptr = MmioRead32 (QemuGetFwCfgDataAddress ());
Ptr += 4;
}
#else
while (Ptr < End) {
- *(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
+ *(UINT32 *)Ptr = MmioRead32 (QemuGetFwCfgDataAddress ());
Ptr += 4;
}
#endif
if (Left & 2) {
- *(UINT16 *)Ptr = MmioRead16 (mFwCfgDataAddress);
+ *(UINT16 *)Ptr = MmioRead16 (QemuGetFwCfgDataAddress ());
Ptr += 2;
}
if (Left & 1) {
- *Ptr = MmioRead8 (mFwCfgDataAddress);
+ *Ptr = MmioRead8 (QemuGetFwCfgDataAddress ());
}
}
@@ -168,9 +218,9 @@ DmaTransferBytes (
// This will fire off the transfer.
//
#if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined (MDE_CPU_LOONGARCH64)
- MmioWrite64 (mFwCfgDmaAddress, SwapBytes64 ((UINT64)&Access));
+ MmioWrite64 (QemuGetFwCfgDmaAddress (), SwapBytes64 ((UINT64)&Access));
#else
- MmioWrite32 ((UINT32)(mFwCfgDmaAddress + 4), SwapBytes32 ((UINT32)&Access));
+ MmioWrite32 ((UINT32)(QemuGetFwCfgDmaAddress () + 4), SwapBytes32 ((UINT32)&Access));
#endif
//
@@ -239,7 +289,7 @@ MmioWriteBytes (
UINTN Idx;
for (Idx = 0; Idx < Size; ++Idx) {
- MmioWrite8 (mFwCfgDataAddress, ((UINT8 *)Buffer)[Idx]);
+ MmioWrite8 (QemuGetFwCfgDataAddress (), ((UINT8 *)Buffer)[Idx]);
}
}
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
index b3017aef80..633053aaed 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
@@ -4,6 +4,7 @@
#
# Copyright (C) 2013 - 2014, Red Hat, Inc.
# Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2024 Loongson Technology Corporation Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -39,11 +40,15 @@ [LibraryClasses]
BaseLib
BaseMemoryLib
DebugLib
+ HobLib
IoLib
UefiBootServicesTableLib
[Protocols]
gFdtClientProtocolGuid ## CONSUMES
+[Guids]
+ gQemuFirmwareResourceHobGuid
+
[Depex]
gFdtClientProtocolGuid
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
index 8c63cf12ef..961612f067 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
@@ -12,9 +12,11 @@
#ifndef QEMU_FW_CFG_LIB_MMIO_INTERNAL_H_
#define QEMU_FW_CFG_LIB_MMIO_INTERNAL_H_
-extern UINTN mFwCfgSelectorAddress;
-extern UINTN mFwCfgDataAddress;
-extern UINTN mFwCfgDmaAddress;
+typedef struct {
+ UINTN FwCfgSelectorAddress;
+ UINTN FwCfgDataAddress;
+ UINTN FwCfgDmaAddress;
+} QEMU_FW_CFG_RESOURCE;
/**
Reads firmware configuration bytes into a buffer
@@ -90,6 +92,69 @@ VOID (EFIAPI *InternalQemuFwCfgSkipBytes)(
IN UINTN Size
);
+/**
+ Build firmware configure resource HOB.
+
+ @param[in] FwCfgResource A pointer to firmware configure resource.
+
+ @retval NULL
+**/
+VOID
+QemuBuildFwCfgResourceHob (
+ IN QEMU_FW_CFG_RESOURCE *FwCfgResource
+ );
+
+/**
+ Get firmware configure resource HOB.
+
+ @param VOID
+
+ @retval FwCfgResource The firmware configure resouce in HOB.
+**/
+QEMU_FW_CFG_RESOURCE *
+QemuGetFwCfgResourceHob (
+ VOID
+ );
+
+/**
+ To get firmware configure selector address.
+
+ @param VOID
+
+ @retval firmware configure selector address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgSelectorAddress (
+ VOID
+ );
+
+/**
+ To get firmware configure Data address.
+
+ @param VOID
+
+ @retval firmware configure data address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDataAddress (
+ VOID
+ );
+
+/**
+ To get firmware DMA address.
+
+ @param VOID
+
+ @retval firmware DMA address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDmaAddress (
+ VOID
+ );
+
/**
Slow READ_BYTES_FUNCTION.
**/
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c
index 0536253845..c9744ae5d7 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c
@@ -5,6 +5,7 @@
Copyright (C) 2013 - 2014, Red Hat, Inc.
Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2021 Hewlett Packard Enterprise Development LP<BR>
+ Copyright (c) 2024 Loongson Technology Corporation Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -20,9 +21,57 @@
#include "QemuFwCfgLibMmioInternal.h"
-UINTN mFwCfgSelectorAddress;
-UINTN mFwCfgDataAddress;
-UINTN mFwCfgDmaAddress;
+STATIC UINTN mFwCfgSelectorAddress;
+STATIC UINTN mFwCfgDataAddress;
+STATIC UINTN mFwCfgDmaAddress;
+
+/**
+ To get firmware configure selector address.
+
+ @param VOID
+
+ @retval firmware configure selector address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgSelectorAddress (
+ VOID
+ )
+{
+ return mFwCfgSelectorAddress;
+}
+
+/**
+ To get firmware configure Data address.
+
+ @param VOID
+
+ @retval firmware configure data address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDataAddress (
+ VOID
+ )
+{
+ return mFwCfgDataAddress;
+}
+
+/**
+ To get firmware DMA address.
+
+ @param VOID
+
+ @retval firmware DMA address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDmaAddress (
+ VOID
+ )
+{
+ return mFwCfgDmaAddress;
+}
RETURN_STATUS
EFIAPI
@@ -30,17 +79,37 @@ QemuFwCfgInitialize (
VOID
)
{
- EFI_STATUS Status;
- FDT_CLIENT_PROTOCOL *FdtClient;
- CONST UINT64 *Reg;
- UINT32 RegSize;
- UINTN AddressCells, SizeCells;
- UINT64 FwCfgSelectorAddress;
- UINT64 FwCfgSelectorSize;
- UINT64 FwCfgDataAddress;
- UINT64 FwCfgDataSize;
- UINT64 FwCfgDmaAddress;
- UINT64 FwCfgDmaSize;
+ EFI_STATUS Status;
+ FDT_CLIENT_PROTOCOL *FdtClient;
+ CONST UINT64 *Reg;
+ UINT32 RegSize;
+ UINTN AddressCells, SizeCells;
+ UINT64 FwCfgSelectorAddress;
+ UINT64 FwCfgSelectorSize;
+ UINT64 FwCfgDataAddress;
+ UINT64 FwCfgDataSize;
+ UINT64 FwCfgDmaAddress;
+ UINT64 FwCfgDmaSize;
+ QEMU_FW_CFG_RESOURCE *FwCfgResource;
+
+ //
+ // Check whether the Qemu firmware configure resources HOB has been created,
+ // if so use the resources in the HOB.
+ //
+ FwCfgResource = QemuGetFwCfgResourceHob ();
+ if (FwCfgResource != NULL) {
+ mFwCfgSelectorAddress = FwCfgResource->FwCfgSelectorAddress;
+ mFwCfgDataAddress = FwCfgResource->FwCfgDataAddress;
+ mFwCfgDmaAddress = FwCfgResource->FwCfgDmaAddress;
+
+ if (mFwCfgDmaAddress != 0) {
+ InternalQemuFwCfgReadBytes = DmaReadBytes;
+ InternalQemuFwCfgWriteBytes = DmaWriteBytes;
+ InternalQemuFwCfgSkipBytes = DmaSkipBytes;
+ }
+
+ return RETURN_SUCCESS;
+ }
Status = gBS->LocateProtocol (
&gFdtClientProtocolGuid,
--
2.27.0
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#118425): https://edk2.groups.io/g/devel/message/118425
Mute This Topic: https://groups.io/mt/105816969/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-
^ permalink raw reply related [flat|nested] 10+ messages in thread* [edk2-devel] [PATCH v5 4/8] OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version
2024-04-30 7:47 [edk2-devel] [PATCH v5 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage Chao Li
` (2 preceding siblings ...)
2024-04-30 7:48 ` [edk2-devel] [PATCH v5 3/8] OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio Chao Li
@ 2024-04-30 7:48 ` Chao Li
2024-04-30 7:48 ` [edk2-devel] [PATCH v5 5/8] OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf Chao Li
` (4 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Chao Li @ 2024-04-30 7:48 UTC (permalink / raw)
To: devel; +Cc: Ard Biesheuvel, Jiewen Yao, Gerd Hoffmann, Xianglai Li
Added the PEI stage library for QemuFwCfgMmioLib, which uses the FDT to
find the fw_cfg and parse it.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Co-authored-by: Xianglai Li <lixianglai@loongson.cn>
Signed-off-by: Chao Li <lichao@loongson.cn>
---
.../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c | 236 ++++++++++++++++++
.../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf | 45 ++++
2 files changed, 281 insertions(+)
create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
new file mode 100644
index 0000000000..6f35fb4304
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
@@ -0,0 +1,236 @@
+/** @file
+
+ Stateful and implicitly initialized fw_cfg library implementation.
+
+ Copyright (C) 2013 - 2014, Red Hat, Inc.
+ Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
+ (C) Copyright 2021 Hewlett Packard Enterprise Development LP<BR>
+ Copyright (c) 2024 Loongson Technology Corporation Limited. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include <Uefi.h>
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/QemuFwCfgLib.h>
+
+#include <libfdt.h>
+
+#include "QemuFwCfgLibMmioInternal.h"
+
+/**
+ To get firmware configure selector address.
+
+ @param VOID
+
+ @retval firmware configure selector address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgSelectorAddress (
+ VOID
+ )
+{
+ QEMU_FW_CFG_RESOURCE *FwCfgResource;
+
+ FwCfgResource = QemuGetFwCfgResourceHob ();
+ ASSERT (FwCfgResource != NULL);
+
+ return FwCfgResource->FwCfgSelectorAddress;
+}
+
+/**
+ To get firmware configure Data address.
+
+ @param VOID
+
+ @retval firmware configure data address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDataAddress (
+ VOID
+ )
+{
+ QEMU_FW_CFG_RESOURCE *FwCfgResource;
+
+ FwCfgResource = QemuGetFwCfgResourceHob ();
+ ASSERT (FwCfgResource != NULL);
+
+ return FwCfgResource->FwCfgDataAddress;
+}
+
+/**
+ To get firmware DMA address.
+
+ @param VOID
+
+ @retval firmware DMA address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDmaAddress (
+ VOID
+ )
+{
+ QEMU_FW_CFG_RESOURCE *FwCfgResource;
+
+ FwCfgResource = QemuGetFwCfgResourceHob ();
+ ASSERT (FwCfgResource != NULL);
+
+ return FwCfgResource->FwCfgDmaAddress;
+}
+
+RETURN_STATUS
+EFIAPI
+QemuFwCfgInitialize (
+ VOID
+ )
+{
+ VOID *DeviceTreeBase;
+ INT32 Node;
+ INT32 Prev;
+ UINT32 Signature;
+ CONST CHAR8 *Type;
+ INT32 Len;
+ CONST UINT64 *Reg;
+ UINT64 FwCfgSelectorAddress;
+ UINT64 FwCfgSelectorSize;
+ UINT64 FwCfgDataAddress;
+ UINT64 FwCfgDataSize;
+ UINT64 FwCfgDmaAddress;
+ UINT64 FwCfgDmaSize;
+ QEMU_FW_CFG_RESOURCE *FwCfgResource;
+
+ //
+ // Check whether the Qemu firmware configure resources HOB has been created,
+ // if so use the resources in the HOB.
+ //
+ FwCfgResource = QemuGetFwCfgResourceHob ();
+ if (FwCfgResource != NULL) {
+ return RETURN_SUCCESS;
+ }
+
+ DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
+ ASSERT (DeviceTreeBase != NULL);
+ //
+ // Make sure we have a valid device tree blob
+ //
+ ASSERT (fdt_check_header (DeviceTreeBase) == 0);
+
+ //
+ // Create resouce memory
+ //
+ FwCfgResource = AllocateZeroPool (sizeof (QEMU_FW_CFG_RESOURCE));
+ ASSERT (FwCfgResource != NULL);
+
+ for (Prev = 0; ; Prev = Node) {
+ Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
+ if (Node < 0) {
+ break;
+ }
+
+ //
+ // Check for memory node
+ //
+ Type = fdt_getprop (DeviceTreeBase, Node, "compatible", &Len);
+ if ((Type != NULL) &&
+ (AsciiStrnCmp (Type, "qemu,fw-cfg-mmio", Len) == 0))
+ {
+ //
+ // Get the 'reg' property of this node. For now, we will assume
+ // two 8 byte quantities for base and size, respectively.
+ //
+ Reg = fdt_getprop (DeviceTreeBase, Node, "reg", &Len);
+ if ((Reg != 0) && (Len == (2 * sizeof (UINT64)))) {
+ FwCfgDataAddress = SwapBytes64 (Reg[0]);
+ FwCfgDataSize = 8;
+ FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
+ FwCfgSelectorSize = 2;
+
+ //
+ // The following ASSERT()s express
+ //
+ // Address + Size - 1 <= MAX_UINTN
+ //
+ // for both registers, that is, that the last byte in each MMIO range is
+ // expressible as a MAX_UINTN. The form below is mathematically
+ // equivalent, and it also prevents any unsigned overflow before the
+ // comparison.
+ //
+ ASSERT (FwCfgSelectorAddress <= MAX_UINTN - FwCfgSelectorSize + 1);
+ ASSERT (FwCfgDataAddress <= MAX_UINTN - FwCfgDataSize + 1);
+
+ FwCfgResource->FwCfgSelectorAddress = FwCfgSelectorAddress;
+ FwCfgResource->FwCfgDataAddress = FwCfgDataAddress;
+
+ DEBUG ((
+ DEBUG_INFO,
+ "Found FwCfg @ 0x%Lx/0x%Lx\n",
+ FwCfgSelectorAddress,
+ FwCfgDataAddress
+ ));
+
+ if (SwapBytes64 (Reg[1]) >= 0x18) {
+ FwCfgDmaAddress = FwCfgDataAddress + 0x10;
+ FwCfgDmaSize = 0x08;
+
+ //
+ // See explanation above.
+ //
+ ASSERT (FwCfgDmaAddress <= MAX_UINTN - FwCfgDmaSize + 1);
+
+ DEBUG ((DEBUG_INFO, "Found FwCfg DMA @ 0x%Lx\n", FwCfgDmaAddress));
+ FwCfgResource->FwCfgDmaAddress = FwCfgDmaAddress;
+ } else {
+ FwCfgDmaAddress = 0;
+ }
+
+ if ((FwCfgSelectorAddress != 0) && (FwCfgDataAddress != 0)) {
+ //
+ // Select Item Signature
+ //
+ MmioWrite16 (FwCfgSelectorAddress, SwapBytes16 ((UINT16)QemuFwCfgItemSignature));
+
+ //
+ // Readout the Signature.
+ //
+ Signature = MmioRead32 (FwCfgDataAddress);
+
+ if (Signature == SIGNATURE_32 ('Q', 'E', 'M', 'U')) {
+ //
+ // Build the firmware configure resource HOB.
+ //
+ QemuBuildFwCfgResourceHob (FwCfgResource);
+ } else {
+ FwCfgResource->FwCfgDataAddress = 0;
+ FwCfgResource->FwCfgSelectorAddress = 0;
+ FwCfgResource->FwCfgDmaAddress = 0;
+
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: Signature dose not match QEMU!\n",
+ __func__
+ ));
+ break;
+ }
+ }
+
+ break;
+ } else {
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: Failed to parse FDT QemuCfg node\n",
+ __func__
+ ));
+ break;
+ }
+ }
+ }
+
+ return RETURN_SUCCESS;
+}
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf
new file mode 100644
index 0000000000..b91f106c86
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf
@@ -0,0 +1,45 @@
+## @file
+#
+# Stateful, implicitly initialized fw_cfg library.
+#
+# Copyright (C) 2013 - 2014, Red Hat, Inc.
+# Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2024 Loongson Technology Corporation Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 1.29
+ BASE_NAME = QemuFwCfgPeiLib
+ FILE_GUID = CDF9A9D5-7422-4DCB-B41D-607151AD320B
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = QemuFwCfgLib|PEIM
+
+ CONSTRUCTOR = QemuFwCfgInitialize
+
+[Sources]
+ QemuFwCfgLibMmio.c
+ QemuFwCfgMmioPei.c
+
+[Packages]
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdePkg/MdePkg.dec
+ OvmfPkg/OvmfPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ HobLib
+ IoLib
+ MemoryAllocationLib
+ PcdLib
+
+[Pcd]
+ gUefiOvmfPkgTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress
+
+[Guids]
+ gQemuFirmwareResourceHobGuid
--
2.27.0
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#118426): https://edk2.groups.io/g/devel/message/118426
Mute This Topic: https://groups.io/mt/105816970/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-
^ permalink raw reply related [flat|nested] 10+ messages in thread* [edk2-devel] [PATCH v5 5/8] OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf
2024-04-30 7:47 [edk2-devel] [PATCH v5 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage Chao Li
` (3 preceding siblings ...)
2024-04-30 7:48 ` [edk2-devel] [PATCH v5 4/8] OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version Chao Li
@ 2024-04-30 7:48 ` Chao Li
2024-04-30 7:48 ` [edk2-devel] [PATCH v5 6/8] ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf Chao Li
` (3 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Chao Li @ 2024-04-30 7:48 UTC (permalink / raw)
To: devel; +Cc: Ard Biesheuvel, Jiewen Yao, Gerd Hoffmann
Copy QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf,
QemuFwCfgLibMmio.inf will be deleted when all platforms switching is
completed.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
---
.../QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf | 54 +++++++++++++++++++
1 file changed, 54 insertions(+)
create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
new file mode 100644
index 0000000000..633053aaed
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
@@ -0,0 +1,54 @@
+## @file
+#
+# Stateful, implicitly initialized fw_cfg library.
+#
+# Copyright (C) 2013 - 2014, Red Hat, Inc.
+# Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2024 Loongson Technology Corporation Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = QemuFwCfgLib
+ FILE_GUID = B271F41F-B841-48A9-BA8D-545B4BC2E2BF
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = QemuFwCfgLib|DXE_DRIVER UEFI_DRIVER
+
+ CONSTRUCTOR = QemuFwCfgInitialize
+
+#
+# The following information is for reference only and not required by the build
+# tools.
+#
+# VALID_ARCHITECTURES = ARM AARCH64 RISCV64 LOONGARCH64
+#
+
+[Sources]
+ QemuFwCfgLibMmio.c
+ QemuFwCfgMmioDxe.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ OvmfPkg/OvmfPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ HobLib
+ IoLib
+ UefiBootServicesTableLib
+
+[Protocols]
+ gFdtClientProtocolGuid ## CONSUMES
+
+[Guids]
+ gQemuFirmwareResourceHobGuid
+
+[Depex]
+ gFdtClientProtocolGuid
--
2.27.0
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#118427): https://edk2.groups.io/g/devel/message/118427
Mute This Topic: https://groups.io/mt/105816971/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-
^ permalink raw reply related [flat|nested] 10+ messages in thread* [edk2-devel] [PATCH v5 6/8] ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf
2024-04-30 7:47 [edk2-devel] [PATCH v5 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage Chao Li
` (4 preceding siblings ...)
2024-04-30 7:48 ` [edk2-devel] [PATCH v5 5/8] OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf Chao Li
@ 2024-04-30 7:48 ` Chao Li
2024-04-30 7:48 ` [edk2-devel] [PATCH v5 7/8] OvmfPkg/RiscVVirt: " Chao Li
` (2 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Chao Li @ 2024-04-30 7:48 UTC (permalink / raw)
To: devel
Cc: Ard Biesheuvel, Jiewen Yao, Gerd Hoffmann, Leif Lindholm,
Sami Mujawar
Enable QemuFwCfgMmioDxeLib.inf in ArmVirtQemu.dsc and
ArmVirtQemuKernel.dsc.
Build-tested only (with "ArmVirtQemu.dsc").
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
---
ArmVirtPkg/ArmVirtQemu.dsc | 2 +-
ArmVirtPkg/ArmVirtQemuKernel.dsc | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index f6f7835955..7e2ff33ad1 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -60,7 +60,7 @@ [LibraryClasses.common]
# Virtio Support
VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
- QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+ QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc
index 668a65ba64..efe2df97bd 100644
--- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
+++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
@@ -57,7 +57,7 @@ [LibraryClasses.common]
# Virtio Support
VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
- QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+ QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
--
2.27.0
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#118428): https://edk2.groups.io/g/devel/message/118428
Mute This Topic: https://groups.io/mt/105816972/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-
^ permalink raw reply related [flat|nested] 10+ messages in thread* [edk2-devel] [PATCH v5 7/8] OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf
2024-04-30 7:47 [edk2-devel] [PATCH v5 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage Chao Li
` (5 preceding siblings ...)
2024-04-30 7:48 ` [edk2-devel] [PATCH v5 6/8] ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf Chao Li
@ 2024-04-30 7:48 ` Chao Li
2024-04-30 7:48 ` [edk2-devel] [PATCH v5 8/8] OvmfPkg: Remove QemuFwCfgLibMmio.inf Chao Li
2024-04-30 10:16 ` [edk2-devel] [PATCH v5 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage Ard Biesheuvel
8 siblings, 0 replies; 10+ messages in thread
From: Chao Li @ 2024-04-30 7:48 UTC (permalink / raw)
To: devel
Cc: Ard Biesheuvel, Jiewen Yao, Gerd Hoffmann, Sunil V L,
Andrei Warkentin
Enable QemuFwCfgMmioDxeLib.inf in RiscVVirtQemu.dsc
Build-tested only (with "RiscVVirtQemu.dsc").
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
---
OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
index 27f24648e8..e0ed6fb9bc 100644
--- a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
+++ b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
@@ -78,7 +78,7 @@ [LibraryClasses.common]
# Virtio Support
VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
- QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+ QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
--
2.27.0
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#118429): https://edk2.groups.io/g/devel/message/118429
Mute This Topic: https://groups.io/mt/105816973/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-
^ permalink raw reply related [flat|nested] 10+ messages in thread* [edk2-devel] [PATCH v5 8/8] OvmfPkg: Remove QemuFwCfgLibMmio.inf
2024-04-30 7:47 [edk2-devel] [PATCH v5 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage Chao Li
` (6 preceding siblings ...)
2024-04-30 7:48 ` [edk2-devel] [PATCH v5 7/8] OvmfPkg/RiscVVirt: " Chao Li
@ 2024-04-30 7:48 ` Chao Li
2024-04-30 10:16 ` [edk2-devel] [PATCH v5 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage Ard Biesheuvel
8 siblings, 0 replies; 10+ messages in thread
From: Chao Li @ 2024-04-30 7:48 UTC (permalink / raw)
To: devel; +Cc: Ard Biesheuvel, Jiewen Yao, Gerd Hoffmann
All of platforms are switching to QemuFwCfgMmioDxeLib.inf, remove
QemuFwCfgLibMmio.inf now.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
---
.../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf | 54 -------------------
1 file changed, 54 deletions(-)
delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
deleted file mode 100644
index 633053aaed..0000000000
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+++ /dev/null
@@ -1,54 +0,0 @@
-## @file
-#
-# Stateful, implicitly initialized fw_cfg library.
-#
-# Copyright (C) 2013 - 2014, Red Hat, Inc.
-# Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
-# Copyright (c) 2024 Loongson Technology Corporation Limited. All rights reserved.<BR>
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = QemuFwCfgLib
- FILE_GUID = B271F41F-B841-48A9-BA8D-545B4BC2E2BF
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = QemuFwCfgLib|DXE_DRIVER UEFI_DRIVER
-
- CONSTRUCTOR = QemuFwCfgInitialize
-
-#
-# The following information is for reference only and not required by the build
-# tools.
-#
-# VALID_ARCHITECTURES = ARM AARCH64 RISCV64 LOONGARCH64
-#
-
-[Sources]
- QemuFwCfgLibMmio.c
- QemuFwCfgMmioDxe.c
-
-[Packages]
- MdePkg/MdePkg.dec
- OvmfPkg/OvmfPkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
-
-[LibraryClasses]
- BaseLib
- BaseMemoryLib
- DebugLib
- HobLib
- IoLib
- UefiBootServicesTableLib
-
-[Protocols]
- gFdtClientProtocolGuid ## CONSUMES
-
-[Guids]
- gQemuFirmwareResourceHobGuid
-
-[Depex]
- gFdtClientProtocolGuid
--
2.27.0
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#118430): https://edk2.groups.io/g/devel/message/118430
Mute This Topic: https://groups.io/mt/105816977/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [edk2-devel] [PATCH v5 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage
2024-04-30 7:47 [edk2-devel] [PATCH v5 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage Chao Li
` (7 preceding siblings ...)
2024-04-30 7:48 ` [edk2-devel] [PATCH v5 8/8] OvmfPkg: Remove QemuFwCfgLibMmio.inf Chao Li
@ 2024-04-30 10:16 ` Ard Biesheuvel
8 siblings, 0 replies; 10+ messages in thread
From: Ard Biesheuvel @ 2024-04-30 10:16 UTC (permalink / raw)
To: Chao Li
Cc: devel, Ard Biesheuvel, Jiewen Yao, Gerd Hoffmann, Leif Lindholm,
Sami Mujawar, Sunil V L, Andrei Warkentin
On Tue, 30 Apr 2024 at 09:47, Chao Li <lichao@loongson.cn> wrote:
>
> Patch1: Added three PCDs for QemuFwCfgLibMmio
> Patch2: Sparate QemuFwCfgLibMmio.c into two files and default as DXE
> stage library.
> Patch3: Added QemuFwCfgMmiLib PEI version
> Patch4: Rename QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf and
> enable it in AARCH64 and RISCV64.
>
> V1 -> V2:
> 1. Use HOBs instead of PCD.
> 2. The old patch2 is divided into two parts, one is code splitting, and
> the other is functional changes.
> 3. add two patches to keep the safe when change the platform DSC file.
>
> V2 -> V3:
> 1. Merge three HOBs into a single HOB.
> 2. Remove the dynamic global variables in PEI.
>
> V3 -> V4:
> 1. Adjust the HOB content, this version saves all of structual contents
> in HOB.
> 2. Remove the Loongson copyright in separation patch, and add it in the
> funciton change patch.
> 3. Restored some variables as static in DXE version.
> 4. Added the HOB GUID in OvmfPkg.dec.
>
> V4 -> V5
> 1. Adjust the PEI version some logic error, it will built the HOB after
> the QEMU check passes.
> 2. Adjust some code style.
> 3. Remove the architecture comment in PEI INF.
> 4. Reoder the PEI INF in alphabetical order.
>
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755
>
> PR: https://github.com/tianocore/edk2/pull/5568
>
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Gerd Hoffmann <kraxel@redhat.com>
> Cc: Leif Lindholm <quic_llindhol@quicinc.com>
> Cc: Sami Mujawar <sami.mujawar@arm.com>
> Cc: Sunil V L <sunilvl@ventanamicro.com>
> Cc: Andrei Warkentin <andrei.warkentin@intel.com>
>
> Chao Li (8):
> OvmfPkg: Add a GUID for QemuFwCfgLib
> OvmfPkg: Separate QemuFwCfgLibMmio.c into two files
> OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio
> OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version
> OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf
> ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf
> OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf
> OvmfPkg: Remove QemuFwCfgLibMmio.inf
>
Thanks - I've queued these up now
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#118435): https://edk2.groups.io/g/devel/message/118435
Mute This Topic: https://groups.io/mt/105816958/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-
^ permalink raw reply [flat|nested] 10+ messages in thread