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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C X-Received: from SATLEXMB04.amd.com (165.204.84.17) by SJ5PEPF000001CE.mail.protection.outlook.com (10.167.242.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7544.18 via Frontend Transport; Wed, 1 May 2024 19:05:31 +0000 X-Received: from localhost (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Wed, 1 May 2024 14:05:30 -0500 From: "Roth, Michael via groups.io" To: CC: Gerd Hoffmann , Ard Biesheuvel , "Tom Lendacky" , Erdem Aktas , Jiewen Yao , Min Xu , Jianyong Wu , Anatol Belski Subject: [edk2-devel] [PATCH v4 2/3] OvmfPkg: Don't make APIC MMIO accesses with encryption bit set Date: Wed, 1 May 2024 14:03:39 -0500 Message-ID: <20240501190340.2238565-3-michael.roth@amd.com> In-Reply-To: <20240501190340.2238565-1-michael.roth@amd.com> References: <20240501190340.2238565-1-michael.roth@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001CE:EE_|IA1PR12MB6185:EE_ X-MS-Office365-Filtering-Correlation-Id: 8d73dced-5f28-41d7-7a9c-08dc6a11ac19 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?mE1Avu+yOqXay445CX0cz8bblDMIoU9fn3ro53K4hXs3UXT7wAnNupQrJTQU?= =?us-ascii?Q?zaNR+Pb1ruDT+0GAQiF3MZ2owO2WJ/z7OpLaob/hQQvdxA2JHqrjFrjV4VVv?= =?us-ascii?Q?WlRgdoKJJymDSvfKo+W6hL47xM6IuubeF5WOFY9ycdU/Kd7/n3HjAeKgBwz/?= =?us-ascii?Q?jDNhL4N0yA0H7yKnpQDRVivuaftII3FvAqntQ2ZGLuhgQLYdjlY3GuDnrG8B?= =?us-ascii?Q?jAq9OlRG8slPw4kptEWUWRkrzuQtj6+tM0uIxquBqV9gSwRCYYCiAtVmXWcj?= =?us-ascii?Q?qW1kBv7JyYsuxRQYlA/dfbRWlwgsDYo/Paz2r6wFV6MswB/T1idpmxkivXNO?= =?us-ascii?Q?xmRhuSpwF1XRkeEUWp+p5feqMmHvZj5hN5Ohikza58gjQe9skufRJW9uzusm?= =?us-ascii?Q?1EoVG9nrK5JeSo02G5iloSVBZCZv6eqq2Q7ZjCIWCowMIp3k3fVhRedvEtcI?= =?us-ascii?Q?AOj/Se6SPjwQjUJk0Xz7avk4lfbL82wu3Ws0GyA8RVzc+Y6jpp4AqHYVL/+7?= =?us-ascii?Q?db9TSpNKEavpivCoHmQBXEXhx6OvOs5ynSnODqcDQhHEQo85DayrYUMeoIhE?= =?us-ascii?Q?npL7N4T/ulmWoIw6JkTVF8L5Fkh57JZ/qLpp+IvBK0Wr4a1AAVhKHe6jLvdC?= =?us-ascii?Q?VmIHbHeUjKLYWusMw2sIR7jmgnm4yPnNh9nsu4NEZJ8tpRLkRjuyM76enTuC?= =?us-ascii?Q?f9gSwHdbHCQFoYtEdbLvbxStIm7lk+yYxRrA1c4gxEF5wNO+uz4YdyV2LcRS?= =?us-ascii?Q?nUK/RSeCgTEuB6KYdm74W+a7wA73Rh05PT6WLSs3LWvw0vI4kdrHbn/um66r?= =?us-ascii?Q?Z7lS4xyqLCSwCcvarLkmm0isPGS1In42V66ZLR/dXiVHeiLYQ+IzuAmnzpwG?= =?us-ascii?Q?F3X6Z9mhNYfiCoIP3OnziTPuJi9y5PTwRrydJStdPbgOk7VkGvYiFiUFHeRi?= =?us-ascii?Q?7W6H0q3cgsoglc3K2maoxW+4BzGaicViNnqEuEi0eYG9WBs5EGW8Qj8zJcHA?= =?us-ascii?Q?rfrdfhLuqtYHFhQFgHOKEo0n5m2jc/VAuwp7LhBNmdtyEw9jywBq+XGlc1OX?= =?us-ascii?Q?EvVAyRyRNMR6i/O20Si69zzJ/IHueyreOFJwW9I86mDHRHhjN++eK896mQbP?= =?us-ascii?Q?gV/t9deiXl8fvt3Zo1T7g13o3q2hkM1qBHs3FWX4TueZalc/1KGK89tzcEua?= =?us-ascii?Q?xXGts4//UjSJoAV19GY92IYoRfGptlTjWDQJCUf2jL0KR2Vyq2ZdgRVQEUsW?= =?us-ascii?Q?R4MrS7z1tW+YKrzrajpm8qpY6vOZppKobY0Xkz2d9Et510B27W6DOHRVWaHr?= =?us-ascii?Q?aw29qv0/g6eyZEjvzDIJzO8v?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 May 2024 19:05:31.2857 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8d73dced-5f28-41d7-7a9c-08dc6a11ac19 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001CE.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6185 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Wed, 01 May 2024 12:05:37 -0700 Resent-From: Michael.Roth@amd.com Reply-To: devel@edk2.groups.io,Michael.Roth@amd.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: Ac2SHTm1ed5cS4IBWDNswzIfx7686176AA= Content-Transfer-Encoding: quoted-printable Content-Type: text/plain X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=siYbWxzg; dmarc=pass (policy=none) header.from=groups.io; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io For the most part, OVMF will clear the encryption bit for MMIO regions, but there is currently one known exception during SEC when the APIC base address is accessed via MMIO with the encryption bit set for SEV-ES/SEV-SNP guests. In the case of SEV-SNP, this requires special handling on the hypervisor side which may not be available in the future[1], so make the necessary changes in the SEC-configured page table to clear the encryption bit for 4K region containing the APIC base address. [1] https://lore.kernel.org/lkml/20240208002420.34mvemnzrwwsaesw@amd.com/#t Suggested-by: Tom Lendacky Cc: Ard Biesheuvel Cc: Gerd Hoffmann Cc: Erdem Aktas Cc: Jiewen Yao Cc: Min Xu Cc: Tom Lendacky Cc: Jianyong Wu Cc: Anatol Belski Signed-off-by: Michael Roth --- OvmfPkg/AmdSev/AmdSevX64.fdf | 5 ++- OvmfPkg/Bhyve/BhyveX64.dsc | 1 + OvmfPkg/CloudHv/CloudHvX64.fdf | 5 ++- OvmfPkg/Microvm/MicrovmX64.fdf | 3 ++ OvmfPkg/OvmfPkg.dec | 5 +++ OvmfPkg/OvmfPkgX64.fdf | 5 ++- OvmfPkg/Sec/AmdSev.c | 58 ++++++++++++++++++++++++++++++++++ OvmfPkg/Sec/AmdSev.h | 14 ++++++++ OvmfPkg/Sec/SecMain.c | 1 + OvmfPkg/Sec/SecMain.inf | 3 ++ 10 files changed, 97 insertions(+), 3 deletions(-) diff --git a/OvmfPkg/AmdSev/AmdSevX64.fdf b/OvmfPkg/AmdSev/AmdSevX64.fdf index d49555c6c8..595945181c 100644 --- a/OvmfPkg/AmdSev/AmdSevX64.fdf +++ b/OvmfPkg/AmdSev/AmdSevX64.fdf @@ -77,7 +77,10 @@ gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretBase|gUefiO= vmfPkgTokenSpaceGuid.Pcd 0x010C00|0x000400 gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableBase|gUefiOvmfPkgTokenSpaceGuid= .PcdQemuHashTableSize =20 -0x011000|0x00F000 +0x011000|0x001000 +gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableBase|gUefiOvmfPkgTokenSp= aceGuid.PcdOvmfSecApicPageTableSize + +0x012000|0x00E000 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpace= Guid.PcdOvmfSecPeiTempRamSize =20 0x020000|0x0E0000 diff --git a/OvmfPkg/Bhyve/BhyveX64.dsc b/OvmfPkg/Bhyve/BhyveX64.dsc index 6f305d690d..78050959f8 100644 --- a/OvmfPkg/Bhyve/BhyveX64.dsc +++ b/OvmfPkg/Bhyve/BhyveX64.dsc @@ -174,6 +174,7 @@ PeiHardwareInfoLib|OvmfPkg/Library/HardwareInfoLib/PeiHardwareInfoLib.in= f DxeHardwareInfoLib|OvmfPkg/Library/HardwareInfoLib/DxeHardwareInfoLib.in= f ImagePropertiesRecordLib|MdeModulePkg/Library/ImagePropertiesRecordLib/I= magePropertiesRecordLib.inf + CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf =20 CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/Customize= dDisplayLib.inf FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltL= ib.inf diff --git a/OvmfPkg/CloudHv/CloudHvX64.fdf b/OvmfPkg/CloudHv/CloudHvX64.fd= f index eae3ada191..3e6688b103 100644 --- a/OvmfPkg/CloudHv/CloudHvX64.fdf +++ b/OvmfPkg/CloudHv/CloudHvX64.fdf @@ -76,7 +76,10 @@ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase|gUefiOvmfPkg= TokenSpaceGuid.PcdOvmfCp 0x00F000|0x001000 gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtr|gUefiOvmfPkgTokenS= paceGuid.PcdXenPvhStartOfDayStructPtrSize =20 -0x010000|0x010000 +0x010000|0x001000 +gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableBase|gUefiOvmfPkgTokenSp= aceGuid.PcdOvmfSecApicPageTableSize + +0x011000|0x00F000 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpace= Guid.PcdOvmfSecPeiTempRamSize =20 0x020000|0x0E0000 diff --git a/OvmfPkg/Microvm/MicrovmX64.fdf b/OvmfPkg/Microvm/MicrovmX64.fd= f index 825bf9f5e4..055e659a35 100644 --- a/OvmfPkg/Microvm/MicrovmX64.fdf +++ b/OvmfPkg/Microvm/MicrovmX64.fdf @@ -62,6 +62,9 @@ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase|gUefiOvmfP= kgTokenSpaceGuid.PcdOvm 0x00C000|0x001000 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase|gUefiOvmfPkgTokenSpace= Guid.PcdOvmfSecGhcbBackupSize =20 +0x00D000|0x001000 +gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableBase|gUefiOvmfPkgTokenSp= aceGuid.PcdOvmfSecApicPageTableSize + 0x010000|0x010000 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpace= Guid.PcdOvmfSecPeiTempRamSize =20 diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec index 731f67b727..51be9a5959 100644 --- a/OvmfPkg/OvmfPkg.dec +++ b/OvmfPkg/OvmfPkg.dec @@ -278,6 +278,11 @@ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase|0|UINT32|0x44 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupSize|0|UINT32|0x45 =20 + ## Specify the extra page table needed to mark the APIC MMIO range as un= encrypted. + # The value should be a multiple of 4KB for each. + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableBase|0x0|UINT32|0x72 + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableSize|0x0|UINT32|0x73 + ## The base address and size of the SEV Launch Secret Area provisioned # after remote attestation. If this is set in the .fdf, the platform # is responsible for protecting the area from DXE phase overwrites. diff --git a/OvmfPkg/OvmfPkgX64.fdf b/OvmfPkg/OvmfPkgX64.fdf index c2d3cc901e..b6e8f43566 100644 --- a/OvmfPkg/OvmfPkgX64.fdf +++ b/OvmfPkg/OvmfPkgX64.fdf @@ -97,7 +97,10 @@ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase|gUefiOvmfPkg= TokenSpaceGuid.PcdOvmfCp 0x00F000|0x001000 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecSvsmCaaBase|gUefiOvmfPkgTokenSpaceGui= d.PcdOvmfSecSvsmCaaSize =20 -0x010000|0x010000 +0x010000|0x001000 +gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableBase|gUefiOvmfPkgTokenSp= aceGuid.PcdOvmfSecApicPageTableSize + +0x011000|0x00F000 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpace= Guid.PcdOvmfSecPeiTempRamSize =20 0x020000|0x0E0000 diff --git a/OvmfPkg/Sec/AmdSev.c b/OvmfPkg/Sec/AmdSev.c index 520b125132..89fba2fd18 100644 --- a/OvmfPkg/Sec/AmdSev.c +++ b/OvmfPkg/Sec/AmdSev.c @@ -8,7 +8,10 @@ **/ =20 #include +#include +#include #include +#include #include #include #include @@ -301,3 +304,58 @@ SecValidateSystemRam ( MemEncryptSevSnpPreValidateSystemRam (Start, EFI_SIZE_TO_PAGES ((UINTN= )(End - Start))); } } + +/** + Map known MMIO regions unencrypted if SEV-ES is active. + + During early booting, page table entries default to having the encryptio= n bit + set for SEV-ES/SEV-SNP guests. In cases where there is MMIO to an addres= s, the + encryption bit should be cleared. Clear it here for any known MMIO acces= ses + during SEC, which is currently just the APIC base address. + +**/ +VOID +SecMapApicBaseUnencrypted ( + VOID + ) +{ + PHYSICAL_ADDRESS Cr3; + UINT64 ApicAddress; + VOID *Buffer; + UINTN BufferSize; + IA32_MAP_ATTRIBUTE MapAttribute; + IA32_MAP_ATTRIBUTE MapMask; + RETURN_STATUS Status; + + if (!SevEsIsEnabled ()) { + return; + } + + ApicAddress =3D (UINT64)GetLocalApicBaseAddress (); + Buffer =3D (VOID *)(UINTN)FixedPcdGet32 (PcdOvmfSecApicPageTableBas= e); + Cr3 =3D AsmReadCr3 (); + + MapAttribute.Uint64 =3D ApicAddress; + MapAttribute.Bits.Present =3D 1; + MapAttribute.Bits.ReadWrite =3D 1; + MapMask.Uint64 =3D MAX_UINT64; + BufferSize =3D SIZE_4KB; + + Status =3D PageTableMap ( + (UINTN *)&Cr3, + Paging4Level, + Buffer, + &BufferSize, + ApicAddress, + SIZE_4KB, + &MapAttribute, + &MapMask, + NULL + ); + if (RETURN_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Failed to map APIC MMIO region as unencrypted: %= d\n", Status)); + ASSERT (FALSE); + } + + CpuFlushTlb (); +} diff --git a/OvmfPkg/Sec/AmdSev.h b/OvmfPkg/Sec/AmdSev.h index f75877096e..c5ab0d5a0b 100644 --- a/OvmfPkg/Sec/AmdSev.h +++ b/OvmfPkg/Sec/AmdSev.h @@ -91,4 +91,18 @@ SevSnpIsEnabled ( VOID ); =20 +/** + Map MMIO regions unencrypted if SEV-ES is active. + + During early booting, page table entries default to having the encryptio= n bit + set for SEV-ES/SEV-SNP guests. In cases where there is MMIO to an addres= s, the + encryption bit should be cleared. Clear it here for any known MMIO acces= ses + during SEC, which is currently just the APIC base address. + +**/ +VOID +SecMapApicBaseUnencrypted ( + VOID + ); + #endif diff --git a/OvmfPkg/Sec/SecMain.c b/OvmfPkg/Sec/SecMain.c index a30d4ce09e..60dfa61842 100644 --- a/OvmfPkg/Sec/SecMain.c +++ b/OvmfPkg/Sec/SecMain.c @@ -938,6 +938,7 @@ SecCoreStartupWithStack ( // interrupts before initializing the Debug Agent and the debug timer is // enabled. // + SecMapApicBaseUnencrypted (); InitializeApicTimer (0, MAX_UINT32, TRUE, 5); DisableApicTimerInterrupt (); =20 diff --git a/OvmfPkg/Sec/SecMain.inf b/OvmfPkg/Sec/SecMain.inf index dca932a474..88c2d3fb6d 100644 --- a/OvmfPkg/Sec/SecMain.inf +++ b/OvmfPkg/Sec/SecMain.inf @@ -55,6 +55,7 @@ MemEncryptSevLib CpuExceptionHandlerLib CcProbeLib + CpuPageTableLib =20 [Ppis] gEfiTemporaryRamSupportPpiGuid # PPI ALWAYS_PRODUCED @@ -83,6 +84,8 @@ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase gUefiOvmfPkgTokenSpaceGuid.PcdTdxAcceptPageSize gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableBase + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableSize =20 [FeaturePcd] gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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