From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail05.groups.io (mail05.groups.io [45.79.224.7]) by spool.mail.gandi.net (Postfix) with ESMTPS id 27352D806DA for ; Thu, 23 May 2024 10:56:23 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=6oKXyjWtZcPKFiSU5ZfmJqAkKWP3e3CzbSqKDtkMzeM=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Resent-From:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20240206; t=1716461782; v=1; b=al8VfD9np6W6ot102Rt0TRybRucmORn4uF32MfI8qeS9r7jq9rUb9JC+R/wd380ph+xwz4b4 88nTAB87DxxaqDpbaXH6KUOKAOcM/LttWDu5lXLLvxGys7cI2J0L7bFJ75G0Im6SsPL1xS3FNuv i9QartQtj+S5jzni74F8IMCn0dxVywsFZ1fbKSd8KU1B62FzYCet1PfkWpZQYYjDUWCP1IG1NyH NzWq5naNMB+cEzP8C9nZtlhAe6U8+nRspmjY+yPIx5jvPZoYdYMN6qOAwpvCt/mhpR5GI0dJgg4 w8rc/RrI36coc+Bowf5zvksZws/g3onaEc2nepFFW1D/A== X-Received: by 127.0.0.2 with SMTP id IWZbYY7687511xf85KwjBa6z; Thu, 23 May 2024 03:56:22 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.12646.1716461781051263012 for ; Thu, 23 May 2024 03:56:21 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CFBB5339; Thu, 23 May 2024 03:56:44 -0700 (PDT) X-Received: from usa.arm.com (a077434.arm.com [10.162.46.143]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 18D8A3F766; Thu, 23 May 2024 03:56:18 -0700 (PDT) From: "Sahil Kaushal" To: devel@edk2.groups.io Cc: Ard Biesheuvel , =?UTF-8?q?Leif=20Lindholm=20=C2=A0?= , Sami Mujawar , =?UTF-8?q?sahil=20=C2=A0?= Subject: [edk2-devel] [edk2-platforms][PATCH V3 14/17] Silicon/ARM/NeoverseN1Soc: NOR flash library for N1Sdp Date: Thu, 23 May 2024 16:25:08 +0530 Message-Id: <20240523105511.13189-15-Sahil.Kaushal@arm.com> In-Reply-To: <20240523105511.13189-1-Sahil.Kaushal@arm.com> References: <20240523105511.13189-1-Sahil.Kaushal@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Thu, 23 May 2024 03:56:21 -0700 Resent-From: sahil.kaushal@arm.com Reply-To: devel@edk2.groups.io,sahil.kaushal@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: 7pgl0glZqaOsOop2uTlzItcRx7686176AA= Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=al8VfD9n; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=arm.com (policy=none) From: sahil Add NOR flash library, this library provides APIs for getting the list of NOR flash devices on the platform. This flash is shared between AP core and System Control Processor. The lower addresses are used to store SCP and AP boot images and higher addresses will be used for variable storage. Signed-off-by: sahil --- Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf | 35 +++++++= ++ Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h | 1 + Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c | 80 +++++++= +++++++++++++ 3 files changed, 116 insertions(+) diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf = b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf new file mode 100644 index 000000000000..a9495cf667d5 --- /dev/null +++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf @@ -0,0 +1,35 @@ +## @file=0D +# NOR flash lib for ARM Neoverse N1 platform.=0D +#=0D +# Copyright (c) 2024, ARM Limited. All rights reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +##=0D +=0D +[Defines]=0D + INF_VERSION =3D 0x0001001B=0D + BASE_NAME =3D NorFlashNeoverseN1SocLib=0D + FILE_GUID =3D 7006fcf1-a585-4272-92e3-b286b1dff5bb= =0D + MODULE_TYPE =3D DXE_DRIVER=0D + VERSION_STRING =3D 1.0=0D + LIBRARY_CLASS =3D NorFlashPlatformLib=0D +=0D +[Sources.common]=0D + NorFlashLib.c=0D +=0D +[Packages]=0D + MdeModulePkg/MdeModulePkg.dec=0D + MdePkg/MdePkg.dec=0D + Platform/ARM/ARM.dec=0D + Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec=0D +=0D +[LibraryClasses]=0D + BaseLib=0D + DebugLib=0D +=0D +[FixedPcd]=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize=0D diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h b/Silicon/AR= M/NeoverseN1Soc/Include/NeoverseN1Soc.h index 2dae57a0f01a..2a592e5adc2f 100644 --- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h +++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h @@ -47,6 +47,7 @@ // SCP QSPI flash device=0D #define NEOVERSEN1SOC_SCP_QSPI_AHB_BASE 0x18000000=0D #define NEOVERSEN1SOC_SCP_QSPI_AHB_SZ 0x2000000=0D +#define NEOVERSEN1SOC_FIRMWARE_IAMGES_SZ 0x800000=0D =0D /*=0D * Platform information structure stored in Non-secure SRAM. Platform=0D diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c b/= Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c new file mode 100644 index 000000000000..a354ffb5ac6d --- /dev/null +++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c @@ -0,0 +1,80 @@ +/** @file=0D +* NOR flash lib for ARM Neoverse N1 platform=0D +*=0D +* Copyright (c) 2024, ARM Limited. All rights reserved.
=0D +*=0D +* SPDX-License-Identifier: BSD-2-Clause-Patent=0D +*=0D +**/=0D +=0D +#include =0D +#include =0D +#include =0D +#include =0D +=0D +#define FW_ENV_REGION_BASE FixedPcdGet32 (PcdFlashNvStorageVariableBase)= =0D +#define FW_ENV_REGION_SIZE (FixedPcdGet32 (PcdFlashNvStorageVariableSize)= + \=0D + FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize= ) + \=0D + FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize))= =0D +=0D +STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] =3D {=0D + {=0D + /// Environment variable region=0D + NEOVERSEN1SOC_SCP_QSPI_AHB_BASE, ///< device base=0D + FW_ENV_REGION_BASE, ///< region base=0D + FW_ENV_REGION_SIZE, ///< region size=0D + SIZE_4KB, ///< block size=0D + },=0D +};=0D +=0D +/**=0D + Dummy implementation of NorFlashPlatformInitialization to=0D + comply with NorFlashPlatformLib structure.=0D +=0D + @retval EFI_SUCCESS Success.=0D +**/=0D +EFI_STATUS=0D +NorFlashPlatformInitialization (=0D + VOID=0D + )=0D +{=0D + return EFI_SUCCESS;=0D +}=0D +=0D +/**=0D + Get NOR flash region info=0D +=0D + @param[out] NorFlashDevices NOR flash regions info.=0D + @param[out] Count number of flash instance.=0D +=0D + @retval EFI_SUCCESS Success.=0D + @retval EFI_INVALID_PARAMETER The parameters specified are not v= alid.=0D + @retval EFI_ACCESS_DENIED Invalid variable region address.=0D +**/=0D +EFI_STATUS=0D +NorFlashPlatformGetDevices (=0D + OUT NOR_FLASH_DESCRIPTION **NorFlashDevices,=0D + OUT UINT32 *Count=0D + )=0D +{=0D + if ((NorFlashDevices =3D=3D NULL) || (Count =3D=3D NULL)) {=0D + return EFI_INVALID_PARAMETER;=0D + }=0D +=0D + if ((NEOVERSEN1SOC_SCP_QSPI_AHB_BASE +=0D + NEOVERSEN1SOC_FIRMWARE_IAMGES_SZ) >=3D=0D + FW_ENV_REGION_BASE)=0D + {=0D + DEBUG ((=0D + DEBUG_ERROR,=0D + "NorFlashPlatformInitialization: Variable region overlapping with "= =0D + "firmware region.\n"=0D + ));=0D +=0D + return EFI_ACCESS_DENIED;=0D + }=0D +=0D + *NorFlashDevices =3D mNorFlashDevices;=0D + *Count =3D ARRAY_SIZE (mNorFlashDevices);=0D + return EFI_SUCCESS;=0D +}=0D --=20 2.25.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119156): https://edk2.groups.io/g/devel/message/119156 Mute This Topic: https://groups.io/mt/106260154/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-