From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail05.groups.io (mail05.groups.io [45.79.224.7]) by spool.mail.gandi.net (Postfix) with ESMTPS id 8B71C94135F for ; Thu, 23 May 2024 09:19:41 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=WGMJG36mmOt4vTaaEZqeXHJy/e78qgrLlNZzyD5ZSGQ=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Resent-From:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20240206; t=1716455980; v=1; b=lg5JRpTon/Kh1+6AvpcuNCby2olH0uLdPy+UKUyZ2NSOwCG1hY2ylW1bRtiHm2yI8KkAqkmt yfnAj8/wy1apsIkY2BclPZ09p/FTjUGE4ZOB95PiD7Zmg40JC7XyLItvqXFTMK2VkAC+y7PDDFr sK37BRDem0luSE0ThvcwXPdeKvORjLmKF0uJ2p3rF/DI75flPrHXHvlvnZB2XdzHisRO49uizSa eG8O/KL4DuNWp9xM2LDnEdONPBANqJpmXoxN9dfBMYSY6t3ilhhiqTjIffcQ+YDZEGCwTUT97eN iSb5jcQagSEKElvhpkCsJ7NMxqpATyOuUVnKX0N6NeyfA== X-Received: by 127.0.0.2 with SMTP id lUI5YY7687511xYJBtCyQect; Thu, 23 May 2024 02:19:40 -0700 X-Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) by mx.groups.io with SMTP id smtpd.web10.11188.1716455979542469439 for ; Thu, 23 May 2024 02:19:39 -0700 X-CSE-ConnectionGUID: XaoSVuYuT8ag4mb2RzPZQQ== X-CSE-MsgGUID: 63wEhBasSPaYxpsnk3r2lw== X-IronPort-AV: E=McAfee;i="6600,9927,11080"; a="12934513" X-IronPort-AV: E=Sophos;i="6.08,182,1712646000"; d="scan'208";a="12934513" X-Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2024 02:19:40 -0700 X-CSE-ConnectionGUID: SB0wj990RzOKUx1pi0taiw== X-CSE-MsgGUID: a1Ws4DU2QgG1IDTzz9qYCQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,182,1712646000"; d="scan'208";a="56844887" X-Received: from unknown (HELO shsse002.sh.intel.com) ([10.239.132.247]) by fmviesa002.fm.intel.com with ESMTP; 23 May 2024 02:19:37 -0700 From: "Ning Feng" To: devel@edk2.groups.io Cc: Ning Feng , Ray Ni Subject: [edk2-devel] [PATCH] Pkg-Module:UefiCpuPkg/MpLib Date: Thu, 23 May 2024 13:44:13 -0400 Message-Id: <20240523174413.3802769-1-ning.feng@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Thu, 23 May 2024 02:19:39 -0700 Resent-From: ning.feng@intel.com Reply-To: devel@edk2.groups.io,ning.feng@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: TLMyiPBW6NwX90YCQbODt117x7686176AA= Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=lg5JRpTo; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D4778 MPInitlib have wrong expectation that bsp id should always be 0 in MpInitLibInitialize(), SwitchBsp(),ApWakeupFunction(). That will cause the data mismatch, if the initial bsp is not 0. Use CpuMpData->BspNumber insted of index 0 to avoid the issue. Cc: Ray Ni Signed-off-by: Ning Feng --- ...-CodeQL-Update-from-2.16.1-to-2.17.3.patch | 82 ++++++++++++ 0001-Pkg-Module-UefiCpuPkg-MpLib.patch | 120 ++++++++++++++++++ UefiCpuPkg/Library/MpInitLib/MpLib.c | 34 +++-- 3 files changed, 226 insertions(+), 10 deletions(-) create mode 100644 0001-CodeQL-Update-from-2.16.1-to-2.17.3.patch create mode 100644 0001-Pkg-Module-UefiCpuPkg-MpLib.patch diff --git a/0001-CodeQL-Update-from-2.16.1-to-2.17.3.patch b/0001-CodeQL-U= pdate-from-2.16.1-to-2.17.3.patch new file mode 100644 index 0000000000..2ae61e1a4b --- /dev/null +++ b/0001-CodeQL-Update-from-2.16.1-to-2.17.3.patch @@ -0,0 +1,82 @@ +From 7142e648416ff5d3eac6c6d607874805f5de0ca8 Mon Sep 17 00:00:00 2001 +From: Michael Kubacki +Date: Fri, 17 May 2024 16:27:36 -0400 +Subject: [PATCH] CodeQL: Update from 2.16.1 to 2.17.3 + +This fixes an issue where the CodeQL queries currently fetched in the +pipeline are incompatible with the current executable used. + +Update to pick up functional and security fixes. See the following +comparison for detailed differences: + +https://github.com/github/codeql-cli-binaries/compare/v2.16.1...v2.17.3 + +Cc: Bob Feng +Cc: Joey Vagedes +Cc: Liming Gao +Cc: Michael D Kinney +Cc: Rebecca Cran +Cc: Sean Brogan +Cc: Yuwei Chen +Signed-off-by: Michael Kubacki +Reviewed-by: Michael D Kinney +--- + BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml | 6 +++--- + BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml | 6 +++--- + BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml | 6 +++--- + 3 files changed, 9 insertions(+), 9 deletions(-) + +diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml b/BaseTools/Pl= ugin/CodeQL/codeqlcli_ext_dep.yaml +index 5ec56c6bf0..dbc9c2ba02 100644 +--- a/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml ++++ b/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml +@@ -16,9 +16,9 @@ + "scope": "codeql-ext-dep",=0D + "type": "web",=0D + "name": "codeql_cli",=0D +- "source": "https://github.com/github/codeql-cli-binaries/releases/downl= oad/v2.16.1/codeql.zip",=0D +- "version": "2.16.1",=0D +- "sha256": "86a98f6ebb8fd49efadf367f3275c438669fcb8426962c33415129aad8e0= 93e6",=0D ++ "source": "https://github.com/github/codeql-cli-binaries/releases/downl= oad/v2.17.3/codeql.zip",=0D ++ "version": "2.17.3",=0D ++ "sha256": "e5ac1d87ab38e405c9af5db234a338b10dffabc98a648903f1664dd2a566= dfd5",=0D + "compression_type": "zip",=0D + "internal_path": "/codeql/",=0D + "flags": ["set_shell_var", ],=0D +diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml b/BaseTo= ols/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml +index 5b4a919f1d..536322f2b3 100644 +--- a/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml ++++ b/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml +@@ -14,9 +14,9 @@ + "scope": "codeql-linux-ext-dep",=0D + "type": "web",=0D + "name": "codeql_linux_cli",=0D +- "source": "https://github.com/github/codeql-cli-binaries/releases/downl= oad/v2.16.1/codeql-linux64.zip",=0D +- "version": "2.16.1",=0D +- "sha256": "40dbb6c0c4064bd14601a02e60c61661fdc0271469f90eb91a2e7d51d4cb= c171",=0D ++ "source": "https://github.com/github/codeql-cli-binaries/releases/downl= oad/v2.17.3/codeql-linux64.zip",=0D ++ "version": "2.17.3",=0D ++ "sha256": "9fba000c4b821534d354bc16821aa066fdb1304446226ea449870e64a8ad= 3c7a",=0D + "compression_type": "zip",=0D + "internal_path": "/codeql/",=0D + "flags": ["set_shell_var", ],=0D +diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml b/Base= Tools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml +index c0c018c953..93a81ffd50 100644 +--- a/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml ++++ b/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml +@@ -14,9 +14,9 @@ + "scope": "codeql-windows-ext-dep",=0D + "type": "web",=0D + "name": "codeql_windows_cli",=0D +- "source": "https://github.com/github/codeql-cli-binaries/releases/downl= oad/v2.16.1/codeql-win64.zip",=0D +- "version": "2.16.1",=0D +- "sha256": "9ebe5ea8a7d0a77425428d50d49912319117fccee24ecb62f6219c12584f= 4f28",=0D ++ "source": "https://github.com/github/codeql-cli-binaries/releases/downl= oad/v2.17.3/codeql-win64.zip",=0D ++ "version": "2.17.3",=0D ++ "sha256": "4c6fbf2ea2eaf0f47bf0347eacf54c6b9d6bdf7acb6b63e17f9e6f2dd83b= 34e7",=0D + "compression_type": "zip",=0D + "internal_path": "/codeql/",=0D + "flags": ["set_shell_var", ],=0D +--=20 +2.25.1 + diff --git a/0001-Pkg-Module-UefiCpuPkg-MpLib.patch b/0001-Pkg-Module-UefiC= puPkg-MpLib.patch new file mode 100644 index 0000000000..1d769ce1ce --- /dev/null +++ b/0001-Pkg-Module-UefiCpuPkg-MpLib.patch @@ -0,0 +1,120 @@ +From 3fbdb37f1ffe14917d38af0157562b23f5b3cdf0 Mon Sep 17 00:00:00 2001 +From: Ning Feng +Date: Thu, 23 May 2024 06:01:14 -0400 +Subject: [PATCH] Pkg-Module:UefiCpuPkg/MpLib + +REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D4778 +MPlib have wrong expectation that bsp id should always be 0 in +MpInitLibInitialize(), SwitchBsp(),ApWakeupFunction(). +That will caused the data mismatch, if the beginning bsp is not 0. +Use CpuMpData->NewBspNumber insted of index 0 to avoid the issue. +Cc: Ray Ni +Signed-off-by: Ning Feng +--- + UefiCpuPkg/Library/MpInitLib/MpLib.c | 34 +++++++++++++++++++--------- + 1 file changed, 23 insertions(+), 11 deletions(-) + +diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpI= nitLib/MpLib.c +index d724456502..3834f7236e 100644 +--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c ++++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c +@@ -114,6 +114,10 @@ FutureBSPProc ( + SaveVolatileRegisters (&DataInHob->APInfo.VolatileRegisters);=0D + AsmExchangeRole (&DataInHob->APInfo, &DataInHob->BSPInfo);=0D + RestoreVolatileRegisters (&DataInHob->APInfo.VolatileRegisters, FALSE);= =0D ++ //=0D ++ // Restore VolatileReg saved in CpuMpData->CpuData=0D ++ //=0D ++ CopyMem (&DataInHob->CpuData[DataInHob->BspNumber].VolatileRegisters, &= DataInHob->APInfo.VolatileRegisters, sizeof(CPU_VOLATILE_REGISTERS));=0D + }=0D + =0D + /**=0D +@@ -761,11 +765,11 @@ ApWakeupFunction ( + BistData =3D (UINT32)ApStackData->Bist;=0D + =0D + //=0D +- // CpuMpData->CpuData[0].VolatileRegisters is initialized based on = BSP environment,=0D ++ // CpuMpData->CpuData[BspNumber].VolatileRegisters is initialized b= ased on BSP environment,=0D + // to initialize AP in InitConfig path.=0D +- // NOTE: IDTR.BASE stored in CpuMpData->CpuData[0].VolatileRegister= s points to a different IDT shared by all APs.=0D ++ // NOTE: IDTR.BASE stored in CpuMpData->CpuData[BspNumber].Volatile= Registers points to a different IDT shared by all APs.=0D + //=0D +- RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters,= FALSE);=0D ++ RestoreVolatileRegisters (&CpuMpData->CpuData[CpuMpData->BspNumber]= .VolatileRegisters, FALSE);=0D + InitializeApData (CpuMpData, ProcessorNumber, BistData, ApTopOfStac= k);=0D + ApStartupSignalBuffer =3D CpuMpData->CpuData[ProcessorNumber].Start= upApSignal;=0D + } else {=0D +@@ -798,10 +802,10 @@ ApWakeupFunction ( + // 1. AP is re-enabled after it's disabled, in either PEI or DXE = phase.=0D + // 2. AP is initialized in DXE phase.=0D + // In either case, use the volatile registers value derived from = BSP.=0D +- // NOTE: IDTR.BASE stored in CpuMpData->CpuData[0].VolatileRegist= ers points to a=0D ++ // NOTE: IDTR.BASE stored in CpuMpData->CpuData[BspNumber].Volati= leRegisters points to a=0D + // different IDT shared by all APs.=0D + //=0D +- RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegister= s, FALSE);=0D ++ RestoreVolatileRegisters (&CpuMpData->CpuData[CpuMpData->BspNumbe= r].VolatileRegisters, FALSE);=0D + } else {=0D + if (CpuMpData->ApLoopMode =3D=3D ApInHltLoop) {=0D + //=0D +@@ -927,7 +931,7 @@ DxeApEntryPoint ( + AsmWriteMsr64 (MSR_IA32_EFER, EferMsr.Uint64);=0D + }=0D + =0D +- RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters, FAL= SE);=0D ++ RestoreVolatileRegisters (&CpuMpData->CpuData[CpuMpData->BspNumber].Vol= atileRegisters, FALSE);=0D + InterlockedIncrement ((UINT32 *)&CpuMpData->FinishedCount);=0D + PlaceAPInMwaitLoopOrRunLoop (=0D + CpuMpData->ApLoopMode,=0D +@@ -2151,7 +2155,11 @@ MpInitLibInitialize ( + CpuMpData->BackupBufferSize =3D ApResetVectorSizeBelow1Mb;=0D + CpuMpData->WakeupBuffer =3D (UINTN)-1;=0D + CpuMpData->CpuCount =3D 1;=0D +- CpuMpData->BspNumber =3D 0;=0D ++ if (MpHandOff =3D=3D NULL) {=0D ++ CpuMpData->BspNumber =3D 0;=0D ++ }else{=0D ++ CpuMpData->BspNumber =3D GetBspNumber (MpHandOff);=0D ++ }=0D + CpuMpData->WaitEvent =3D NULL;=0D + CpuMpData->SwitchBspFlag =3D FALSE;=0D + CpuMpData->CpuData =3D (CPU_AP_DATA *)(CpuMpData + 1);=0D +@@ -2186,11 +2194,11 @@ MpInitLibInitialize ( + // Don't pass BSP's TR to APs to avoid AP init failure.=0D + //=0D + VolatileRegisters.Tr =3D 0;=0D +- CopyMem (&CpuMpData->CpuData[0].VolatileRegisters, &VolatileRegisters, = sizeof (VolatileRegisters));=0D ++ CopyMem (&CpuMpData->CpuData[CpuMpData->BspNumber].VolatileRegisters, &= VolatileRegisters, sizeof (VolatileRegisters));=0D + //=0D + // Set BSP basic information=0D + //=0D +- InitializeApData (CpuMpData, 0, 0, CpuMpData->Buffer + ApStackSize);=0D ++ InitializeApData (CpuMpData, CpuMpData->BspNumber, 0, CpuMpData->Buffer= + ApStackSize * (CpuMpData->BspNumber+1));=0D + //=0D + // Save assembly code information=0D + //=0D +@@ -2536,7 +2544,6 @@ SwitchBSPWorker ( + MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr;=0D + BOOLEAN OldInterruptState;=0D + BOOLEAN OldTimerInterruptState;=0D +-=0D + //=0D + // Save and Disable Local APIC timer interrupt=0D + //=0D +@@ -2615,7 +2622,12 @@ SwitchBSPWorker ( + SaveVolatileRegisters (&CpuMpData->BSPInfo.VolatileRegisters);=0D + AsmExchangeRole (&CpuMpData->BSPInfo, &CpuMpData->APInfo);=0D + RestoreVolatileRegisters (&CpuMpData->BSPInfo.VolatileRegisters, FALSE)= ;=0D +-=0D ++ //=0D ++ // Restore VolatileReg saved in CpuMpData->CpuData=0D ++ // Don't pass BSP's TR to APs to avoid AP init failure.=0D ++ //=0D ++ CopyMem (&CpuMpData->CpuData[CpuMpData->NewBspNumber].VolatileRegisters= , &CpuMpData->BSPInfo.VolatileRegisters, sizeof(CPU_VOLATILE_REGISTERS));=0D ++ CpuMpData->CpuData[CpuMpData->NewBspNumber].VolatileRegisters.Tr =3D 0;= =0D + //=0D + // Set the BSP bit of MSR_IA32_APIC_BASE on new BSP=0D + //=0D +--=20 +2.25.1 + diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpIn= itLib/MpLib.c index d724456502..ae279c6ceb 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -114,6 +114,10 @@ FutureBSPProc ( SaveVolatileRegisters (&DataInHob->APInfo.VolatileRegisters);=0D AsmExchangeRole (&DataInHob->APInfo, &DataInHob->BSPInfo);=0D RestoreVolatileRegisters (&DataInHob->APInfo.VolatileRegisters, FALSE);= =0D + //=0D + // Restore VolatileReg saved in CpuMpData->CpuData=0D + //=0D + CopyMem (&DataInHob->CpuData[DataInHob->BspNumber].VolatileRegisters, &D= ataInHob->APInfo.VolatileRegisters, sizeof (CPU_VOLATILE_REGISTERS));=0D }=0D =0D /**=0D @@ -761,11 +765,11 @@ ApWakeupFunction ( BistData =3D (UINT32)ApStackData->Bist;=0D =0D //=0D - // CpuMpData->CpuData[0].VolatileRegisters is initialized based on B= SP environment,=0D + // CpuMpData->CpuData[BspNumber].VolatileRegisters is initialized ba= sed on BSP environment,=0D // to initialize AP in InitConfig path.=0D - // NOTE: IDTR.BASE stored in CpuMpData->CpuData[0].VolatileRegisters= points to a different IDT shared by all APs.=0D + // NOTE: IDTR.BASE stored in CpuMpData->CpuData[BspNumber].VolatileR= egisters points to a different IDT shared by all APs.=0D //=0D - RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters, = FALSE);=0D + RestoreVolatileRegisters (&CpuMpData->CpuData[CpuMpData->BspNumber].= VolatileRegisters, FALSE);=0D InitializeApData (CpuMpData, ProcessorNumber, BistData, ApTopOfStack= );=0D ApStartupSignalBuffer =3D CpuMpData->CpuData[ProcessorNumber].Startu= pApSignal;=0D } else {=0D @@ -798,10 +802,10 @@ ApWakeupFunction ( // 1. AP is re-enabled after it's disabled, in either PEI or DXE p= hase.=0D // 2. AP is initialized in DXE phase.=0D // In either case, use the volatile registers value derived from B= SP.=0D - // NOTE: IDTR.BASE stored in CpuMpData->CpuData[0].VolatileRegiste= rs points to a=0D + // NOTE: IDTR.BASE stored in CpuMpData->CpuData[BspNumber].Volatil= eRegisters points to a=0D // different IDT shared by all APs.=0D //=0D - RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters= , FALSE);=0D + RestoreVolatileRegisters (&CpuMpData->CpuData[CpuMpData->BspNumber= ].VolatileRegisters, FALSE);=0D } else {=0D if (CpuMpData->ApLoopMode =3D=3D ApInHltLoop) {=0D //=0D @@ -927,7 +931,7 @@ DxeApEntryPoint ( AsmWriteMsr64 (MSR_IA32_EFER, EferMsr.Uint64);=0D }=0D =0D - RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters, FALS= E);=0D + RestoreVolatileRegisters (&CpuMpData->CpuData[CpuMpData->BspNumber].Vola= tileRegisters, FALSE);=0D InterlockedIncrement ((UINT32 *)&CpuMpData->FinishedCount);=0D PlaceAPInMwaitLoopOrRunLoop (=0D CpuMpData->ApLoopMode,=0D @@ -2151,7 +2155,12 @@ MpInitLibInitialize ( CpuMpData->BackupBufferSize =3D ApResetVectorSizeBelow1Mb;=0D CpuMpData->WakeupBuffer =3D (UINTN)-1;=0D CpuMpData->CpuCount =3D 1;=0D - CpuMpData->BspNumber =3D 0;=0D + if (MpHandOff =3D=3D NULL) {=0D + CpuMpData->BspNumber =3D 0;=0D + } else {=0D + CpuMpData->BspNumber =3D GetBspNumber (MpHandOff);=0D + }=0D +=0D CpuMpData->WaitEvent =3D NULL;=0D CpuMpData->SwitchBspFlag =3D FALSE;=0D CpuMpData->CpuData =3D (CPU_AP_DATA *)(CpuMpData + 1);=0D @@ -2186,11 +2195,11 @@ MpInitLibInitialize ( // Don't pass BSP's TR to APs to avoid AP init failure.=0D //=0D VolatileRegisters.Tr =3D 0;=0D - CopyMem (&CpuMpData->CpuData[0].VolatileRegisters, &VolatileRegisters, s= izeof (VolatileRegisters));=0D + CopyMem (&CpuMpData->CpuData[CpuMpData->BspNumber].VolatileRegisters, &V= olatileRegisters, sizeof (VolatileRegisters));=0D //=0D // Set BSP basic information=0D //=0D - InitializeApData (CpuMpData, 0, 0, CpuMpData->Buffer + ApStackSize);=0D + InitializeApData (CpuMpData, CpuMpData->BspNumber, 0, CpuMpData->Buffer = + ApStackSize * (CpuMpData->BspNumber + 1));=0D //=0D // Save assembly code information=0D //=0D @@ -2615,7 +2624,12 @@ SwitchBSPWorker ( SaveVolatileRegisters (&CpuMpData->BSPInfo.VolatileRegisters);=0D AsmExchangeRole (&CpuMpData->BSPInfo, &CpuMpData->APInfo);=0D RestoreVolatileRegisters (&CpuMpData->BSPInfo.VolatileRegisters, FALSE);= =0D -=0D + //=0D + // Restore VolatileRegs saved in CpuMpData->CpuData=0D + // Don't pass BSP's TR to APs to avoid AP init failure.=0D + //=0D + CopyMem (&CpuMpData->CpuData[CpuMpData->NewBspNumber].VolatileRegisters,= &CpuMpData->BSPInfo.VolatileRegisters, sizeof (CPU_VOLATILE_REGISTERS));=0D + CpuMpData->CpuData[CpuMpData->NewBspNumber].VolatileRegisters.Tr =3D 0;= =0D //=0D // Set the BSP bit of MSR_IA32_APIC_BASE on new BSP=0D //=0D --=20 2.25.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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