From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail05.groups.io (mail05.groups.io [45.79.224.7]) by spool.mail.gandi.net (Postfix) with ESMTPS id 675C7780091 for ; Thu, 20 Jun 2024 14:33:07 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=gA/BU/DkmORKWwBOtAUHdiJ4A4zfk4xx7usxKJDSM4o=; c=relaxed/simple; d=groups.io; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Resent-From:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding:Content-Type; s=20240206; t=1718893987; v=1; b=ugH1rGUw8WkGd0UP0cSSd3lefmpTBR+tXz+PK2n6CEzZxNWaXE5Mg2/4VVhn1owBkPaEsjQl Hbc8SHUiA/EzpALUQhJ/Sq9/Ap4RQnXuRe1EXKkaW9EA62TWMnVz0NV/WXyG0/uhZYPLM6uWYl0 WIhtdaSBfKpH1AvnCuwcHirHDpsCi1W4/CNTfcBVCK3yiV9FScBskE9GvLPm2SppsX4U4IkA0YH 7T4WhVPQ0GGaHDJlAhA5g91PukxaiCaJKTNbK5bZN0harjL5We7ASmMbuzA245ci1EeXsU177SE XpkzGfGeIAM6ivaSj+QpjsJMBgrV7LsyaBA+Ik+wqQ2Xw== X-Received: by 127.0.0.2 with SMTP id Fa4kYY7687511xgkjxarmNnz; Thu, 20 Jun 2024 07:33:05 -0700 X-Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by mx.groups.io with SMTP id smtpd.web10.49172.1718893985364116412 for ; Thu, 20 Jun 2024 07:33:05 -0700 X-Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 45K9v7R6004120; Thu, 20 Jun 2024 14:33:01 GMT X-Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3yv2xuah4j-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 20 Jun 2024 14:33:01 +0000 (GMT) X-Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA05.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 45KEX09e010578 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 20 Jun 2024 14:33:00 GMT X-Received: from qc-i7.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 20 Jun 2024 07:32:57 -0700 From: "Leif Lindholm" To: CC: Ard Biesheuvel , Chuong Tran , Graeme Gregory , Marcin Juszkiewicz , Meenakshi Aggarwal , Nhi Pham , Rebecca Cran , Sami Mujawar , Thomas Abraham , Wenyi Xie Subject: [edk2-devel] [PATCH edk2-platforms 2/5] Platform,Silicon: drop redundant uses of PcdArmArchTimerFreqInHz Date: Thu, 20 Jun 2024 15:32:40 +0100 Message-ID: <20240620143243.460947-3-quic_llindhol@quicinc.com> In-Reply-To: <20240620143243.460947-1-quic_llindhol@quicinc.com> References: <20240620143243.460947-1-quic_llindhol@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-GUID: sIswUD7_gqWGqCi4u_Jn9EvxCfyPjJl5 X-Proofpoint-ORIG-GUID: sIswUD7_gqWGqCi4u_Jn9EvxCfyPjJl5 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Thu, 20 Jun 2024 07:33:05 -0700 Resent-From: quic_llindhol@quicinc.com Reply-To: devel@edk2.groups.io,quic_llindhol@quicinc.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: MbFByLgb41E6nAU97hm0hJoYx7686176AA= Content-Transfer-Encoding: 8bit Content-Type: text/plain X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=ugH1rGUw; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=quicinc.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io PcdArmArchTimerFreqInHz is about to be removed, as it is now obsolete. Some platforms already explicitly set it to 0, which is the default. And some modules reference it in their .inf without actually ever using it. Drop these redundant uses first. Cc: Ard Biesheuvel Cc: Chuong Tran Cc: Graeme Gregory Cc: Marcin Juszkiewicz Cc: Meenakshi Aggarwal Cc: Nhi Pham Cc: Rebecca Cran Cc: Sami Mujawar Cc: Thomas Abraham Cc: Wenyi Xie Signed-off-by: Leif Lindholm --- Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc | 5 ----- Silicon/NXP/NxpQoriqLs.dsc.inc | 3 --- Platform/ARM/JunoPkg/ArmJuno.dsc | 6 ------ Platform/Hisilicon/D03/D03.dsc | 8 -------- Platform/Hisilicon/D06/D06.dsc | 8 -------- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 5 ----- Platform/Hisilicon/D03/Library/HisiOemMiscLib2P/HisiOemMiscLib2PHi1610.inf | 1 - Platform/Hisilicon/D05/Library/HisiOemMiscLibD05/HisiOemMiscLibD05.inf | 1 - Platform/Hisilicon/D06/Library/HisiOemMiscLibD06/HisiOemMiscLibD06.inf | 1 - Silicon/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf | 1 - Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf | 1 - 11 files changed, 40 deletions(-) diff --git a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc index eb6caf37a3c5..1f705c68579a 100644 --- a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc +++ b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc @@ -458,11 +458,6 @@ [PcdsFixedAtBuild.common] gArmTokenSpaceGuid.PcdGicDistributorBase|0x100100000000 gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x100100140000 - # - # ARM Architectural Timer Frequency - # - # Set it to 0 so that the code will read frequence from register - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0 gEmbeddedTokenSpaceGuid.PcdMetronomeTickPeriod|1000 # diff --git a/Silicon/NXP/NxpQoriqLs.dsc.inc b/Silicon/NXP/NxpQoriqLs.dsc.inc index 920d2f6c4ddf..21549dc20aa7 100644 --- a/Silicon/NXP/NxpQoriqLs.dsc.inc +++ b/Silicon/NXP/NxpQoriqLs.dsc.inc @@ -290,9 +290,6 @@ [PcdsFixedAtBuild.common] gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 - # Timer - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0 - # We want to use the Shell Libraries but don't want it to initialise # automatically. We initialise the libraries when the command is called by the # Shell. diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc index 1ca43b9e7dba..93ec9f129972 100644 --- a/Platform/ARM/JunoPkg/ArmJuno.dsc +++ b/Platform/ARM/JunoPkg/ArmJuno.dsc @@ -191,12 +191,6 @@ [PcdsFixedAtBuild.common] # List of Device Paths that support BootMonFs gArmBootMonFsTokenSpaceGuid.PcdBootMonFsSupportedDevicePaths|L"VenHw(DE6AE758-D662-4E17-A97C-4C5964DA4C41,00)" - # - # ARM Architectural Timer Frequency - # - # Set to 0 so ArmArchTimerLib will read its value from CNTFRQ_EL0 - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0 - gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE # diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index 66c2bb31a5ef..e70dc97ee894 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -191,14 +191,6 @@ [PcdsFixedAtBuild.common] gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xFE000000 gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x4D100000 - # - # ARM Architectual Timer Frequency - # - # Set it to 0 so that the code will read frequence from register and be - # adapted to 66M and 50M boards - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0 - - gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 } diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc index f8a8dad01a0e..6e0fcf633404 100644 --- a/Platform/Hisilicon/D06/D06.dsc +++ b/Platform/Hisilicon/D06/D06.dsc @@ -167,14 +167,6 @@ [PcdsFixedAtBuild.common] gArmTokenSpaceGuid.PcdGicRedistributorsBase|0xAE100000 gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x9B000000 - - - # - # ARM Architectual Timer Frequency - # - # Set it to 0 so that the code will read frequency from register and be - # adapted to 100M and 50M boards - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0 gEmbeddedTokenSpaceGuid.PcdTimerPeriod|10000 diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 4fea9a0d6380..9306986bf7c0 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -415,11 +415,6 @@ [PcdsFixedAtBuild.common] ## 0-PCANSI, 1-VT100, 2-VT00+, 3-UTF8, 4-TTYTERM gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 - # - # ARM Virtual Architectural Timer -- fetch frequency from QEMU (TCG) or KVM - # - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0 - gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE diff --git a/Platform/Hisilicon/D03/Library/HisiOemMiscLib2P/HisiOemMiscLib2PHi1610.inf b/Platform/Hisilicon/D03/Library/HisiOemMiscLib2P/HisiOemMiscLib2PHi1610.inf index a91444c71dcb..59887f2b1029 100644 --- a/Platform/Hisilicon/D03/Library/HisiOemMiscLib2P/HisiOemMiscLib2PHi1610.inf +++ b/Platform/Hisilicon/D03/Library/HisiOemMiscLib2P/HisiOemMiscLib2PHi1610.inf @@ -39,7 +39,6 @@ [Ppis] [Pcd] gHisiTokenSpaceGuid.PcdTrustedFirmwareEnable - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz [FixedPcd.common] diff --git a/Platform/Hisilicon/D05/Library/HisiOemMiscLibD05/HisiOemMiscLibD05.inf b/Platform/Hisilicon/D05/Library/HisiOemMiscLibD05/HisiOemMiscLibD05.inf index f223097ba8d4..b635dde51f7d 100644 --- a/Platform/Hisilicon/D05/Library/HisiOemMiscLibD05/HisiOemMiscLibD05.inf +++ b/Platform/Hisilicon/D05/Library/HisiOemMiscLibD05/HisiOemMiscLibD05.inf @@ -38,7 +38,6 @@ [Ppis] gEfiPeiReadOnlyVariable2PpiGuid ## SOMETIMES_CONSUMES [Pcd] - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz gHisiTokenSpaceGuid.PcdIsMPBoot gHisiTokenSpaceGuid.PcdSocketMask gHisiTokenSpaceGuid.PcdTrustedFirmwareEnable diff --git a/Platform/Hisilicon/D06/Library/HisiOemMiscLibD06/HisiOemMiscLibD06.inf b/Platform/Hisilicon/D06/Library/HisiOemMiscLibD06/HisiOemMiscLibD06.inf index 0d030950ee54..01ff51feb9f2 100644 --- a/Platform/Hisilicon/D06/Library/HisiOemMiscLibD06/HisiOemMiscLibD06.inf +++ b/Platform/Hisilicon/D06/Library/HisiOemMiscLibD06/HisiOemMiscLibD06.inf @@ -39,7 +39,6 @@ [Ppis] gEfiPeiReadOnlyVariable2PpiGuid ## SOMETIMES_CONSUMES [Pcd] - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz gHisiTokenSpaceGuid.PcdIsMPBoot gHisiTokenSpaceGuid.PcdSocketMask gHisiTokenSpaceGuid.PcdTrustedFirmwareEnable diff --git a/Silicon/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf b/Silicon/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf index 4b6609a66f50..43c596169fdd 100644 --- a/Silicon/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf +++ b/Silicon/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf @@ -45,7 +45,6 @@ [Guids] [FixedPcd] gArmPlatformTokenSpaceGuid.PcdCoreCount - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz [Depex] gEfiSmbiosProtocolGuid AND diff --git a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf index 895d72fc040f..433720f12900 100644 --- a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf +++ b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf @@ -47,7 +47,6 @@ [Protocols] [Pcd] gHisiTokenSpaceGuid.PcdCPUInfo - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz [Guids] -- 2.39.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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