From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail05.groups.io (mail05.groups.io [45.79.224.7]) by spool.mail.gandi.net (Postfix) with ESMTPS id 9662DD8026E for ; Tue, 9 Jul 2024 13:33:38 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=9wsa+/2iYaeooUn98+XCZg2Vd6oPrQyBNZYMSF9YCqM=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Resent-From:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Transfer-Encoding; s=20240206; t=1720532018; v=1; b=zecoDtxcD/utMG1x/RqGic1J/i2REQaiI3gZNXwv0kAg4dC6sjmSHbagbjucYrELJDOT3anb 16fqCdiX2DTpGLvtKvW+czoZbCXN2qPn91WyIlbjl+JLy3WE1Z5ufAfetSx+N7SBKMATVRDmo2h s4lIWbrbwsr7vgCSxY/UebkkEWksAh7ncOZTGOsMvSkLCyZfjDQLMifQwVS54ffnLUEyiu+gc9T EMIr0xwAvsXxBui03BJIygfIDMsV/270QE66+81QNCW2lTQDf0NxhL1SIWCjw6XPqAnonwUUxkD 3XpqKTUhq4kVgEOS2leqfzx/zlVpfCqNxAbjHCVyYvGvQ== X-Received: by 127.0.0.2 with SMTP id IJBnYY7687511x14oz2ipJBI; Tue, 09 Jul 2024 06:33:37 -0700 X-Received: from mail-il1-f179.google.com (mail-il1-f179.google.com [209.85.166.179]) by mx.groups.io with SMTP id smtpd.web10.11984.1720528681792210240 for ; Tue, 09 Jul 2024 05:38:02 -0700 X-Received: by mail-il1-f179.google.com with SMTP id e9e14a558f8ab-37636c3872bso20232305ab.3 for ; Tue, 09 Jul 2024 05:38:01 -0700 (PDT) X-Gm-Message-State: JFPWF67c58Ov3u9nmZru0N6Qx7686176AA= X-Google-Smtp-Source: AGHT+IHMgVaBy7sb98P4cIxYwK0kq0K8MViTNg6NZIl85AFsAiCEqf7ynIserUx27H8T6GEkjTWq+A== X-Received: by 2002:a05:6e02:1d96:b0:374:ada1:296b with SMTP id e9e14a558f8ab-38a572134d7mr26324805ab.8.1720528679475; Tue, 09 Jul 2024 05:37:59 -0700 (PDT) X-Received: from localhost.localdomain ([47.246.98.206]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70b439b9555sm1675664b3a.198.2024.07.09.05.37.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Jul 2024 05:37:57 -0700 (PDT) From: Evan Chai X-Google-Original-From: Evan Chai To: devel@edk2.groups.io Cc: Evan Chai , Andrei Warkentin , Sunil V L , Yong Li Subject: [edk2-devel] [PATCH V2 1/2] RiscVQemuServerPlatform: Initial commit for RISC-V Qemu-based Server platform Date: Tue, 9 Jul 2024 20:37:26 +0800 Message-ID: <20240709123730.1694-2-evan.chai@linux.alibaba.com> In-Reply-To: <20240709123730.1694-1-evan.chai@linux.alibaba.com> References: <20240709123730.1694-1-evan.chai@linux.alibaba.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Tue, 09 Jul 2024 06:33:35 -0700 Resent-From: evanchai91@gmail.com Reply-To: devel@edk2.groups.io,evanchai91@gmail.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=zecoDtxc; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=gmail.com (policy=none) Leveraging RiscVVirt code, this initial commit establishes the foundational framework for the first phase of the RISC-V Qemu-based Server platform. Cc: Andrei Warkentin Cc: Sunil V L Cc: Yong Li Signed-off-by: Evan Chai --- Platform/Qemu/RiscVQemuServerPlatform/Documents/Media/RISC-V_Platform_EDK2_Firmware_Enabling_Philosophy.jpg | Bin 0 -> 329871 bytes Platform/Qemu/RiscVQemuServerPlatform/Readme.md | 355 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.dsc | 489 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.dsc.inc | 341 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.fdf | 315 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.fdf.inc | 41 +++++++++++++++++++++++++++++++++++++++++ Platform/Qemu/RiscVQemuServerPlatform/VarStore.fdf.inc | 72 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 7 files changed, 1613 insertions(+) diff --git a/Platform/Qemu/RiscVQemuServerPlatform/Documents/Media/RISC-V_Platform_EDK2_Firmware_Enabling_Philosophy.jpg b/Platform/Qemu/RiscVQemuServerPlatform/Documents/Media/RISC-V_Platform_EDK2_Firmware_Enabling_Philosophy.jpg new file mode 100644 index 0000000000000000000000000000000000000000..e94ab4dd38bcb9d5cfe930dae91f9e34f485eb45 GIT binary patch literal 329871 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0.1 | Initial release : create RISC-V UEFI server reference board | [Evan Chai](evan.chai@intel.com) | Mar 2024 | +| | 0.2 | | | | + + +## INDEX +* 1 [Overview](#1-Overview) +* 2 [Server SOC Reference Model](#2-Server-SOC-Reference-Model) +* 3 [Boot Flow](#3-Boot-Flow) +* 4 [Verification](#4-Verification) +* 5 [Pending Tasks](#5-Pending-Tasks) +* 6 [Known Issues](#6-Known-Issues) +* 7 [Appendix](#7-Appendix) + + +## 1 Overview +### 1.1 References +* UEFI Specification v2.10: https://uefi.org/sites/default/files/resources/UEFI_Spec_2_10_Aug29.pdf +* UEFI PI Specification v1.8.0: https://uefi.org/sites/default/files/resources/UEFI_PI_Spec_1_8_March3.pdf +* ACPI Specification v6.5: https://uefi.org/sites/default/files/resources/ACPI_Spec_6_5_Aug29.pdf +* OpenSbi Specification: https://github.com/riscv-software-src/opensbi +* BRS Specification: https://github.com/riscv-non-isa/riscv-brs +* Device Tree Specification v0.4: https://www.devicetree.org/ +* Smbios Specification v3.7.0: https://www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.7.0.pdf +* Server Soc Specification: https://github.com/riscv-non-isa/server-soc +* Server Platform Specification: https://github.com/riscv-non-isa/riscv-server-platform + +### 1.2 Target Audience +This document is intended for the following readers: +* IHVs and OSVs who actively engaged in the building of the RISC-V ecosystem, serving as a vital component in the vertical integration of systems. +* Bios developers, either those who create general-purpose BIOS and other firmware products or those who modify these products for use in various vendor architecture-based products. +* Other stakeholders who are interested in the RISC-V platform and have firmware development needs. + +### 1.3 Terminology + +| Term | Description +|:-------------------- |:------------------------- +| UEFI | Unified Extensible Firmware Interface +| SBI | Supervisor Binary Interface +| BRS | Boot and Runtime Services +| BMC | Baseboard Management Component BMC's main function is to automatically monitor the system platform management events, the events recorded in the system event log. +| OOB | Out of Band +| RVI | [RISC-V International](https://riscv.org/) +| RISE | [RISC-V Software Ecosystem](https://wiki.riseproject.dev/display/HOME/About+RISE) +| SCT | UEFI Self Certification Tests +| FWTS | Firmware Test Suite +| SPL | U-Boot Second Program Loader +| SAL | System Abstraction Layer + + +## 2 Server SOC Reference Model +This chapter introduces the hardware-level topology of ‘ssoc_ref’, allowing users to gain insights into the device list and resource allocation under this model. + +### 2.1 Requirements +This qemu virtual machine (server soc reference board) is required to be compliant with RISC-V [Server SOC Spec](https://github.com/riscv-non-isa/server-soc) (the commit id at writing this doc is aec20046c35b108f76a11a751f754505aaad7800) as much as possible. + +#### Table 1 Server SOC Requirement + +| Items | Requirements | On qemu reference board (1st version)| Future Plan +|:-------------------- |:-------------------------|:-------------------- |:------------------------- +| 2.1. Clocks and Timers | time CSR | supported +| 2.2. External Interrupt Controllers | AIA | supported with non-upstream patches +| 2.3. Input-Output Memory Management Unit (IOMMU) | RISC-V IOMMU spec | no support (need qemu/linux patches) | Yes +| 2.4. PCIe Subsystem Integration | PCIe features | supported using existing qemu implementation | +| 2.5. Reliability, Availability, and Serviceability (RAS) | The level of RAS implemented by the SoC is UNSPECIFIED | not considered +| 2.6. Quality of Service | capacity and bandwidth controller register interface (CBQRI), etc. | not considered | +| 2.7. Manageability | BMC | no support | TBD +| 2.8. Performance Monitoring | HPM counters | supported | +| 2.9. Security Requirements | On PCIe, off-chip DRAM and TPM | no support (follow qemu existing features) | Yes (for TPM) +| Harts features | (removed from this spec) | support the previous stated hart features | + + +### 2.2 High Level Design +The Implementation Choices +* Make the configuration as fixed as possible so that this new machine is easy-to-go and less confusing. +* Remove the unnecessary devices as many as possible, e.g. CLINT/PLIC are removed. +* Keep the MemMap entries as similar as RiscVVirt vm for easy adoption at the early stage. +* Keep dtb entries as small as possible. +#### Table 2 Devices and Memory Mappings + +| Devices | Base Addr | Size | Comment +|:-------------------- |:-------------------------|:-------------------- |:------------------------- +| MROM | 0x1000 | 0xf000 | +| TEST | 0x100000 | 0x1000 | For reset function (name misleading?) +| RTC | 0x101000 | 0x1000 | +| ACLINT | 0x2000000 | 0x10000 | aclint mtimer (spec definition missed) +| PCIE_PIO | 0x3000000 | 0x10000 | +| APLIC_M | 0xc000000 | APLIC_SIZE(SSOC_CPUS_MAX) | fixed AIA +| APLIC_S | 0xd000000 | APLIC_SIZE(SSOC_CPUS_MAX) | +| UART0 | 0x10000000 | 0x100 | +| FW_CFG | 0x10200000 | 0x18 | depend on ACPI support on firmware +| FLASH | 0x20000000 | 0x4000000 | +| IMSIC_M | 0x24000000 | SSOC_IMSIC_MAX_SIZE | +| IMSIC_S | 0x28000000 | SSOC_IMSIC_MAX_SIZE | +| PCIE_ECAM | 0x30000000 | 0x10000000 | +| PCIE_MMIO | 0x40000000 | 0x40000000 | +| DRAM | 0x80000000 | 0xff80000000ull (max) | still one continuous range +| VIRT64_HIGH_PCIE_MMIO | 0x10000000000ull | 0x10000000000ull | different from RiscVVirt +| AHCI | Handled as the PCIe device | | +| EHCI | Handled as the PCIe device | | +| IOMMU | to be decided | | patch yet to integrate (kernel/qemu/…) + +### 2.3 Qemu/Guest FW Interface +#### Hardcode Addresses +It's possible qemu and guest have no explicit interface about some information, e.g. address of specific devices, but both of them hardcodes the same address to access the device. + +## 3 Boot Flow +The following diagram illustrates various platform initialization scenarios. This document will not cover the detailed work of initializing on real hardware platforms, as it is beyond its scope. Our focus will be on the more general firmware initialization tasks performed on the qemu emulator. See the part of the diagram indicated by the blue color, which corresponds to QemuServerPlatform Boot Flow. + +Note: _For specifics on the qemu Server SOC reference model in this document, it is essential to consult both the latest developments in the qemu source code and the definition in the server platform specifications. Relevant information for both can be obtained from Server SOC TG and Server Platform TG of RVI.c_ + +#### Figuire 1 RISC-V Platform EDK2 Firmware Enabling Philosophy + +![RISC-V_Platform_EDK2_Firmware_Enabling_Philosophy](Documents/Media/RISC-V_Platform_EDK2_Firmware_Enabling_Philosophy.jpg) + +### 3.1 The Traditional Boot Flow + +[PI Architecture Firmware Phases](https://uefi.org/specs/PI/1.8/V2_Overview.html#pi-architecture-firmware-phases) shows the phases that a platform with PI Architecture firmware will execute. + +#### Figuire 2 PI Architecture Firmware Phases + +![PI_Boot_Phases](https://uefi.org/specs/PI/1.8/_images/V2_Overview-2.png) + +_In a PI Architecture firmware implementation, the phase executed prior to DXE is PEI. This specification covers the transition from the PEI to the DXE phase, the DXE phase, and the DXE phase’s interaction with the BDS phase. The DXE phase does not require a PEI phase to be executed. The only requirement for the DXE phase to execute is the presence of a valid HOB list. There are many different implementations that can produce a valid HOB list for the DXE phase to execute. The PEI phase in a PI Architecture firmware implementation is just one of many possible implementations._ + +Based on the content quoted from the PI specification above, it is evident that the PEI phase is merely a traditional and integral part of the UEFI boot flow. In actual PI Architecture firmware implementations, it is not mandatory. Currently, the primary purpose of the PEI Phase is to perform memory initialization and pass necessary HOBs to DXE. + +For the former, the alternative solution for the former involves the implementation of OOB firmware, which is currently beyond the scope of this document. Regarding the latter, we can move more works for building Hand-Off Blocks (HOBs) to the SEC phase. All of these considerations collectively contribute to providing additional insights and flexibility for the practical initiation of hardware. + +### 3.2 Alternative Boot Flow +The boot flow without the PEI phase, also known as the Pei-Less flow, is the initialization approach that will be further discussed in this document. Detailed standards for Pei-Less can be obtained from RISE's Firmware TG.(See [Boot Flow](https://wiki.riseproject.dev/display/HOME/EDK2_00_18+-+RISC-V+QEMU+Server+Reference+Platform?preview=/25395218/25395220/EDK2%20implementation%20choices%20for%20RISC-V%20platforms.pdf) in Project No. EDK2_00_18) + +#### 3.2.1 SEC Phase +See [HOB Translations](https://uefi.org/specs/PI/1.8/V2_DXE_Foundation.html#hob-translations) for more information on HOB types. + +#### Figuire 3 HOB List +![V2_DXE_Foundation-2](https://uefi.org/specs/PI/1.8/_images/V2_DXE_Foundation-2.png) + +The HOBs list, as mandated by the PI specification, is illustrated in Figure 2.3. It is recommended to refer to the SecMain structure in RiscVVirt for guidance. + +Figure 2.3 displays the HOBs list, a prerequisite set by the PI specification for readiness before entering the DXE phase. For additional insights, it is recommended to refer to the SecMain module in RiscVVirt. + +Regarding memory initialization, specific details are intentionally omitted in this document. The recommended strategy involves the use of OOB firmware, like SPL. This provides input to the System Memory HOB generated by the UEFI firmware during the SEC phase, and the input for HOB is extracted from static data in the device tree, including entries like 'memory' by AddMemoryBaseSizeHob() and 'reserved-memory BuildMemoryAllocationHob().' + +The creation of HOBs for IO, MMIO, and other resources provides SOC vendors with the flexibility to customize according to their chip specifications. The PopulateIoResources() function provides a straightforward approach to achieve this customization. + +It is essential to emphasize that RiscVVirt adopts a separate Flash Descriptor (FD) approach for firmware code and Variables. The advantage is clear as it allows for the protection of the firmware code by setting it as read-only, while conferring write permissions exclusively to the Variable FD, effectively ensuring the security of the firmware. Particularly, this approach provides convenient and flexible control, especially when dealing with firmware upgrade actions in the future. Of course, in qemu-based firmware development, virtualizing two or even more flashes is extremely straightforward. However, it's worth mentioning that in many real hardware platforms, the single-flash configuration is more common, and further elaboration on this point is not necessary here. + +In the upcoming server platform solution, we will continue to adopt a similar approach as RiscVVirt. However, there is a slight difference in the treatment of the Variable FD. + +#### 3.2.2 DXE Phase +The following table supplements the missing implementation details in Table 2.5 of the PI specification. The DXE Foundation is abstracted from the platform through the DXE Architectural Protocols. The DXE Architectural Protocols manifest the platform-specific components of the DXE Foundation. DXE drivers that are loaded and executed by the DXE Dispatcher component of the DXE Foundation must produce these protocols. + +For implementations outside of the EmbeddedPkg solutions, please follow the guidance outlined in the table. + + +#### Table 3 DXE Architectural Protocols +| Protocol Name | Driver Path in use | Driver Compatibility **1** | Task required | +| ------------------------------------ | ------------------------------------------------------------ | -------------------------- | ------------------------------------------------------------ | +| Security Architectural | MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf | Platform independent | no extra work | +| CPU Architectural | UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf | Platform dependent | no extra work | +| Metronome Architectural | EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf (**Note**: Precision in the EmbeddedPkg version is limited to microseconds, whereas the MdeModulePkg version offers precision down to nanoseconds.) | Platform dependent | no extra work | +| Timer Architectural | UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf (**Note**: In S mode, utilize the TIME CSR for implementing GetTimer, and achieve SetTimer by the ‘Set Timer’ interface of SBI Timer Extension 6.1. Please note that the Runtime type of timer service isn’t presently supported yet. Runtime type of timer service will be produced by RealTimeClock.) | Platform dependent | no extra work | +| BDS Architectural | MdeModulePkg/Universal/BdsDxe/BdsDxe.inf | Platform independent | no extra work | +| Watchdog Timer Architectural | MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf (**Note**: It depends on TimerLib and ResetLib, the implementation of which is typically determined by the different CPU architectures.) | Platform independent | no extra work | +| Runtime Architectural | MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf (**Note**: Some functionalities in the RISC-V version of CacheMaintenanceLib are still under development.) | Platform independent | need to complete the remaining functions of CacheMaintenanceLib. | +| Variable Architectural | MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf (**Note**: The dependency issue on VirtNorFlashDxe in RiscVVirt should be fixed. ) | Platform independent | need to clean up 'APRIORI DXE' | +| Variable Write ArchitecturalProtocol | MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf | Platform independent | no extra work | +| Monotonic Counter Architectural | MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf | Platform independent | no extra work | +| Reset Architectural | MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf (**Note**: ResetSystemLib implements warm reset, cold reset, and shutdown through the SBI interface.) | Platform independent | no extra work | +| Real Time Clock Architectural | EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf (**Note**: Some features in RealTimeClockLib remain unimplemented, including GetWakeUpTime/SetWakeUpTime. The present RealTimeClockLib is specifically designed for qemu; future adaptations should implement their own RTC timer based on the platform's needs.) | Platform dependent | no extra work | +| Capsule Architectural Protocol | MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf (**Note**: It depends on CacheMaintenanceLib and ResetLib.) | Platform independent | no extra work | + +Note: *1.The 'Driver Compatibility, task required' column addresses platform dependencies exclusively at the DXE driver level. The platform-specificity of the consumed libraries does not influence the conclusion.* + +#### 3.2.3 Network Stack +The Server SOC model currently in use, 'rvsp-ref,' comes with e1000 as the default NIC device. However, as this device lacks an integrated UEFI UNDI driver, it cannot provide the foundational services to enable the network. From a testing perspective, here are two recommended steps： +* Build UndiRuntimeDxe to your firmware FD, with the following patch: edk2-platforms/Drivers/OptionRomPkg/UndiRuntimeDxe/UndiRuntimeDxe.inf +* Append NIC ‘i82557b’ to the qemu command line. See the reference command in Chapter 4. + +From a product implementation perspective, it is not recommended to directly use UndiRuntimeDxe as the provider for the UNDI services. It is more appropriate to provide the UNDI services based on the NIC device integrated into the platform. + +### 3.3 Extra work for Fdt-to-OS +The DXE Foundation produces the UEFI System Table, and the UEFI System Table is consumed by every DXE driver and executable image invoked by the DXE Dispatcher and BDS. It contains all the information required for these components to utilize the services provided by the DXE Foundation and the services provided by any previously loaded DXE driver. [UEFI System Table and Related Components](https://uefi.org/specs/PI/1.8/V2_DXE_Foundation.html#uefi-system-table-and-related-components) shows the various components that are available through the UEFI System Table. + +#### Figuire 4 UEFI System Table and Related Components +![V2_DXE_Foundation-3](https://uefi.org/specs/PI/1.8/_images/V2_DXE_Foundation-3.png) + +As shown in figure 9.2, the UEFI Configuration Tables are an extensible list of tables that describe the configuration of the platform. Today, this includes pointers to tables such as DXE Services, the HOB list, ACPI table, SMBIOS table, and the SAL System Table. This list may be expanded in the future as new table types are defined. + +Due to the broad usage of device trees in embedded firmware products, several chip manufacturers in the upstream and downstream supply chains use static data from the device tree to initialize specific peripherals. For compatibility reasons, it is essential to install the device tree pointer into the system configuration table. Two DXE drivers are available as references: + +#### Table 4 The Proposal for FdtTabGuid +|Table Guid |Driver Path in use |Comments| +|:-------------------- |:-------------------------|:--------------------| +|gFdtTableGuid |EmbeddedPkg/Drivers/FdtClientDxe/FdtClientDxe.inf |Using in RiscVVirt| +|gFdtTableGuid |Silicon/RISCV/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf |The streamlined DXE driver can also meet if no required for FdtClientProtocl| + +### 3.4 DT File Decoding +The DXE driver FdtClientDxe, mentioned in the previous section, supplies a limited set of APIs for parsing DT binary, handling fundamental DT data extraction tasks. + +Users with more advanced demands can turn to another DXE service produced by [FdtBusPkg](https://github.com/intel/FdtBusPkg), which offers an extensive array of APIs to meet the requirements of more complex scenarios. Detailed information is accessible in the firmware TG of RISE community (Project No. [EDK2_00_03](https://wiki.riseproject.dev/display/HOME/Firmware+Projects)), and the source code is available from [FdtBusPkg](https://github.com/intel/FdtBusPkg) repository. It will be upstreamed to the [edk2](https://github.com/tianocore/edk2) repository in the future, and any suggestions or requirements for improvement are encouraged before this transition. + +### 3.5 OpenSbi +It is recommended to align with the version of OpenSBI in the [RISC-V BRS Development Suite Repository](https://github.com/intel/rv-brs-test-suite). The binary file can be found at the following path: ./rv-brs-test-suite/brsi/scripts/opensbi/build/platform/generic/firmware/fw_dynamic.bin + +__Or build it by the command example1__: +``` +cd opensbi +make ARCH=riscv CROSS_COMPILE=riscv64-linux-gnu- PLATFORM=generic +``` +### 3.6 OS Image +Similarly, the BRS Repo offers an OS image based on RISC-V. To validate the boot flow, you can make use of the prebuilt images located in the test suite at /rv-brs-test-suite/brsi/prebuilt_images/. For those interested in building their own image, please refer to the repository guidance for detailed steps. + +## 4 Verification +The tests covered in this document are based on the BRS spec, focusing on two primary modules: SCT and FWTS. The relevant test scripts, pre-build image and guidance can be obtained from the [RISC-V BRS Development Suite Repository](https://github.com/intel/rv-brs-test-suite): + +__Command example2__: +``` + ./qemu-system-riscv64 -nographic -m 8G -smp 2 \ + -machine rvsp-ref,pflash0=pflash0,pflash1=pflash1 \ + -blockdev node-name=pflash0,driver=file,read-only=on,filename=$FW_DIR/RISCV_SP_CODE.fd \ + -blockdev node-name=pflash1,driver=file,filename=$FW_DIR/RISCV_SP_VARS.fd \ + -bios $Sbi_DIR/fw_dynamic.bin \ + -drive file=$Img_DIR/brs_live_image.img,if=ide,format=raw +``` + +__Note__: +* _‘rvsp-ref’ is a specified qemu-based SOC model, whose source code is still under development and will be accessible from the RVI staging repository later._ +* _The Pre-build image ‘brs_live_image.img,if’ can be downloaded in RISC-V BRS Development Suite repository, or you can build it by yourself. See 3.6_ +* _‘-bios $Sbi_DIR/fw_dynamic.bin’ the parameter points to the opensbi path. See more in 3.5._ + +In general, a series of modules related to Network are enabled by default. However, during SCT test execution, it is noticed that most Network test items fail to pass. The most likely reason is the lack of a UNDI driver built in the current platform firmware codebase. So, if you intend to enable the edk2 network stack with QEMU in the boot flow, it is suggested to use the following command: + +__Command example3__: +``` + Command example2 \ + -device i82557b,netdev=net2 \ + -netdev type=user,id=net2 +``` + +## 5 Pending Tasks +The listed items in the table represent ongoing firmware development tasks that are still unfinished. Some specifications are in the process of refinement, and a few are yet to be drafted. Please refer to subsequent updates from the RISE community for more information. +### 5.1 Bios Requirements and TODOs + +#### Table 5-1 Bios Requirements +| ID | Requirements/TODOs | Comment | +| ---- | ------------------------------ | ------------------------------------------------------------ | +| 1 | 'APRIORI DXE' cleaning up | Usage of 'APRIORI DXE' syntax is strictly forbidden going forward, regardless of the rationale. | +| 2 | Implement a generic ECAM model | Support for RC configuration via PCDs, DT properties, or any other form of input. | +| 3 | ACPI enabling | The establishment of all ACPI tables is currently achieved through qemu, leveraging a series of libraries such as QemuFwCfgLib to interact with the Linux kernel. The following task is to implement the publishment of all ACPI tables solely through firmware. | +| 4 | Smbios enabling | The upcoming tasks for SMBIOS should be handled exclusively through firmware publishment, replacing the existing qemu method entirely. | +| 5 | FWTS test | Upon the completion of tasks 3 and 4, the pass ratio for FWTS should be maintained at a specific benchmark. | +| 6 | Security | Not started | +| 7 | TPM | Not started | + +### 5.2 UEFI Implementation and TODOs + +#### Table 5-2 Upcoming UEFI Features List + +| Task Category | Task Description | Comments | +|------------------------------|-----------------------------------------------------------|-------------------------------------------------------------------------| +| \# Enable Non-Virtio devices | 1. Add Memory mapped AHCI controller, to enable SATA device | Inlcude drivers for AHCI and Sata, eg: OvmfPkg/SataControllerDxe/SataControllerDxe.inf MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf | +| | 2. Add Memory mapped EHCI/XHCI controller to enable USB devices | Inlcude drivers for AHCI and Sata, eg: OvmfPkg/SataControllerDxe/SataControllerDxe.inf MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf | +| | 3. Clean-up OVMF version of the NOR flash DXE driver, which supports QEMU's NOR flash emulation | Existing OVMF Norflash driver will cause some BRS related cases’ failure, this takes includes the code clean-up and bug fixes to the existing Norflash drvier in OVMF: ExitBootServicesTestVariable * 1, BS.GetNextMonotonicCount * 3, RT.SetVariable - Non-volatile variable after system reset * 4, RT.SetTime - Verify xx after change * 8 | +| | 4. Enable non-virtio network, eg: E1000E NIC | This may depend on QEMU side implementation, and the server platform spec requirement, can take it as low priority and use virtio-net first. | +| | 5. Enable non-virto VGA display | This may depend on QEMU side implementation, and the server platform spec requirement, can take it as low priority and use virtio-gpu first. | +| \# Add initial support for static ACPI tables | 6. Add the DSDT, FADT, GTDT, SPCR tables for ServerPlatform-Ref platform, | This can refer to SBSA’s implementation https://github.com/tianocore/edk2-platforms/commit/4476e34cf93458e0ea84820fb88e82a2997e5075 | +| | 7. Handle EHCI and XHCI in DSDT, not to try to initialize non-existing hardware | This can refer to SBSA’s implementation https://www.mail-archive.com/devel@edk2.groups.io/msg64706.html | +| \# Add SMBIOS tables | 8. Add SMBIOS tables by referencing ArmPkg/Universal/Smbios, set PcdSmbiosVersion to the version as required by RISCV server platform spec | Refer to https://github.com/tianocore/edk2-platforms/commit/c2016d9b6836acc27df939f0cccffe61c1bac492 | +| | 9. Add implementation that provides the system information. The serial numbers, asset tags etc. are currently all fixed strings, to allow fwts to pass without errors. | Refer to https://github.com/tianocore/edk2-platforms/tree/master/Platform/Qemu/SbsaQemu/OemMiscLib | +| \# Move drivers toward to FdtBusPkg-based implementation (This will not be 1st priority) | 10. Verify and replace the OVMF Norflash driver to device tree-based Norflash driver | Refer to https://github.com/intel/FdtBusPkg | +| | 11. Verify and replace the PCI root bridge driver to device tree-based PCI root bridge driver | Refer to https://github.com/intel/FdtBusPkg | +| \# MSIC | 12. Initiate the design by Intel, keep ReadMe.md update with partner | Refer to https://github.com/tianocore/edk2-platforms/blob/master/Platform/Qemu/SbsaQemu/Readme.md | +| | | | + +## 6 Known Issues + +The following table outlines the current known issues, which will be resolved gradually during the subsequent phases of development. + +#### Table 6 Known Issues +| No. | Issue Description | Cause | Comment | +| ---- | --------------------------- | -------------------------------------------- | --------------------- | +| 1 | Graphic device doesn’t work | ‘rvsp-ref’ doesn’t provide a default GPU yet | Will do in next phase | +| 2 | ACPI/Smbios don’t work | Not firmware implementation | Will do in next phase | + +## 7 Appendix + + + +### 7.1 Building and running based on BRS environment + +1. Build brs test suit +``` +git clone https://github.com/intel/rv-brs-test-suite.git +``` + +Please refer to detailed build steps from [README.md](https://github.com/intel/rv-brs-test-suite/blob/main/README.md), then you will get the following stuff: +``` + QEMU_DIR=$WORKSPACE/rv-brs-test-suite/brsi/scripts/qemu/build + BRS_IMG_DIR=$WORKSPACE/rv-brs-test-suite/brsi/scripts/output + OPENSBI_DIR=$WORKSPACE/rv-brs-test-suite/brsi/scripts/opensbi/build/platform/generic/firmware + EDK2_DIR=$WORKSPACE/rv-brs-test-suite/brsi/scripts/Build/RiscVQemuServerPlatform/DEBUG_GCC5/FV +``` + +2. Boot Execution(See Command example2) +``` +$QEMU_DIR/qemu-system-riscv64 \ + -machine rvsp-ref,pflash0=pflash0,pflash1=pflash1 \ + -blockdev node-name=pflash0,driver=file,read-only=on,filename=$EDK2_DIR/RISCV_SP_CODE.fd \ + -blockdev node-name=pflash1,driver=file,filename=$EDK2_DIR/RISCV_SP_VARS.fd \ + -bios $OPENSBI_DIR/fw_dynamic.bin \ + -drive file=$BRS_IMG_DIR/brs_live_image.img,if=ide,format=raw +``` +### 7.2 Compiling edk2 firmware separately outside of BRS +1. Building the RISC-V edk2 server platform + +``` +git clone https://github.com/tianocore/edk2.git +cd edk2 +git submodule update --init +cd .. + +git clone https://github.com/tianocore/edk2-platforms.git +cd edk2-platforms +git submodule update --init +cd .. + +export WORKSPACE=`pwd` +export GCC5_RISCV64_PREFIX=riscv64-linux-gnu- +export PACKAGES_PATH=$WORKSPACE/edk2:$WORKSPACE/edk2-platforms + +cd edk2 +make -C BaseTools clean +make -C BaseTools +source edksetup.sh +./edksetup.sh + +build -a RISCV64 -t GCC5 -p Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.dsc +``` +2. Convert FD files +``` + truncate -s 32M Build/RiscVQemuServerPlatform/DEBUG_GCC5/FV/RISCV_SP_CODE.fd + truncate -s 32M Build/RiscVQemuServerPlatform/DEBUG_GCC5/FV/RISCV_SP_VARS.fd +``` + +## Contributors +- ~~Evan Chai ~~ +- Evan Chai \ No newline at end of file diff --git a/Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.dsc b/Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.dsc new file mode 100644 index 00000000..fe555968 --- /dev/null +++ b/Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.dsc @@ -0,0 +1,489 @@ +## @file +# RISC-V Qemu-based Server Platform +# +# Copyright (c) 2024, Intel Corporation. All rights reserved.
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
+# Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+# Copyright (C) 2024, Alibaba Group Holding Limited.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# + +[Defines] + PLATFORM_NAME = RiscVQemuServerPlatform + PLATFORM_GUID = A5FAC672-1D51-4461-AB37-B7DB202F34BA + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x0001001c + OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) + SUPPORTED_ARCHITECTURES = RISCV64 + BUILD_TARGETS = DEBUG|RELEASE|NOOPT + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.fdf + + # + # Enable below options may cause build error or may not work on + # the initial version of RISC-V package + # Defines for default states. These can be changed on the command line. + # -D FLAG=VALUE + # + DEFINE TTY_TERMINAL = FALSE + DEFINE SECURE_BOOT_ENABLE = FALSE + DEFINE TPM2_ENABLE = FALSE + DEFINE TPM2_CONFIG_ENABLE = FALSE + DEFINE DEBUG_ON_SERIAL_PORT = TRUE + + # + # Network definition + # + DEFINE NETWORK_IP6_ENABLE = FALSE + DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE + DEFINE NETWORK_SNP_ENABLE = FALSE + DEFINE NETWORK_TLS_ENABLE = FALSE + DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS = TRUE + DEFINE NETWORK_ISCSI_ENABLE = FALSE + +!if $(NETWORK_SNP_ENABLE) == TRUE + !error "NETWORK_SNP_ENABLE is IA32/X64/EBC only" +!endif + +!include MdePkg/MdeLibs.dsc.inc +!include NetworkPkg/Network.dsc.inc + +[BuildOptions] + GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG +!ifdef $(SOURCE_DEBUG_ENABLE) + GCC:*_*_RISCV64_GENFW_FLAGS = --keepexceptiontable +!endif + +[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER] + GCC: *_*_*_DLINK_FLAGS = -z common-page-size=0x1000 + MSFT: *_*_*_DLINK_FLAGS = /ALIGN:4096 + +################################################################################ +# +# Library Class section - list of all Library Classes needed by this Platform. +# +################################################################################ + +!include Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.dsc.inc + +!include MdePkg/MdeLibs.dsc.inc + +[LibraryClasses.common] + # Virtio Support + VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf + VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf + QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf + QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf + QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf + QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf + + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf + VirtNorFlashPlatformLib|OvmfPkg/RiscVVirt/Library/VirtNorFlashPlatformLib/VirtNorFlashDeviceTreeLib.inf + + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf + BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf + PlatformBootManagerLib|OvmfPkg/RiscVVirt/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf + PlatformBmPrintScLib|OvmfPkg/Library/PlatformBmPrintScLib/PlatformBmPrintScLib.inf + CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf + FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf + QemuBootOrderLib|OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.inf + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf + PciPcdProducerLib|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf + PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf + PciHostBridgeLib|OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.inf + PciHostBridgeUtilityLib|OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf + PeiHardwareInfoLib|OvmfPkg/Library/HardwareInfoLib/PeiHardwareInfoLib.inf + PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf + ImagePropertiesRecordLib|MdeModulePkg/Library/ImagePropertiesRecordLib/ImagePropertiesRecordLib.inf + +!if $(TPM2_ENABLE) == TRUE + Tpm2CommandLib|SecurityPkg/Library/Tpm2CommandLib/Tpm2CommandLib.inf + Tcg2PhysicalPresenceLib|OvmfPkg/Library/Tcg2PhysicalPresenceLibQemu/DxeTcg2PhysicalPresenceLib.inf + TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf + TpmPlatformHierarchyLib|SecurityPkg/Library/PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.inf +!else + TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf + TpmPlatformHierarchyLib|SecurityPkg/Library/PeiDxeTpmPlatformHierarchyLibNull/PeiDxeTpmPlatformHierarchyLib.inf +!endif + +[LibraryClasses.common.DXE_DRIVER] + AcpiPlatformLib|OvmfPkg/Library/AcpiPlatformLib/DxeAcpiPlatformLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf + PciExpressLib|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf + +!if $(TPM2_ENABLE) == TRUE + Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibTcg2/Tpm2DeviceLibTcg2.inf +!endif + +[LibraryClasses.common.UEFI_DRIVER] + UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf + PciExpressLib|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf + +################################################################################ +# +# Pcd Section - list of all EDK II PCD Entries defined by this Platform. +# +################################################################################ +[PcdsFeatureFlag.common] + gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE + gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|TRUE + + ## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe. + # It could be set FALSE to save size. + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE + + gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE + +[PcdsFixedAtBuild.common] + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800 +!if $(NETWORK_TLS_ENABLE) == TRUE + # + # The cumulative and individual VOLATILE variable size limits should be set + # high enough for accommodating several and/or large CA certificates. + # + gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0x80000 + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVolatileVariableSize|0x40000 +!endif + + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"2.7" + + # Serial Port + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x10000000 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|9600 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|3686400 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|1 + + gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 } + +!if $(SECURE_BOOT_ENABLE) == TRUE + # override the default values from SecurityPkg to ensure images from all sources are verified in secure boot + gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04 + gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04 + gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x04 +!endif + + gEfiShellPkgTokenSpaceGuid.PcdShellFileOperationSize|0x20000 + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x02 + gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeMemorySize|1 + + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosEntryPointProvideMethod|0x2 + +[PcdsDynamicDefault.common] + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3 + + ## If TRUE, OvmfPkg/AcpiPlatformDxe will not wait for PCI + # enumeration to complete before installing ACPI tables. + gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|TRUE + + # set PcdPciExpressBaseAddress to MAX_UINT64, which signifies that this + # PCD and PcdPciDisableBusEnumeration above have not been assigned yet + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xFFFFFFFFFFFFFFFF + + gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslation|0x0 + + # + # Set video resolution for boot options and for text setup. + # PlatformDxe can set the former at runtime. + # + gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|1280 + gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|800 + gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|640 + gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|480 + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|0 + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|0 + + # + # SMBIOS entry point version + # + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0300 + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev|0x0 + gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE + + gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0 + + # + # IPv4 and IPv6 PXE Boot support. + # + gEfiNetworkPkgTokenSpaceGuid.PcdIPv4PXESupport|0x01 + gEfiNetworkPkgTokenSpaceGuid.PcdIPv6PXESupport|0x01 + + # + # TPM2 support + # +!if $(TPM2_ENABLE) == TRUE + gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress|0x0 + gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + gEfiSecurityPkgTokenSpaceGuid.PcdTpm2HashMask|0 +!else +[PcdsPatchableInModule] + # make this PCD patchable instead of dynamic when TPM support is not enabled + # this permits setting the PCD in unreachable code without pulling in dynamic PCD support + gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress|0x0 +!endif + +[PcdsDynamicHii] + gUefiOvmfPkgTokenSpaceGuid.PcdForceNoAcpi|L"ForceNoAcpi"|gOvmfVariableGuid|0x0|FALSE|NV,BS + +!if $(TPM2_CONFIG_ENABLE) == TRUE + gEfiSecurityPkgTokenSpaceGuid.PcdTcgPhysicalPresenceInterfaceVer|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x0|"1.3"|NV,BS + gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x8|3|NV,BS +!endif + + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 + +[LibraryClasses.common.PEI_CORE, LibraryClasses.common.PEIM] +!if $(TPM2_ENABLE) == TRUE + PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf +!else + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf +!endif + +################################################################################ +# +# Components Section - list of all EDK II Modules needed by this Platform. +# +################################################################################ +[Components] + + # + # SEC Phase modules + # + OvmfPkg/RiscVVirt/Sec/SecMain.inf { + + ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf + LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf + PrePiHobListPointerLib|OvmfPkg/RiscVVirt/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf + MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf + } + + # + # DXE + # + MdeModulePkg/Core/Dxe/DxeMain.inf { + + NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf + } + + MdeModulePkg/Universal/PCD/Dxe/Pcd.inf { + + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf + } + + # + # Architectural Protocols + # + UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf + MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf { + + NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf + # do not use unaligned CopyMem () on the UEFI varstore NOR flash region + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + } + +!if $(SECURE_BOOT_ENABLE) == TRUE + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf { + + NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf +!if $(TPM2_ENABLE) == TRUE + NULL|SecurityPkg/Library/DxeTpm2MeasureBootLib/DxeTpm2MeasureBootLib.inf +!endif + } + SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf + OvmfPkg/EnrollDefaultKeys/EnrollDefaultKeys.inf +!else + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf +!endif + MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf + MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf + MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf + EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + MdeModulePkg/Universal/SerialDxe/SerialDxe.inf + + MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf + OvmfPkg/VirtNorFlashDxe/VirtNorFlashDxe.inf + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + + # + # Status Code Routing + # + MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf + MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf + + # + # Platform Driver + # + OvmfPkg/Fdt/VirtioFdtDxe/VirtioFdtDxe.inf + EmbeddedPkg/Drivers/FdtClientDxe/FdtClientDxe.inf { + + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf + } + OvmfPkg/Fdt/HighMemDxe/HighMemDxe.inf + OvmfPkg/VirtioBlkDxe/VirtioBlk.inf + OvmfPkg/VirtioScsiDxe/VirtioScsi.inf + OvmfPkg/VirtioNetDxe/VirtioNet.inf + OvmfPkg/VirtioRngDxe/VirtioRng.inf + + # + # FAT filesystem + GPT/MBR partitioning + UDF filesystem + virtio-fs + # + MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + FatPkg/EnhancedFatDxe/Fat.inf + MdeModulePkg/Universal/Disk/UdfDxe/UdfDxe.inf + OvmfPkg/VirtioFsDxe/VirtioFsDxe.inf + + # + # Bds + # + MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf { + + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf + } + MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf + MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + MdeModulePkg/Logo/LogoDxe.inf + MdeModulePkg/Application/UiApp/UiApp.inf { + + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf + } + OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.inf { + + NULL|OvmfPkg/Library/BlobVerifierLibNull/BlobVerifierLibNull.inf + } + + NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf { + + NULL|OvmfPkg/Library/PxeBcPcdProducerLib/PxeBcPcdProducerLib.inf + } + +!if $(NETWORK_TLS_ENABLE) == TRUE + NetworkPkg/TlsAuthConfigDxe/TlsAuthConfigDxe.inf { + + NULL|OvmfPkg/Library/TlsAuthConfigLib/TlsAuthConfigLib.inf + } +!endif + + # + # SCSI Bus and Disk Driver + # + MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf + MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf + + # + # SATA + # + MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf + MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf + MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf + + # + # NVME Driver + # + MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf + + # + # SMBIOS Support + # + MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf { + + NULL|OvmfPkg/Library/SmbiosVersionLib/DetectSmbiosVersionLib.inf + } + OvmfPkg/SmbiosPlatformDxe/SmbiosPlatformDxe.inf + + # + # PCI support + # + UefiCpuPkg/CpuMmio2Dxe/CpuMmio2Dxe.inf { + + NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf + } + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf + MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf { + + NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf + } + OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf + OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf + OvmfPkg/Virtio10Dxe/Virtio10.inf + + # + # Video support + # + OvmfPkg/QemuRamfbDxe/QemuRamfbDxe.inf + OvmfPkg/VirtioGpuDxe/VirtioGpu.inf + OvmfPkg/PlatformDxe/Platform.inf + + # + # USB Support + # + MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf + MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf + MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf + MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf + MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf + MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + + # + # TPM2 support + # +!if $(TPM2_ENABLE) == TRUE + SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf { + + HashLib|SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterDxe.inf + Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibRouter/Tpm2DeviceLibRouterDxe.inf + NULL|SecurityPkg/Library/Tpm2DeviceLibDTpm/Tpm2InstanceLibDTpm.inf + NULL|SecurityPkg/Library/HashInstanceLibSha1/HashInstanceLibSha1.inf + NULL|SecurityPkg/Library/HashInstanceLibSha256/HashInstanceLibSha256.inf + NULL|SecurityPkg/Library/HashInstanceLibSha384/HashInstanceLibSha384.inf + NULL|SecurityPkg/Library/HashInstanceLibSha512/HashInstanceLibSha512.inf + NULL|SecurityPkg/Library/HashInstanceLibSm3/HashInstanceLibSm3.inf + } +!if $(TPM2_CONFIG_ENABLE) == TRUE + SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigDxe.inf +!endif +!endif + + # + # ACPI Support + # + OvmfPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf + MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf + OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf { + + NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf + } diff --git a/Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.dsc.inc b/Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.dsc.inc new file mode 100644 index 00000000..06da8034 --- /dev/null +++ b/Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.dsc.inc @@ -0,0 +1,341 @@ +## @file +# RISC-V Qemu-based Server Platform +# +# Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved. +# Copyright (c) 2011 - 2022, ARM Limited. All rights reserved. +# Copyright (c) 2014, Linaro Limited. All rights reserved. +# Copyright (c) 2015 - 2024, Intel Corporation. All rights reserved. +# Copyright (c) Microsoft Corporation. +# Copyright (C) 2024, Alibaba Group Holding Limited.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +# + +[Defines] + DEFINE DEBUG_PRINT_ERROR_LEVEL = 0x80000047 + +[LibraryClasses.common] +!ifdef $(SOURCE_DEBUG_ENABLE) + PeCoffExtraActionLib|SourceLevelDebugPkg/Library/PeCoffExtraActionLibDebug/PeCoffExtraActionLibDebug.inf + DebugCommunicationLib|SourceLevelDebugPkg/Library/DebugCommunicationLibSerialPort/DebugCommunicationLibSerialPort.inf +!else + PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf + DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf +!endif +!if $(DEBUG_ON_SERIAL_PORT) == TRUE + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf +!else + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf +!endif + DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf + SafeIntLib|MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf + BmpSupportLib|MdeModulePkg/Library/BaseBmpSupportLib/BaseBmpSupportLib.inf + SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf + PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf + CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf + CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf + UefiLib|MdePkg/Library/UefiLib/UefiLib.inf + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf + UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf + DevicePathLib|MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLibDevicePathProtocol.inf + UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf + DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf + UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf + UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf + UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf + ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf + FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf + PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf + UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf + OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf + OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf + PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf + + # + # Ramdisk Requirements + # + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf + + # Allow dynamic PCDs + # + + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + + # Networking Requirements +!include NetworkPkg/NetworkLibs.dsc.inc +!if $(NETWORK_TLS_ENABLE) == TRUE + TlsLib|CryptoPkg/Library/TlsLib/TlsLib.inf +!endif + + + # Add support for GCC stack protector + NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf + + # RISC-V Architectural Libraries + CpuExceptionHandlerLib|UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.inf + RiscVSbiLib|MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf + RiscVMmuLib|UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf + PlatformBootManagerLib|OvmfPkg/RiscVVirt/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf + ResetSystemLib|Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf + + RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf + TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf + SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf + + DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf + DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgentTimerLibNull.inf + + # Flattened Device Tree (FDT) access library + FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf + + # PCI Libraries + PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf + PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf + PciCapLib|OvmfPkg/Library/BasePciCapLib/BasePciCapLib.inf + PciCapPciSegmentLib|OvmfPkg/Library/BasePciCapPciSegmentLib/BasePciCapPciSegmentLib.inf + PciCapPciIoLib|OvmfPkg/Library/UefiPciCapPciIoLib/UefiPciCapPciIoLib.inf + DxeHardwareInfoLib|OvmfPkg/Library/HardwareInfoLib/DxeHardwareInfoLib.inf + + # USB Libraries + UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf + + # + # CryptoPkg libraries needed by multiple firmware features + # + IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf +!if $(NETWORK_TLS_ENABLE) == TRUE + OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf +!else + OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf +!endif + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf + RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf + + # + # Secure Boot dependencies + # +!if $(SECURE_BOOT_ENABLE) == TRUE + AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf + SecureBootVariableLib|SecurityPkg/Library/SecureBootVariableLib/SecureBootVariableLib.inf + SecureBootVariableProvisionLib|SecurityPkg/Library/SecureBootVariableProvisionLib/SecureBootVariableProvisionLib.inf + PlatformPKProtectionLib|SecurityPkg/Library/PlatformPKProtectionLibVarPolicy/PlatformPKProtectionLibVarPolicy.inf + + # re-use the UserPhysicalPresent() dummy implementation from the ovmf tree + PlatformSecureLib|OvmfPkg/Library/PlatformSecureLib/PlatformSecureLib.inf +!else + AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf +!endif + VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf + VariableFlashInfoLib|MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf + VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLib.inf + VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/VariablePolicyHelperLib.inf + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf + PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf + ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf + +[LibraryClasses.common.SEC] + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf + ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf + ExtractGuidedSectionLib|MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.inf + PlatformSecLib|UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf + PrePiHobListPointerLib|OvmfPkg/RiscVVirt/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf + MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf + +[LibraryClasses.common.DXE_CORE] + PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf + HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf + MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf + DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf + +[LibraryClasses.common.DXE_DRIVER] + SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + +[LibraryClasses.common.UEFI_APPLICATION] + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf + +[LibraryClasses.common.UEFI_DRIVER] + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + +[LibraryClasses.common.DXE_RUNTIME_DRIVER] + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf +!if $(DEBUG_ON_SERIAL_PORT) == TRUE + DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSerialPort.inf +!endif + VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLibRuntimeDxe.inf + +!if $(SECURE_BOOT_ENABLE) == TRUE + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf +!endif + +################################################################################ +# +# Pcd Section - list of all EDK II PCD Entries defined by this Platform +# +################################################################################ + +[PcdsFeatureFlag.common] + gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE + + gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob|TRUE + +[PcdsFeatureFlag] + # + # Activate AcpiSdtProtocol + # + gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE + +[PcdsFixedAtBuild.common] + gEfiMdePkgTokenSpaceGuid.PcdRiscVFeatureOverride|0xFFFFFFFFFFFFFFF8 + gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000 + gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000 + gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|0 + gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000 + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320 + + # DEBUG_ASSERT_ENABLED 0x01 + # DEBUG_PRINT_ENABLED 0x02 + # DEBUG_CODE_ENABLED 0x04 + # CLEAR_MEMORY_ENABLED 0x08 + # ASSERT_BREAKPOINT_ENABLED 0x10 + # ASSERT_DEADLOOP_ENABLED 0x20 +!if $(DEBUG_ON_SERIAL_PORT) != TRUE + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x21 +!else + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f +!endif + + # DEBUG_INIT 0x00000001 // Initialization + # DEBUG_WARN 0x00000002 // Warnings + # DEBUG_LOAD 0x00000004 // Load events + # DEBUG_FS 0x00000008 // EFI File system + # DEBUG_POOL 0x00000010 // Alloc & Free (pool) + # DEBUG_PAGE 0x00000020 // Alloc & Free (page) + # DEBUG_INFO 0x00000040 // Informational debug messages + # DEBUG_DISPATCH 0x00000080 // PEI/DXE/SMM Dispatchers + # DEBUG_VARIABLE 0x00000100 // Variable + # DEBUG_BM 0x00000400 // Boot Manager + # DEBUG_BLKIO 0x00001000 // BlkIo Driver + # DEBUG_NET 0x00004000 // SNP Driver + # DEBUG_UNDI 0x00010000 // UNDI Driver + # DEBUG_LOADFILE 0x00020000 // LoadFile + # DEBUG_EVENT 0x00080000 // Event messages + # DEBUG_GCD 0x00100000 // Global Coherency Database changes + # DEBUG_CACHE 0x00200000 // Memory range cachability changes + # DEBUG_VERBOSE 0x00400000 // Detailed debug messages that may + # // significantly impact boot performance + # DEBUG_ERROR 0x80000000 // Error +!if $(DEBUG_ON_SERIAL_PORT) == TRUE + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|$(DEBUG_PRINT_ERROR_LEVEL) +!endif + + # + # Optional feature to help prevent EFI memory map fragments + # Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob + # Values are in EFI Pages (4K). DXE Core will make sure that + # at least this much of each type of memory can be allocated + # from a single memory range. This way you only end up with + # maximum of two fragments for each type in the memory map + # (the memory used, and the free memory that was prereserved + # but not used). + # + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0 +!if $(SECURE_BOOT_ENABLE) == TRUE + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|600 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|400 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|1500 +!else + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|300 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|150 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|1000 +!endif + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|6000 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20 + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0 + + # + # Enable strict image permissions for all images. (This applies + # only to images that were built with >= 4 KB section alignment.) + # + gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy|0x3 + + # + # Enable NX memory protection for all non-code regions, including OEM and OS + # reserved ones, with the exception of LoaderData regions, of which OS loaders + # (i.e., GRUB) may assume that its contents are executable. + # + gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy|0xC000000000007FD5 + +[Components.common] + # + # Ramdisk support + # + MdeModulePkg/Universal/Disk/RamDiskDxe/RamDiskDxe.inf + + ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf { + + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE + } + ShellPkg/DynamicCommand/HttpDynamicCommand/HttpDynamicCommand.inf { + + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE + } + OvmfPkg/LinuxInitrdDynamicShellCommand/LinuxInitrdDynamicShellCommand.inf { + + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE + } + ShellPkg/Application/Shell/Shell.inf { + + ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf + NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf + NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf + NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf +!if $(ACPIVIEW_ENABLE) == TRUE + NULL|ShellPkg/Library/UefiShellAcpiViewCommandLib/UefiShellAcpiViewCommandLib.inf +!endif + NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf + NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf +!if $(NETWORK_IP6_ENABLE) == TRUE + NULL|ShellPkg/Library/UefiShellNetwork2CommandsLib/UefiShellNetwork2CommandsLib.inf +!endif + HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf + BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf + + + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 + } + + # + # ACPI Support + # + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf { + + NULL|EmbeddedPkg/Library/PlatformHasAcpiLib/PlatformHasAcpiLib.inf + } diff --git a/Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.fdf b/Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.fdf new file mode 100644 index 00000000..e2962993 --- /dev/null +++ b/Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.fdf @@ -0,0 +1,315 @@ +## @file +# RISC-V Qemu-based Server Platform +# +# Copyright (c) 2024, Intel Corporation. All rights reserved.
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
+# Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+# Copyright (C) 2024, Alibaba Group Holding Limited. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# + +!include RiscVQemuServerPlatform.fdf.inc + +################################################################################ +[FD.RISCV_SP_CODE] +BaseAddress = $(CODE_BASE_ADDRESS)|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress +Size = $(CODE_SIZE)|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize +ErasePolarity = 1 +BlockSize = $(BLOCK_SIZE) +NumBlocks = $(CODE_BLOCKS) + +0x00000000|$(CODE_SIZE) +gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize +FV = FVMAIN_COMPACT + +################################################################################ +[FD.RISCV_SP_VARS] +BaseAddress = $(VARS_BASE_ADDRESS) +Size = $(VARS_SIZE) +ErasePolarity = 1 +BlockSize = $(VARS_BLOCK_SIZE) +NumBlocks = $(VARS_BLOCKS) + +!include VarStore.fdf.inc +################################################################################ + +[FV.DXEFV] +BlockSize = 0x10000 +FvAlignment = 16 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + +APRIORI DXE { + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf + INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf + INF EmbeddedPkg/Drivers/FdtClientDxe/FdtClientDxe.inf + INF UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf + INF OvmfPkg/VirtNorFlashDxe/VirtNorFlashDxe.inf +} + +# +# DXE Phase modules +# +INF MdeModulePkg/Core/Dxe/DxeMain.inf +INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf +INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf +INF OvmfPkg/Fdt/VirtioFdtDxe/VirtioFdtDxe.inf +INF EmbeddedPkg/Drivers/FdtClientDxe/FdtClientDxe.inf +INF OvmfPkg/Fdt/HighMemDxe/HighMemDxe.inf + +# +# PI DXE Drivers producing Architectural Protocols (EFI Services) +# +INF UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf +INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf +INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf +INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf +INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf +INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf +!if $(SECURE_BOOT_ENABLE) == TRUE + INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf +!endif +INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf +INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf +INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf +INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf +INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + +# +# Multiple Console IO support +# +INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf +INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf +INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf +INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf +INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf + +# RISC-V Core Drivers +INF UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf +INF OvmfPkg/VirtNorFlashDxe/VirtNorFlashDxe.inf +INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + +# +# FAT filesystem + GPT/MBR partitioning + UDF filesystem + virtio-fs +# +INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf +INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf +INF FatPkg/EnhancedFatDxe/Fat.inf +INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf +INF MdeModulePkg/Universal/Disk/UdfDxe/UdfDxe.inf +INF OvmfPkg/VirtioFsDxe/VirtioFsDxe.inf + +# +# Status Code Routing +# +INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf +INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf + +# +# Platform Driver +# +INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf +INF OvmfPkg/VirtioNetDxe/VirtioNet.inf +INF OvmfPkg/VirtioScsiDxe/VirtioScsi.inf +INF OvmfPkg/VirtioRngDxe/VirtioRng.inf + +INF ShellPkg/Application/Shell/Shell.inf +INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf +INF ShellPkg/DynamicCommand/HttpDynamicCommand/HttpDynamicCommand.inf +INF OvmfPkg/LinuxInitrdDynamicShellCommand/LinuxInitrdDynamicShellCommand.inf + +# +# Bds +# +INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf +INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf +INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf +INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf +INF MdeModulePkg/Application/UiApp/UiApp.inf +INF OvmfPkg/QemuKernelLoaderFsDxe/QemuKernelLoaderFsDxe.inf + +# +# Networking stack +# +!include NetworkPkg/Network.fdf.inc + +# +# SCSI Bus and Disk Driver +# +INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf +INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf + +# +# SATA +# +INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf +INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf +INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf + +# +# NVME Driver +# +INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf + +# +# SMBIOS Support +# +INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf +INF OvmfPkg/SmbiosPlatformDxe/SmbiosPlatformDxe.inf + +# +# ACPI Support +# +INF OvmfPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf +INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf +INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf +INF OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf + +# +# PCI support +# +INF UefiCpuPkg/CpuMmio2Dxe/CpuMmio2Dxe.inf +INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf +INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf +INF OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf +INF OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf +INF OvmfPkg/Virtio10Dxe/Virtio10.inf + +# +# Video support +# +INF OvmfPkg/QemuRamfbDxe/QemuRamfbDxe.inf +INF OvmfPkg/VirtioGpuDxe/VirtioGpu.inf +INF OvmfPkg/PlatformDxe/Platform.inf + +# +# Usb Support +# +INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf +INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf +INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf +INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf +INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf +INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + +# +# TianoCore logo (splash screen) +# +INF MdeModulePkg/Logo/LogoDxe.inf + +# +# Ramdisk support +# +INF MdeModulePkg/Universal/Disk/RamDiskDxe/RamDiskDxe.inf + +################################################################################ + +[FV.FVMAIN_COMPACT] +FvAlignment = 16 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE +FvNameGuid = 27A72E80-3118-4c0c-8673-AA5B4EFA9613 + +INF OvmfPkg/RiscVVirt/Sec/SecMain.inf + +FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { + SECTION FV_IMAGE = DXEFV + } + } + +[Rule.Common.SEC] + FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED { + PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING ="$(MODULE_NAME)" Optional + VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.DXE_CORE] + FILE DXE_CORE = $(NAMED_GUID) { + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.DXE_DRIVER] + FILE DRIVER = $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.DXE_RUNTIME_DRIVER] + FILE DRIVER = $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.UEFI_DRIVER] + FILE DRIVER = $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.UEFI_DRIVER.BINARY] + FILE DRIVER = $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional |.depex + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.UEFI_APPLICATION] + FILE APPLICATION = $(NAMED_GUID) { + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.UEFI_APPLICATION.BINARY] + FILE APPLICATION = $(NAMED_GUID) { + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + +[Rule.Common.USER_DEFINED.ACPITABLE] + FILE FREEFORM = $(NAMED_GUID) { + RAW ACPI |.acpi + RAW ASL |.aml + UI STRING="$(MODULE_NAME)" Optional + } diff --git a/Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.fdf.inc b/Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.fdf.inc new file mode 100644 index 00000000..eb996c3b --- /dev/null +++ b/Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.fdf.inc @@ -0,0 +1,41 @@ +## @file +# Definitions of Flash definition file on RISC-V Qemu Server Platform +# +# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
+# Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+# Copyright (c) 2024, Intel Corporation. All rights reserved.
+# Copyright (C) 2024, Alibaba Group Holding Limited. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## +[Defines] +DEFINE BLOCK_SIZE = 0x1000 + +DEFINE PFLASH0_BASE = 0x20000000 +DEFINE PFLASH1_BASE = 0x22000000 + +DEFINE CODE_BASE_ADDRESS = $(PFLASH0_BASE) +DEFINE CODE_SIZE = 0x00800000 +DEFINE CODE_BLOCKS = 0x800 + +DEFINE VARS_BASE_ADDRESS = $(PFLASH1_BASE) +DEFINE VARS_SIZE = 0x000C0000 +DEFINE VARS_BLOCK_SIZE = 0x40000 +DEFINE VARS_BLOCKS = 0x3 + +# +# EFI Variable memory region. +# The total size of EFI Variable FD must include +# all of sub regions of EFI Variable +# +DEFINE VARS_OFFSET = 0x00000000 +DEFINE VARS_LIVE_SIZE = 0x00040000 +DEFINE VARS_FTW_WORKING_OFFSET = $(VARS_OFFSET) + $(VARS_LIVE_SIZE) +DEFINE VARS_FTW_WORKING_SIZE = 0x00040000 +DEFINE VARS_FTW_SPARE_OFFSET = $(VARS_FTW_WORKING_OFFSET) + $(VARS_FTW_WORKING_SIZE) +DEFINE VARS_FTW_SPARE_SIZE = 0x00040000 + +SET gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency = 10000000 +SET gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase = 0x83FF0000 +SET gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize = 0x00010000 diff --git a/Platform/Qemu/RiscVQemuServerPlatform/VarStore.fdf.inc b/Platform/Qemu/RiscVQemuServerPlatform/VarStore.fdf.inc new file mode 100644 index 00000000..043b8e3a --- /dev/null +++ b/Platform/Qemu/RiscVQemuServerPlatform/VarStore.fdf.inc @@ -0,0 +1,72 @@ +## @file +# FDF include file with Layout Regions that define an empty variable store. +# +# Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
+# Copyright (C) 2014, Red Hat, Inc. +# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +$(VARS_OFFSET)|$(VARS_LIVE_SIZE) +gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize +# +# NV_VARIABLE_STORE +# +DATA = { + ## This is the EFI_FIRMWARE_VOLUME_HEADER + # ZeroVector [] + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + # FileSystemGuid: gEfiSystemNvDataFvGuid = + # { 0xFFF12B8D, 0x7696, 0x4C8B, + # { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }} + 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C, + 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50, + # FvLength: 0xC0000 + 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, + # Signature "_FVH" # Attributes + 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00, + # HeaderLength # CheckSum # ExtHeaderOffset #Reserved #Revision + 0x48, 0x00, 0x28, 0x09, 0x00, 0x00, 0x00, 0x02, + # Blockmap[0]: 0x3 Blocks * 0x40000 Bytes / Block + 0x3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, + # Blockmap[1]: End + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + ## This is the VARIABLE_STORE_HEADER + # It is compatible with SECURE_BOOT_ENABLE == FALSE as well. + # Signature: gEfiAuthenticatedVariableGuid = + # { 0xaaf32c78, 0x947b, 0x439a, + # { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }} + 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43, + 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92, + # Size: 0x40000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - + # 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x3FFB8 + # This can speed up the Variable Dispatch a bit. + 0xB8, 0xFF, 0x03, 0x00, + # FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32 + 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +} + +$(VARS_FTW_WORKING_OFFSET)|$(VARS_FTW_WORKING_SIZE) +gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize +# +#NV_FTW_WORK +# +DATA = { + # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid = + # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }} + 0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49, + 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95, + # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved + 0x5b, 0xe7, 0xc6, 0x86, 0xFE, 0xFF, 0xFF, 0xFF, + # WriteQueueSize: UINT64 + 0xE0, 0xFF, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00 +} + +$(VARS_FTW_SPARE_OFFSET)|$(VARS_FTW_SPARE_SIZE) +gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize +# +#NV_FTW_SPARE -- 2.45.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119847): https://edk2.groups.io/g/devel/message/119847 Mute This Topic: https://groups.io/mt/107122511/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-