public inbox for devel@edk2.groups.io
 help / color / mirror / Atom feed
From: "Marcin Juszkiewicz" <marcin.juszkiewicz@linaro.org>
To: devel@edk2.groups.io
Cc: Xiong Yining <xiongyining1480@phytium.com.cn>,
	 Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>,
	 Leif Lindholm <quic_llindhol@quicinc.com>,
	 Ard Biesheuvel <ardb+tianocore@kernel.org>,
	 Graeme Gregory <graeme@xora.org.uk>,
	Chen Baozi <chenbaozi@phytium.com.cn>,
	 Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Subject: [edk2-devel] [PATCH edk2-platforms v5 0/6] SbsaQemu: Align the PPTT tables with QEMU
Date: Thu, 11 Jul 2024 13:31:56 +0200	[thread overview]
Message-ID: <20240711-acpi65-v5-0-a30180b74964@linaro.org> (raw)

We want to make sure that CPU topology information given to QEMU would
be provided to the operating system. So we use SMC call to ask TF-A for
amount of sockets, clusters, cores and threads set in QEMU config.

The TF-A part is already merged:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/27189

Signed-off-by: Xiong Yining <xiongyining1480@phytium.com.cn>
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>

To: devel@edk2.groups.io
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Graeme Gregory <graeme@xora.org.uk>
Cc: Chen Baozi <chenbaozi@phytium.com.cn>
Cc: Xiong Yining <xiongyining1480@phytium.com.cn>
Cc: Jonathan Cameron <Jonathan.Cameron@Huawei.com>

Changes in v5:
- added support for cache sizes on cores with FEAT_CCIDX (Neoverse V1+)
- Link to v4: https://openfw.io/edk2-devel/20240710-acpi65-v4-0-bc32224e4be4@linaro.org

Changes in v4:
- renamed all *Index variables to *Offset ones for clarity
- renamed static CpuId/CacheId variable to mCpuId/mCacheId
- moved above variables outside of pragma pack
- moved all variables definitions to start of functions
- added reading cpu cache size from CCIDR registers
- changed wording in SbsaHardwareInfoLib header
- changed wording in 3rd patch commit message
- Link to v3: https://openfw.io/edk2-devel/20240709-acpi65-v3-0-ee93ba536fcf@linaro.org

Changes in v3:
- split ACPI 6.5 changes into separate patch
- moved adding cores/threads to separate function
- fixed cache offsets
- Link to v2: https://openfw.io/edk2-devel/20240702-acpi65-v2-0-3cb18a892221@linaro.org/T/#t

Changes in v2 (Marcin Juszkiewicz):
- use ACPI 6.5 structures (instead of 6.3)
- add patch to move cache data to cores (instead of clusters)
  - this is for future MPAM support
- reformatted sources using uncrustify
- changed debug output to allow singular values (s/are/:/)

---
Marcin Juszkiewicz (5):
      SbsaQemu: get the information of CPU topology via SMC calls
      SbsaQemu: update PPTT to ACPI 6.5
      SbsaQemu: provide cache info per core in PPTT
      SbsaQemu: introduce helper in PPTT generation
      SbsaQemu: export proper cache values in PPTT

Xiong Yining (1):
      SbsaQemu: align the PPTT tables with QEMU

 .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h       |  11 +
 .../Include/IndustryStandard/SbsaQemuAcpi.h         | 110 +++-----
 .../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h |   1 +
 .../Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h |  26 ++
 .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c       | 274 +++++++++++++++++---
 .../SbsaQemuHardwareInfoLib.c                       |  36 +++
 6 files changed, 342 insertions(+), 116 deletions(-)
---
base-commit: ad553efc01125cad4ebdbe694b82cf6a59ce6a03
change-id: 20240702-acpi65-1bfdb20bde1a

Best regards,
-- 
Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#119893): https://edk2.groups.io/g/devel/message/119893
Mute This Topic: https://groups.io/mt/107160638/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-



             reply	other threads:[~2024-07-11 11:32 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-11 11:31 Marcin Juszkiewicz [this message]
2024-07-11 11:31 ` [edk2-devel] [PATCH edk2-platforms v5 1/6] SbsaQemu: get the information of CPU topology via SMC calls Marcin Juszkiewicz
2024-07-11 11:31 ` [edk2-devel] [PATCH edk2-platforms v5 2/6] SbsaQemu: align the PPTT tables with QEMU Marcin Juszkiewicz
2024-07-11 11:31 ` [edk2-devel] [PATCH edk2-platforms v5 3/6] SbsaQemu: update PPTT to ACPI 6.5 Marcin Juszkiewicz
2024-07-11 11:32 ` [edk2-devel] [PATCH edk2-platforms v5 4/6] SbsaQemu: provide cache info per core in PPTT Marcin Juszkiewicz
2024-07-11 11:32 ` [edk2-devel] [PATCH edk2-platforms v5 5/6] SbsaQemu: introduce helper in PPTT generation Marcin Juszkiewicz
2024-07-11 11:32 ` [edk2-devel] [PATCH edk2-platforms v5 6/6] SbsaQemu: export proper cache values in PPTT Marcin Juszkiewicz

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-list from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240711-acpi65-v5-0-a30180b74964@linaro.org \
    --to=devel@edk2.groups.io \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox