From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail05.groups.io (mail05.groups.io [45.79.224.7]) by spool.mail.gandi.net (Postfix) with ESMTPS id 013E9AC0EA0 for ; Thu, 11 Jul 2024 11:32:20 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=yAbJnjpv5WQjvOA/ZUk9D/CmM+Cp+SY48WxlsKGazdk=; c=relaxed/simple; d=groups.io; h=From:Date:Subject:MIME-Version:Message-Id:References:In-Reply-To:To:Cc:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Resent-From:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Transfer-Encoding; s=20240206; t=1720697540; v=1; b=gwfj8RFe+Xjpx5saIR6SxNlwbXRi9mP+JK2jg1LC+8ea0E3LnzZ/Sw1pnaB3QtQ6Gxvzp6vk vQyT+IFGFxJo5g5l04dNolZyBuQa6lI6OAbOVYqMZoz91KBLGGKz1XX01JOGaJz1o4i0Str++86 5IJ5lYJUXcckxiwENs5ks/z6U4AFZ+POci0sHyCLJzBcrkcZfCmMI4heszcNoiqCdYlU9Qljbmg 7qezx8BSArDoQXSuhsebKdfQ/j58pkswXnNQ+hCAfwEZnnoz7RKRE5xgTfvz9cl40rCbPvsAsxB F5kr4vAFyNfCmfaN23o48tjWa7oJgpS084sNoEQ4c0csQ== X-Received: by 127.0.0.2 with SMTP id E5yeYY7687511x7taBPti74Q; Thu, 11 Jul 2024 04:32:19 -0700 X-Received: from muminek.juszkiewicz.com.pl (muminek.juszkiewicz.com.pl [213.251.184.221]) by mx.groups.io with SMTP id smtpd.web10.9671.1720697538609080922 for ; Thu, 11 Jul 2024 04:32:19 -0700 X-Received: from localhost (localhost [127.0.0.1]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTP id 22B8A260CA6; Thu, 11 Jul 2024 13:32:16 +0200 (CEST) X-Virus-Scanned: Debian amavis at juszkiewicz.com.pl X-Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavis, port 10024) with ESMTP id cobdm0L6zqQp; Thu, 11 Jul 2024 13:32:14 +0200 (CEST) X-Received: from applejack.lan (83.8.74.165.ipv4.supernova.orange.pl [83.8.74.165]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id 8CB20260885; Thu, 11 Jul 2024 13:32:11 +0200 (CEST) From: "Marcin Juszkiewicz" Date: Thu, 11 Jul 2024 13:31:58 +0200 Subject: [edk2-devel] [PATCH edk2-platforms v5 2/6] SbsaQemu: align the PPTT tables with QEMU MIME-Version: 1.0 Message-Id: <20240711-acpi65-v5-2-a30180b74964@linaro.org> References: <20240711-acpi65-v5-0-a30180b74964@linaro.org> In-Reply-To: <20240711-acpi65-v5-0-a30180b74964@linaro.org> To: devel@edk2.groups.io Cc: Xiong Yining , Marcin Juszkiewicz , Leif Lindholm , Ard Biesheuvel , Graeme Gregory , Chen Baozi , Jonathan Cameron Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Thu, 11 Jul 2024 04:32:19 -0700 Resent-From: marcin.juszkiewicz@linaro.org Reply-To: devel@edk2.groups.io,marcin.juszkiewicz@linaro.org List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: iPZYH6MwrECrCcyWDeppjXhgx7686176AA= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=gwfj8RFe; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=linaro.org (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io From: Xiong Yining To align the CPU topology information recognized by the operating system with the CPU topology information configured by QEMU, we need to make use of the CPU topology information to create complex PPTT tables setups. We can get the CPU topology information via SMC. Signed-off-by: Xiong Yining Signed-off-by: Marcin Juszkiewicz --- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h | 11 ++ .../Include/IndustryStandard/SbsaQemuAcpi.h | 32 ---- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 195 ++++++++++++++++= ---- 3 files changed, 166 insertions(+), 72 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.= h b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h index e5f0748bb16e..085c681ba55f 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h @@ -88,4 +88,15 @@ typedef struct { ClockDomain /* Clock Domain */= \ } =20 +#define SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT(Flags, Paren= t, ACPIProcessorID, NumberOfPrivateResources) \ + { = \ + EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, = /* Type */ \ + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + NumberOfPrivateResour= ces * sizeof (UINT32), /* Length */ \ + { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, = /* Reserved */ \ + Flags, = /* Flags */ \ + Parent, = /* Parent */ \ + ACPIProcessorID, = /* ACPI Processor ID */ \ + NumberOfPrivateResources = /* Number of private resources */ \ + } + #endif diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h = b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h index ae151210c2c6..2f87591e737a 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h @@ -166,36 +166,4 @@ typedef struct { 64 /* LineSize */ = \ } =20 -#define SBSAQEMU_ACPI_PPTT_CLUSTER_STRUCT { = \ - EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, = \ - sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR), = \ - { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, = \ - { = \ - EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL, /* PhysicalPackage */ = \ - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, /* AcpiProcessorIdValid = */ \ - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, /* Is not a Thread */ = \ - EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, /* Not Leaf */ = \ - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL, /* Identical Cores */ = \ - }, = \ - 0, /* Parent */ = \ - 0, /* AcpiProcessorId */ = \ - 0, /* NumberOfPrivateResources = */ \ - } - -#define SBSAQEMU_ACPI_PPTT_CORE_STRUCT { = \ - EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, = \ - (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + (2 * sizeof (UINT32)= )), \ - { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, = \ - { = \ - EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, /* PhysicalPackage */ = \ - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, /* AcpiProcessorValid */= \ - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, /* Is not a Thread */ = \ - EFI_ACPI_6_3_PPTT_NODE_IS_LEAF, /* Leaf */ = \ - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL, /* Identical Cores */ = \ - }, = \ - 0, /* Parent */ = \ - 0, /* AcpiProcessorId */ = \ - 2, /* NumberOfPrivateResources = */ \ - } - #endif diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.= c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index e0eef54ff907..48cec24721d6 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -505,14 +505,61 @@ AddPpttTable ( EFI_PHYSICAL_ADDRESS PageAddress; UINT8 *New; UINT32 CpuId; - UINT32 NumCores =3D GetCpuCount (); + CpuTopology CpuTopo; + UINT32 SocketIndex; + UINT32 ClusterIndex; + UINT32 CoreIndex; + UINT32 ThreadIndex; + UINT32 SocketOffset; + UINT32 ClusterOffset; + UINT32 CoreOffset; + UINT32 L1DCacheOffset; + UINT32 L1ICacheOffset; + UINT32 L2CacheOffset; + + GetCpuTopology (&CpuTopo); =20 EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L1DCache =3D SBSAQEMU_ACPI_PPTT_L1_D_= CACHE_STRUCT; EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L1ICache =3D SBSAQEMU_ACPI_PPTT_L1_I_= CACHE_STRUCT; EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L2Cache =3D SBSAQEMU_ACPI_PPTT_L2_CA= CHE_STRUCT; =20 - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster =3D SBSAQEMU_ACPI_PPTT_CL= USTER_STRUCT; - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Core =3D SBSAQEMU_ACPI_PPTT_CO= RE_STRUCT; + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS SocketFlags =3D { + EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL, + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, + EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, + EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL + }; + + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS ClusterFlags =3D { + EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, + EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, + EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL + }; + + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS CoreFlags =3D { + EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, + EFI_ACPI_6_3_PPTT_NODE_IS_LEAF, + EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL + }; + + if (CpuTopo.Threads > 1) { + // The Thread structure is the leaf structure, adjust the value of Cor= eFlags. + CoreFlags.AcpiProcessorIdValid =3D EFI_ACPI_6_5_PPTT_PROCESSOR_ID_INVA= LID; + CoreFlags.NodeIsALeaf =3D EFI_ACPI_6_5_PPTT_NODE_IS_NOT_LEAF; + } + + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS ThreadFlags =3D { + EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_THREAD, + EFI_ACPI_6_3_PPTT_NODE_IS_LEAF, + EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL + }; =20 EFI_ACPI_DESCRIPTION_HEADER Header =3D SBSAQEMU_ACPI_HEADER ( @@ -522,10 +569,16 @@ AddPpttTable ( ); =20 TableSize =3D sizeof (EFI_ACPI_DESCRIPTION_HEADER) + - sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + - (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE) * 3) + - (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) * NumCores) = + - (sizeof (UINT32) * 2 * NumCores); + CpuTopo.Sockets * (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCE= SSOR) + + CpuTopo.Clusters * (sizeof (EFI_ACPI_6_3_= PPTT_STRUCTURE_PROCESSOR) + + sizeof (EFI_ACPI_6_3_= PPTT_STRUCTURE_CACHE) * 3 + + CpuTopo.Cores * (size= of (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + + size= of (UINT32) * 2))); + + if (CpuTopo.Threads > 1) { + TableSize +=3D CpuTopo.Sockets * CpuTopo.Clusters * CpuTopo.Cores * Cp= uTopo.Threads * + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + } =20 Status =3D gBS->AllocatePages ( AllocateAnyPages, @@ -546,39 +599,101 @@ AddPpttTable ( ((EFI_ACPI_DESCRIPTION_HEADER *)New)->Length =3D TableSize; New +=3D sizeof (EFI_ACPI_DESCRI= PTION_HEADER); =20 - // Add the Cluster PPTT structure - CopyMem (New, &Cluster, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR)); - New +=3D sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); - - // Add L1 D Cache structure - CopyMem (New, &L1DCache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)); - ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache =3D L2_CACH= E_INDEX; - New +=3D sizeof = (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); - - // Add L1 I Cache structure - CopyMem (New, &L1ICache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)); - ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache =3D L2_CACH= E_INDEX; - New +=3D sizeof = (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); - - // Add L2 Cache structure - CopyMem (New, &L2Cache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)); - ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache =3D 0; /* L= 2 is LLC */ - New +=3D sizeof = (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); - - for (CpuId =3D 0; CpuId < NumCores; CpuId++) { - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR *CorePtr; - UINT32 *PrivateResourcePtr; - - CopyMem (New, &Core, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR)); - CorePtr =3D (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR *)= New; - CorePtr->Parent =3D CLUSTER_INDEX; - CorePtr->AcpiProcessorId =3D CpuId; - New +=3D sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCE= SSOR); - - PrivateResourcePtr =3D (UINT32 *)New; - PrivateResourcePtr[0] =3D L1_D_CACHE_INDEX; - PrivateResourcePtr[1] =3D L1_I_CACHE_INDEX; - New +=3D (2 * sizeof (UINT32)); + CpuId =3D 0; + + SocketOffset =3D sizeof (EFI_ACPI_DESCRIPTION_HEADER); + for (SocketIndex =3D 0; SocketIndex < CpuTopo.Sockets; SocketIndex++) { + // Add the Socket PPTT structure + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Socket =3D SBSAQEMU_ACPI_PROCES= SOR_HIERARCHY_NODE_STRUCTURE_INIT ( + SocketFlags, + 0, + 0, + 0 + ); + CopyMem (New, &Socket, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR))= ; + New +=3D sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + + ClusterOffset =3D SocketOffset + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_P= ROCESSOR); + for (ClusterIndex =3D 0; ClusterIndex < CpuTopo.Clusters; ClusterIndex= ++) { + L1DCacheOffset =3D ClusterOffset + sizeof (EFI_ACPI_6_3_PPTT_STRUCTU= RE_PROCESSOR); + L1ICacheOffset =3D L1DCacheOffset + sizeof (EFI_ACPI_6_3_PPTT_STRUCT= URE_CACHE); + L2CacheOffset =3D L1ICacheOffset + sizeof (EFI_ACPI_6_3_PPTT_STRUCT= URE_CACHE); + CoreOffset =3D L2CacheOffset + sizeof (EFI_ACPI_6_3_PPTT_STRUCTU= RE_CACHE); + + // Add the Cluster PPTT structure + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster =3D SBSAQEMU_ACPI_PRO= CESSOR_HIERARCHY_NODE_STRUCTURE_INIT ( + ClusterFlags, + SocketOffset, + 0, + 0 + ); + CopyMem (New, &Cluster, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSO= R)); + New +=3D sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + + // Add L1 D Cache structure + CopyMem (New, &L1DCache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE))= ; + ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache =3D L2C= acheOffset; + New +=3D siz= eof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); + + // Add L1 I Cache structure + CopyMem (New, &L1ICache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE))= ; + ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache =3D L2C= acheOffset; + New +=3D siz= eof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); + + // Add L2 Cache structure + CopyMem (New, &L2Cache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)); + New +=3D sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); + + for (CoreIndex =3D 0; CoreIndex < CpuTopo.Cores; CoreIndex++) { + UINT32 *PrivateResourcePtr; + UINT32 CoreCpuId; + + if (CpuTopo.Threads =3D=3D 1) { + CoreCpuId =3D CpuId; + } else { + CoreCpuId =3D 0; + } + + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Core =3D SBSAQEMU_ACPI_PROC= ESSOR_HIERARCHY_NODE_STRUCTURE_INIT ( + CoreFlags, + ClusterOffset, + CoreCpuId, + 2 + ); + CopyMem (New, &Core, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR= )); + New +=3D sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + + PrivateResourcePtr =3D (UINT32 *)New; + PrivateResourcePtr[0] =3D L1DCacheOffset; + PrivateResourcePtr[1] =3D L1ICacheOffset; + New +=3D (2 * sizeof (UINT32)); + + if (CpuTopo.Threads =3D=3D 1) { + CpuId++; + } else { + // Add the Thread PPTT structure + for (ThreadIndex =3D 0; ThreadIndex < CpuTopo.Threads; ThreadInd= ex++) { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Thread =3D SBSAQEMU_ACP= I_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT ( + ThreadFlags, + CoreOffset, + CpuId, + 0 + ); + CopyMem (New, &Thread, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PRO= CESSOR)); + New +=3D sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + CpuId++; + } + + CoreOffset +=3D CpuTopo.Threads * sizeof (EFI_ACPI_6_3_PPTT_STR= UCTURE_PROCESSOR); + } + + CoreOffset +=3D sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + s= izeof (UINT32) * 2; + } + + ClusterOffset =3D CoreOffset; + } + + SocketOffset =3D ClusterOffset; } =20 // Perform Checksum --=20 2.45.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119894): https://edk2.groups.io/g/devel/message/119894 Mute This Topic: https://groups.io/mt/107160639/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-