From: "Marcin Juszkiewicz" <marcin.juszkiewicz@linaro.org>
To: devel@edk2.groups.io
Cc: Xiong Yining <xiongyining1480@phytium.com.cn>,
Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>,
Leif Lindholm <quic_llindhol@quicinc.com>,
Ard Biesheuvel <ardb+tianocore@kernel.org>,
Graeme Gregory <graeme@xora.org.uk>,
Chen Baozi <chenbaozi@phytium.com.cn>,
Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Subject: [edk2-devel] [PATCH edk2-platforms v5 3/6] SbsaQemu: update PPTT to ACPI 6.5
Date: Thu, 11 Jul 2024 13:31:59 +0200 [thread overview]
Message-ID: <20240711-acpi65-v5-3-a30180b74964@linaro.org> (raw)
In-Reply-To: <20240711-acpi65-v5-0-a30180b74964@linaro.org>
ACPI 6.5 is the newest version of specification so far. The only
functional change to make is handling of CacheId (has to be unique and
higher than zero).
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h | 4 +-
.../Include/IndustryStandard/SbsaQemuAcpi.h | 46 ++++---
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 129 ++++++++++----------
3 files changed, 95 insertions(+), 84 deletions(-)
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h
index 085c681ba55f..5aaf02e3ca30 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h
@@ -90,8 +90,8 @@ typedef struct {
#define SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT(Flags, Parent, ACPIProcessorID, NumberOfPrivateResources) \
{ \
- EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, /* Type */ \
- sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + NumberOfPrivateResources * sizeof (UINT32), /* Length */ \
+ EFI_ACPI_6_5_PPTT_TYPE_PROCESSOR, /* Type */ \
+ sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR) + NumberOfPrivateResources * sizeof (UINT32), /* Length */ \
{ EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, /* Reserved */ \
Flags, /* Flags */ \
Parent, /* Parent */ \
diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h
index 2f87591e737a..fa2e2b30bb7d 100644
--- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h
+++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h
@@ -87,13 +87,13 @@ typedef struct {
#define SBSAQEMU_L2_CACHE_ASSC 8
#define CLUSTER_INDEX (sizeof (EFI_ACPI_DESCRIPTION_HEADER))
-#define L1_D_CACHE_INDEX (CLUSTER_INDEX + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR))
-#define L1_I_CACHE_INDEX (L1_D_CACHE_INDEX + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE))
-#define L2_CACHE_INDEX (L1_I_CACHE_INDEX + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE))
+#define L1_D_CACHE_INDEX (CLUSTER_INDEX + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR))
+#define L1_I_CACHE_INDEX (L1_D_CACHE_INDEX + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE))
+#define L2_CACHE_INDEX (L1_I_CACHE_INDEX + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE))
#define SBSAQEMU_ACPI_PPTT_L1_D_CACHE_STRUCT { \
- EFI_ACPI_6_3_PPTT_TYPE_CACHE, \
- sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE), \
+ EFI_ACPI_6_5_PPTT_TYPE_CACHE, \
+ sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE), \
{ EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, \
{ \
1, /* SizePropertyValid */ \
@@ -103,22 +103,24 @@ typedef struct {
1, /* CacheTypeValid */ \
1, /* WritePolicyValid */ \
1, /* LineSizeValid */ \
+ 1, /* CacheIdValid */ \
}, \
0, /* NextLevelOfCache */ \
SBSAQEMU_L1_D_CACHE_SIZE, /* Size */ \
SBSAQEMU_L1_D_CACHE_SETS, /* NumberOfSets */ \
SBSAQEMU_L1_D_CACHE_ASSC, /* Associativity */ \
{ \
- EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, \
- EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_DATA, \
- EFI_ACPI_6_2_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK, \
+ EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, \
+ EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_DATA, \
+ EFI_ACPI_6_5_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK, \
}, \
- 64 /* LineSize */ \
+ 64, /* LineSize */ \
+ 0 /* CacheId */ \
}
#define SBSAQEMU_ACPI_PPTT_L1_I_CACHE_STRUCT { \
- EFI_ACPI_6_3_PPTT_TYPE_CACHE, \
- sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE), \
+ EFI_ACPI_6_5_PPTT_TYPE_CACHE, \
+ sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE), \
{ EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, \
{ \
1, /* SizePropertyValid */ \
@@ -128,22 +130,24 @@ typedef struct {
1, /* CacheTypeValid */ \
1, /* WritePolicyValid */ \
1, /* LineSizeValid */ \
+ 1, /* CacheIdValid */ \
}, \
0, /* NextLevelOfCache */ \
SBSAQEMU_L1_I_CACHE_SIZE, /* Size */ \
SBSAQEMU_L1_I_CACHE_SETS, /* NumberOfSets */ \
SBSAQEMU_L1_I_CACHE_ASSC, /* Associativity */ \
{ \
- EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ, \
- EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION, \
+ EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_READ, \
+ EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION, \
0, \
}, \
- 64 /* LineSize */ \
+ 64, /* LineSize */ \
+ 0 /* CacheId */ \
}
#define SBSAQEMU_ACPI_PPTT_L2_CACHE_STRUCT { \
- EFI_ACPI_6_3_PPTT_TYPE_CACHE, \
- sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE), \
+ EFI_ACPI_6_5_PPTT_TYPE_CACHE, \
+ sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE), \
{ EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, \
{ \
1, /* SizePropertyValid */ \
@@ -153,17 +157,19 @@ typedef struct {
1, /* CacheTypeValid */ \
1, /* WritePolicyValid */ \
1, /* LineSizeValid */ \
+ 1, /* CacheIdValid */ \
}, \
0, /* NextLevelOfCache */ \
SBSAQEMU_L2_CACHE_SIZE, /* Size */ \
SBSAQEMU_L2_CACHE_SETS, /* NumberOfSets */ \
SBSAQEMU_L2_CACHE_ASSC, /* Associativity */ \
{ \
- EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, \
- EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED, \
- EFI_ACPI_6_2_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK, \
+ EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, \
+ EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED, \
+ EFI_ACPI_6_5_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK, \
}, \
- 64 /* LineSize */ \
+ 64, /* LineSize */ \
+ 0 /* CacheId */ \
}
#endif
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index 48cec24721d6..8770b2293b92 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
@@ -516,35 +516,36 @@ AddPpttTable (
UINT32 L1DCacheOffset;
UINT32 L1ICacheOffset;
UINT32 L2CacheOffset;
+ UINT32 CacheId;
GetCpuTopology (&CpuTopo);
- EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L1DCache = SBSAQEMU_ACPI_PPTT_L1_D_CACHE_STRUCT;
- EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L1ICache = SBSAQEMU_ACPI_PPTT_L1_I_CACHE_STRUCT;
- EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L2Cache = SBSAQEMU_ACPI_PPTT_L2_CACHE_STRUCT;
+ EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE L1DCache = SBSAQEMU_ACPI_PPTT_L1_D_CACHE_STRUCT;
+ EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE L1ICache = SBSAQEMU_ACPI_PPTT_L1_I_CACHE_STRUCT;
+ EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE L2Cache = SBSAQEMU_ACPI_PPTT_L2_CACHE_STRUCT;
- EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS SocketFlags = {
- EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL,
- EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID,
- EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD,
- EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF,
- EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL
+ EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS SocketFlags = {
+ EFI_ACPI_6_5_PPTT_PACKAGE_PHYSICAL,
+ EFI_ACPI_6_5_PPTT_PROCESSOR_ID_INVALID,
+ EFI_ACPI_6_5_PPTT_PROCESSOR_IS_NOT_THREAD,
+ EFI_ACPI_6_5_PPTT_NODE_IS_NOT_LEAF,
+ EFI_ACPI_6_5_PPTT_IMPLEMENTATION_IDENTICAL
};
- EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS ClusterFlags = {
- EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL,
- EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID,
- EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD,
- EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF,
- EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL
+ EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS ClusterFlags = {
+ EFI_ACPI_6_5_PPTT_PACKAGE_NOT_PHYSICAL,
+ EFI_ACPI_6_5_PPTT_PROCESSOR_ID_INVALID,
+ EFI_ACPI_6_5_PPTT_PROCESSOR_IS_NOT_THREAD,
+ EFI_ACPI_6_5_PPTT_NODE_IS_NOT_LEAF,
+ EFI_ACPI_6_5_PPTT_IMPLEMENTATION_IDENTICAL
};
- EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS CoreFlags = {
- EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL,
- EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID,
- EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD,
- EFI_ACPI_6_3_PPTT_NODE_IS_LEAF,
- EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL
+ EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS CoreFlags = {
+ EFI_ACPI_6_5_PPTT_PACKAGE_NOT_PHYSICAL,
+ EFI_ACPI_6_5_PPTT_PROCESSOR_ID_VALID,
+ EFI_ACPI_6_5_PPTT_PROCESSOR_IS_NOT_THREAD,
+ EFI_ACPI_6_5_PPTT_NODE_IS_LEAF,
+ EFI_ACPI_6_5_PPTT_IMPLEMENTATION_IDENTICAL
};
if (CpuTopo.Threads > 1) {
@@ -553,31 +554,31 @@ AddPpttTable (
CoreFlags.NodeIsALeaf = EFI_ACPI_6_5_PPTT_NODE_IS_NOT_LEAF;
}
- EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS ThreadFlags = {
- EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL,
- EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID,
- EFI_ACPI_6_3_PPTT_PROCESSOR_IS_THREAD,
- EFI_ACPI_6_3_PPTT_NODE_IS_LEAF,
- EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL
+ EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS ThreadFlags = {
+ EFI_ACPI_6_5_PPTT_PACKAGE_NOT_PHYSICAL,
+ EFI_ACPI_6_5_PPTT_PROCESSOR_ID_VALID,
+ EFI_ACPI_6_5_PPTT_PROCESSOR_IS_THREAD,
+ EFI_ACPI_6_5_PPTT_NODE_IS_LEAF,
+ EFI_ACPI_6_5_PPTT_IMPLEMENTATION_IDENTICAL
};
EFI_ACPI_DESCRIPTION_HEADER Header =
SBSAQEMU_ACPI_HEADER (
- EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE,
+ EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE,
EFI_ACPI_DESCRIPTION_HEADER,
- EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION
+ EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION
);
TableSize = sizeof (EFI_ACPI_DESCRIPTION_HEADER) +
- CpuTopo.Sockets * (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) +
- CpuTopo.Clusters * (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) +
- sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE) * 3 +
- CpuTopo.Cores * (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) +
+ CpuTopo.Sockets * (sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR) +
+ CpuTopo.Clusters * (sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR) +
+ sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE) * 3 +
+ CpuTopo.Cores * (sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR) +
sizeof (UINT32) * 2)));
if (CpuTopo.Threads > 1) {
TableSize += CpuTopo.Sockets * CpuTopo.Clusters * CpuTopo.Cores * CpuTopo.Threads *
- sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
+ sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
}
Status = gBS->AllocatePages (
@@ -599,50 +600,54 @@ AddPpttTable (
((EFI_ACPI_DESCRIPTION_HEADER *)New)->Length = TableSize;
New += sizeof (EFI_ACPI_DESCRIPTION_HEADER);
- CpuId = 0;
+ CpuId = 0;
+ CacheId = 1; // 0 is not a valid Cache ID.
SocketOffset = sizeof (EFI_ACPI_DESCRIPTION_HEADER);
for (SocketIndex = 0; SocketIndex < CpuTopo.Sockets; SocketIndex++) {
// Add the Socket PPTT structure
- EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Socket = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT (
+ EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR Socket = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT (
SocketFlags,
0,
0,
0
);
- CopyMem (New, &Socket, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR));
- New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
+ CopyMem (New, &Socket, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR));
+ New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
- ClusterOffset = SocketOffset + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
+ ClusterOffset = SocketOffset + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
for (ClusterIndex = 0; ClusterIndex < CpuTopo.Clusters; ClusterIndex++) {
- L1DCacheOffset = ClusterOffset + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
- L1ICacheOffset = L1DCacheOffset + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE);
- L2CacheOffset = L1ICacheOffset + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE);
- CoreOffset = L2CacheOffset + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE);
+ L1DCacheOffset = ClusterOffset + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
+ L1ICacheOffset = L1DCacheOffset + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE);
+ L2CacheOffset = L1ICacheOffset + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE);
+ CoreOffset = L2CacheOffset + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE);
// Add the Cluster PPTT structure
- EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT (
+ EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR Cluster = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT (
ClusterFlags,
SocketOffset,
0,
0
);
- CopyMem (New, &Cluster, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR));
- New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
+ CopyMem (New, &Cluster, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR));
+ New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
// Add L1 D Cache structure
- CopyMem (New, &L1DCache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE));
- ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache = L2CacheOffset;
- New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE);
+ L1DCache.CacheId = CacheId++;
+ CopyMem (New, &L1DCache, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE));
+ ((EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache = L2CacheOffset;
+ New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE);
// Add L1 I Cache structure
- CopyMem (New, &L1ICache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE));
- ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache = L2CacheOffset;
- New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE);
+ L1ICache.CacheId = CacheId++;
+ CopyMem (New, &L1ICache, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE));
+ ((EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache = L2CacheOffset;
+ New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE);
// Add L2 Cache structure
- CopyMem (New, &L2Cache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE));
- New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE);
+ L2Cache.CacheId = CacheId++;
+ CopyMem (New, &L2Cache, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE));
+ New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE);
for (CoreIndex = 0; CoreIndex < CpuTopo.Cores; CoreIndex++) {
UINT32 *PrivateResourcePtr;
@@ -654,14 +659,14 @@ AddPpttTable (
CoreCpuId = 0;
}
- EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Core = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT (
+ EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR Core = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT (
CoreFlags,
ClusterOffset,
CoreCpuId,
2
);
- CopyMem (New, &Core, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR));
- New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
+ CopyMem (New, &Core, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR));
+ New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
PrivateResourcePtr = (UINT32 *)New;
PrivateResourcePtr[0] = L1DCacheOffset;
@@ -673,21 +678,21 @@ AddPpttTable (
} else {
// Add the Thread PPTT structure
for (ThreadIndex = 0; ThreadIndex < CpuTopo.Threads; ThreadIndex++) {
- EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Thread = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT (
+ EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR Thread = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT (
ThreadFlags,
CoreOffset,
CpuId,
0
);
- CopyMem (New, &Thread, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR));
- New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
+ CopyMem (New, &Thread, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR));
+ New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
CpuId++;
}
- CoreOffset += CpuTopo.Threads * sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
+ CoreOffset += CpuTopo.Threads * sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
}
- CoreOffset += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + sizeof (UINT32) * 2;
+ CoreOffset += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR) + sizeof (UINT32) * 2;
}
ClusterOffset = CoreOffset;
--
2.45.2
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next prev parent reply other threads:[~2024-07-11 11:32 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-11 11:31 [edk2-devel] [PATCH edk2-platforms v5 0/6] SbsaQemu: Align the PPTT tables with QEMU Marcin Juszkiewicz
2024-07-11 11:31 ` [edk2-devel] [PATCH edk2-platforms v5 1/6] SbsaQemu: get the information of CPU topology via SMC calls Marcin Juszkiewicz
2024-07-11 11:31 ` [edk2-devel] [PATCH edk2-platforms v5 2/6] SbsaQemu: align the PPTT tables with QEMU Marcin Juszkiewicz
2024-07-11 11:31 ` Marcin Juszkiewicz [this message]
2024-07-11 11:32 ` [edk2-devel] [PATCH edk2-platforms v5 4/6] SbsaQemu: provide cache info per core in PPTT Marcin Juszkiewicz
2024-07-11 11:32 ` [edk2-devel] [PATCH edk2-platforms v5 5/6] SbsaQemu: introduce helper in PPTT generation Marcin Juszkiewicz
2024-07-11 11:32 ` [edk2-devel] [PATCH edk2-platforms v5 6/6] SbsaQemu: export proper cache values in PPTT Marcin Juszkiewicz
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