From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail05.groups.io (mail05.groups.io [45.79.224.7]) by spool.mail.gandi.net (Postfix) with ESMTPS id C79EB9415A7 for ; Thu, 11 Jul 2024 11:32:22 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=efiKyWbG030tOHjAsmV9AoBzJQ/+r5X73MlB967lqY4=; c=relaxed/simple; d=groups.io; h=From:Date:Subject:MIME-Version:Message-Id:References:In-Reply-To:To:Cc:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Resent-From:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Transfer-Encoding; s=20240206; t=1720697542; v=1; b=C0ahu3SkJPEdDd6BLugUU5BdJDHtm8dNUWP6p/yv32M1bVD6IAOfAMJSEkFwpgiY33UIlZtd r7F86XxbJdFYGVl187ANlbVRtzybxVJys6MfzQKZ+n3VGBUPxbpgiP+o3donZ9GTUUEjyvuMlWC ulURv51ctGhQGGPQ8D1ezlNdSoILZdyM0rBYDx2j5v8H2UXA3HfdeM7Eey1v1E4yHCagYGhvqYi NyjI2EwkA2kA4n0ZE7+4HWkE6joDRQzHx/89rgYzBz3rEIsdiEfY9nCuQjpie6XKCeH/n7Kcemm 3SblC6RySosa+lAGUHLNvB9awV9a++TieS5BGEZ4KGQBA== X-Received: by 127.0.0.2 with SMTP id 8Jr3YY7687511xHTG2CNTht1; Thu, 11 Jul 2024 04:32:21 -0700 X-Received: from muminek.juszkiewicz.com.pl (muminek.juszkiewicz.com.pl [213.251.184.221]) by mx.groups.io with SMTP id smtpd.web11.9666.1720697540201596391 for ; Thu, 11 Jul 2024 04:32:20 -0700 X-Received: from localhost (localhost [127.0.0.1]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTP id 9989C26108F; Thu, 11 Jul 2024 13:32:18 +0200 (CEST) X-Virus-Scanned: Debian amavis at juszkiewicz.com.pl X-Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavis, port 10024) with ESMTP id SCdmGJVyQYRB; Thu, 11 Jul 2024 13:32:16 +0200 (CEST) X-Received: from applejack.lan (83.8.74.165.ipv4.supernova.orange.pl [83.8.74.165]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id 0CC332608E0; Thu, 11 Jul 2024 13:32:14 +0200 (CEST) From: "Marcin Juszkiewicz" Date: Thu, 11 Jul 2024 13:31:59 +0200 Subject: [edk2-devel] [PATCH edk2-platforms v5 3/6] SbsaQemu: update PPTT to ACPI 6.5 MIME-Version: 1.0 Message-Id: <20240711-acpi65-v5-3-a30180b74964@linaro.org> References: <20240711-acpi65-v5-0-a30180b74964@linaro.org> In-Reply-To: <20240711-acpi65-v5-0-a30180b74964@linaro.org> To: devel@edk2.groups.io Cc: Xiong Yining , Marcin Juszkiewicz , Leif Lindholm , Ard Biesheuvel , Graeme Gregory , Chen Baozi , Jonathan Cameron Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Thu, 11 Jul 2024 04:32:20 -0700 Resent-From: marcin.juszkiewicz@linaro.org Reply-To: devel@edk2.groups.io,marcin.juszkiewicz@linaro.org List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: EWzTlCOj11BtMVlSPF6TZBB6x7686176AA= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=C0ahu3Sk; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=linaro.org (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io ACPI 6.5 is the newest version of specification so far. The only functional change to make is handling of CacheId (has to be unique and higher than zero). Signed-off-by: Marcin Juszkiewicz --- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h | 4 +- .../Include/IndustryStandard/SbsaQemuAcpi.h | 46 ++++--- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 129 ++++++++++------= ---- 3 files changed, 95 insertions(+), 84 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.= h b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h index 085c681ba55f..5aaf02e3ca30 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h @@ -90,8 +90,8 @@ typedef struct { =20 #define SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT(Flags, Paren= t, ACPIProcessorID, NumberOfPrivateResources) \ { = \ - EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, = /* Type */ \ - sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + NumberOfPrivateResour= ces * sizeof (UINT32), /* Length */ \ + EFI_ACPI_6_5_PPTT_TYPE_PROCESSOR, = /* Type */ \ + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR) + NumberOfPrivateResour= ces * sizeof (UINT32), /* Length */ \ { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, = /* Reserved */ \ Flags, = /* Flags */ \ Parent, = /* Parent */ \ diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h = b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h index 2f87591e737a..fa2e2b30bb7d 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h @@ -87,13 +87,13 @@ typedef struct { #define SBSAQEMU_L2_CACHE_ASSC 8 =20 #define CLUSTER_INDEX (sizeof (EFI_ACPI_DESCRIPTION_HEADER)) -#define L1_D_CACHE_INDEX (CLUSTER_INDEX + sizeof (EFI_ACPI_6_3_PPTT_STRUC= TURE_PROCESSOR)) -#define L1_I_CACHE_INDEX (L1_D_CACHE_INDEX + sizeof (EFI_ACPI_6_3_PPTT_ST= RUCTURE_CACHE)) -#define L2_CACHE_INDEX (L1_I_CACHE_INDEX + sizeof (EFI_ACPI_6_3_PPTT_ST= RUCTURE_CACHE)) +#define L1_D_CACHE_INDEX (CLUSTER_INDEX + sizeof (EFI_ACPI_6_5_PPTT_STRUC= TURE_PROCESSOR)) +#define L1_I_CACHE_INDEX (L1_D_CACHE_INDEX + sizeof (EFI_ACPI_6_5_PPTT_ST= RUCTURE_CACHE)) +#define L2_CACHE_INDEX (L1_I_CACHE_INDEX + sizeof (EFI_ACPI_6_5_PPTT_ST= RUCTURE_CACHE)) =20 #define SBSAQEMU_ACPI_PPTT_L1_D_CACHE_STRUCT { = \ - EFI_ACPI_6_3_PPTT_TYPE_CACHE, = \ - sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE), = \ + EFI_ACPI_6_5_PPTT_TYPE_CACHE, = \ + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE), = \ { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, = \ { = \ 1, /* SizePropertyValid */ = \ @@ -103,22 +103,24 @@ typedef struct { 1, /* CacheTypeValid */ = \ 1, /* WritePolicyValid */ = \ 1, /* LineSizeValid */ = \ + 1, /* CacheIdValid */ = \ }, = \ 0, /* NextLevelOfCache */ = \ SBSAQEMU_L1_D_CACHE_SIZE, /* Size */ = \ SBSAQEMU_L1_D_CACHE_SETS, /* NumberOfSets */ = \ SBSAQEMU_L1_D_CACHE_ASSC, /* Associativity */ = \ { = \ - EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ - EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_DATA, = \ - EFI_ACPI_6_2_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK, = \ + EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ + EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_DATA, = \ + EFI_ACPI_6_5_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK, = \ }, = \ - 64 /* LineSize */ = \ + 64, /* LineSize */ = \ + 0 /* CacheId */ = \ } =20 #define SBSAQEMU_ACPI_PPTT_L1_I_CACHE_STRUCT { = \ - EFI_ACPI_6_3_PPTT_TYPE_CACHE, = \ - sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE), = \ + EFI_ACPI_6_5_PPTT_TYPE_CACHE, = \ + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE), = \ { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, = \ { = \ 1, /* SizePropertyValid */ = \ @@ -128,22 +130,24 @@ typedef struct { 1, /* CacheTypeValid */ = \ 1, /* WritePolicyValid */ = \ 1, /* LineSizeValid */ = \ + 1, /* CacheIdValid */ = \ }, = \ 0, /* NextLevelOfCache */ = \ SBSAQEMU_L1_I_CACHE_SIZE, /* Size */ = \ SBSAQEMU_L1_I_CACHE_SETS, /* NumberOfSets */ = \ SBSAQEMU_L1_I_CACHE_ASSC, /* Associativity */ = \ { = \ - EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ, = \ - EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION, = \ + EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_READ, = \ + EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION, = \ 0, = \ }, = \ - 64 /* LineSize */ = \ + 64, /* LineSize */ = \ + 0 /* CacheId */ = \ } =20 #define SBSAQEMU_ACPI_PPTT_L2_CACHE_STRUCT { = \ - EFI_ACPI_6_3_PPTT_TYPE_CACHE, = \ - sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE), = \ + EFI_ACPI_6_5_PPTT_TYPE_CACHE, = \ + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE), = \ { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, = \ { = \ 1, /* SizePropertyValid */ = \ @@ -153,17 +157,19 @@ typedef struct { 1, /* CacheTypeValid */ = \ 1, /* WritePolicyValid */ = \ 1, /* LineSizeValid */ = \ + 1, /* CacheIdValid */ = \ }, = \ 0, /* NextLevelOfCache */ = \ SBSAQEMU_L2_CACHE_SIZE, /* Size */ = \ SBSAQEMU_L2_CACHE_SETS, /* NumberOfSets */ = \ SBSAQEMU_L2_CACHE_ASSC, /* Associativity */ = \ { = \ - EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ - EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED, = \ - EFI_ACPI_6_2_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK, = \ + EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ + EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED, = \ + EFI_ACPI_6_5_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK, = \ }, = \ - 64 /* LineSize */ = \ + 64, /* LineSize */ = \ + 0 /* CacheId */ = \ } =20 #endif diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.= c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index 48cec24721d6..8770b2293b92 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -516,35 +516,36 @@ AddPpttTable ( UINT32 L1DCacheOffset; UINT32 L1ICacheOffset; UINT32 L2CacheOffset; + UINT32 CacheId; =20 GetCpuTopology (&CpuTopo); =20 - EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L1DCache =3D SBSAQEMU_ACPI_PPTT_L1_D_= CACHE_STRUCT; - EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L1ICache =3D SBSAQEMU_ACPI_PPTT_L1_I_= CACHE_STRUCT; - EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L2Cache =3D SBSAQEMU_ACPI_PPTT_L2_CA= CHE_STRUCT; + EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE L1DCache =3D SBSAQEMU_ACPI_PPTT_L1_D_= CACHE_STRUCT; + EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE L1ICache =3D SBSAQEMU_ACPI_PPTT_L1_I_= CACHE_STRUCT; + EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE L2Cache =3D SBSAQEMU_ACPI_PPTT_L2_CA= CHE_STRUCT; =20 - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS SocketFlags =3D { - EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL, - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, - EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL + EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS SocketFlags =3D { + EFI_ACPI_6_5_PPTT_PACKAGE_PHYSICAL, + EFI_ACPI_6_5_PPTT_PROCESSOR_ID_INVALID, + EFI_ACPI_6_5_PPTT_PROCESSOR_IS_NOT_THREAD, + EFI_ACPI_6_5_PPTT_NODE_IS_NOT_LEAF, + EFI_ACPI_6_5_PPTT_IMPLEMENTATION_IDENTICAL }; =20 - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS ClusterFlags =3D { - EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, - EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL + EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS ClusterFlags =3D { + EFI_ACPI_6_5_PPTT_PACKAGE_NOT_PHYSICAL, + EFI_ACPI_6_5_PPTT_PROCESSOR_ID_INVALID, + EFI_ACPI_6_5_PPTT_PROCESSOR_IS_NOT_THREAD, + EFI_ACPI_6_5_PPTT_NODE_IS_NOT_LEAF, + EFI_ACPI_6_5_PPTT_IMPLEMENTATION_IDENTICAL }; =20 - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS CoreFlags =3D { - EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, - EFI_ACPI_6_3_PPTT_NODE_IS_LEAF, - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL + EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS CoreFlags =3D { + EFI_ACPI_6_5_PPTT_PACKAGE_NOT_PHYSICAL, + EFI_ACPI_6_5_PPTT_PROCESSOR_ID_VALID, + EFI_ACPI_6_5_PPTT_PROCESSOR_IS_NOT_THREAD, + EFI_ACPI_6_5_PPTT_NODE_IS_LEAF, + EFI_ACPI_6_5_PPTT_IMPLEMENTATION_IDENTICAL }; =20 if (CpuTopo.Threads > 1) { @@ -553,31 +554,31 @@ AddPpttTable ( CoreFlags.NodeIsALeaf =3D EFI_ACPI_6_5_PPTT_NODE_IS_NOT_LEAF; } =20 - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS ThreadFlags =3D { - EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_THREAD, - EFI_ACPI_6_3_PPTT_NODE_IS_LEAF, - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL + EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS ThreadFlags =3D { + EFI_ACPI_6_5_PPTT_PACKAGE_NOT_PHYSICAL, + EFI_ACPI_6_5_PPTT_PROCESSOR_ID_VALID, + EFI_ACPI_6_5_PPTT_PROCESSOR_IS_THREAD, + EFI_ACPI_6_5_PPTT_NODE_IS_LEAF, + EFI_ACPI_6_5_PPTT_IMPLEMENTATION_IDENTICAL }; =20 EFI_ACPI_DESCRIPTION_HEADER Header =3D SBSAQEMU_ACPI_HEADER ( - EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE= , + EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE= , EFI_ACPI_DESCRIPTION_HEADER, - EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION + EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION ); =20 TableSize =3D sizeof (EFI_ACPI_DESCRIPTION_HEADER) + - CpuTopo.Sockets * (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCE= SSOR) + - CpuTopo.Clusters * (sizeof (EFI_ACPI_6_3_= PPTT_STRUCTURE_PROCESSOR) + - sizeof (EFI_ACPI_6_3_= PPTT_STRUCTURE_CACHE) * 3 + - CpuTopo.Cores * (size= of (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + + CpuTopo.Sockets * (sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCE= SSOR) + + CpuTopo.Clusters * (sizeof (EFI_ACPI_6_5_= PPTT_STRUCTURE_PROCESSOR) + + sizeof (EFI_ACPI_6_5_= PPTT_STRUCTURE_CACHE) * 3 + + CpuTopo.Cores * (size= of (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR) + size= of (UINT32) * 2))); =20 if (CpuTopo.Threads > 1) { TableSize +=3D CpuTopo.Sockets * CpuTopo.Clusters * CpuTopo.Cores * Cp= uTopo.Threads * - sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR); } =20 Status =3D gBS->AllocatePages ( @@ -599,50 +600,54 @@ AddPpttTable ( ((EFI_ACPI_DESCRIPTION_HEADER *)New)->Length =3D TableSize; New +=3D sizeof (EFI_ACPI_DESCRI= PTION_HEADER); =20 - CpuId =3D 0; + CpuId =3D 0; + CacheId =3D 1; // 0 is not a valid Cache ID. =20 SocketOffset =3D sizeof (EFI_ACPI_DESCRIPTION_HEADER); for (SocketIndex =3D 0; SocketIndex < CpuTopo.Sockets; SocketIndex++) { // Add the Socket PPTT structure - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Socket =3D SBSAQEMU_ACPI_PROCES= SOR_HIERARCHY_NODE_STRUCTURE_INIT ( + EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR Socket =3D SBSAQEMU_ACPI_PROCES= SOR_HIERARCHY_NODE_STRUCTURE_INIT ( SocketFlags, 0, 0, 0 ); - CopyMem (New, &Socket, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR))= ; - New +=3D sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + CopyMem (New, &Socket, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR))= ; + New +=3D sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR); =20 - ClusterOffset =3D SocketOffset + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_P= ROCESSOR); + ClusterOffset =3D SocketOffset + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_P= ROCESSOR); for (ClusterIndex =3D 0; ClusterIndex < CpuTopo.Clusters; ClusterIndex= ++) { - L1DCacheOffset =3D ClusterOffset + sizeof (EFI_ACPI_6_3_PPTT_STRUCTU= RE_PROCESSOR); - L1ICacheOffset =3D L1DCacheOffset + sizeof (EFI_ACPI_6_3_PPTT_STRUCT= URE_CACHE); - L2CacheOffset =3D L1ICacheOffset + sizeof (EFI_ACPI_6_3_PPTT_STRUCT= URE_CACHE); - CoreOffset =3D L2CacheOffset + sizeof (EFI_ACPI_6_3_PPTT_STRUCTU= RE_CACHE); + L1DCacheOffset =3D ClusterOffset + sizeof (EFI_ACPI_6_5_PPTT_STRUCTU= RE_PROCESSOR); + L1ICacheOffset =3D L1DCacheOffset + sizeof (EFI_ACPI_6_5_PPTT_STRUCT= URE_CACHE); + L2CacheOffset =3D L1ICacheOffset + sizeof (EFI_ACPI_6_5_PPTT_STRUCT= URE_CACHE); + CoreOffset =3D L2CacheOffset + sizeof (EFI_ACPI_6_5_PPTT_STRUCTU= RE_CACHE); =20 // Add the Cluster PPTT structure - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster =3D SBSAQEMU_ACPI_PRO= CESSOR_HIERARCHY_NODE_STRUCTURE_INIT ( + EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR Cluster =3D SBSAQEMU_ACPI_PRO= CESSOR_HIERARCHY_NODE_STRUCTURE_INIT ( ClusterFlags, SocketOffset, 0, 0 ); - CopyMem (New, &Cluster, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSO= R)); - New +=3D sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + CopyMem (New, &Cluster, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSO= R)); + New +=3D sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR); =20 // Add L1 D Cache structure - CopyMem (New, &L1DCache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE))= ; - ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache =3D L2C= acheOffset; - New +=3D siz= eof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); + L1DCache.CacheId =3D CacheId++; + CopyMem (New, &L1DCache, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE))= ; + ((EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache =3D L2C= acheOffset; + New +=3D siz= eof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE); =20 // Add L1 I Cache structure - CopyMem (New, &L1ICache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE))= ; - ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache =3D L2C= acheOffset; - New +=3D siz= eof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); + L1ICache.CacheId =3D CacheId++; + CopyMem (New, &L1ICache, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE))= ; + ((EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache =3D L2C= acheOffset; + New +=3D siz= eof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE); =20 // Add L2 Cache structure - CopyMem (New, &L2Cache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE)); - New +=3D sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE); + L2Cache.CacheId =3D CacheId++; + CopyMem (New, &L2Cache, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE)); + New +=3D sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE); =20 for (CoreIndex =3D 0; CoreIndex < CpuTopo.Cores; CoreIndex++) { UINT32 *PrivateResourcePtr; @@ -654,14 +659,14 @@ AddPpttTable ( CoreCpuId =3D 0; } =20 - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Core =3D SBSAQEMU_ACPI_PROC= ESSOR_HIERARCHY_NODE_STRUCTURE_INIT ( + EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR Core =3D SBSAQEMU_ACPI_PROC= ESSOR_HIERARCHY_NODE_STRUCTURE_INIT ( CoreFlags, ClusterOffset, CoreCpuId, 2 ); - CopyMem (New, &Core, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR= )); - New +=3D sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + CopyMem (New, &Core, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR= )); + New +=3D sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR); =20 PrivateResourcePtr =3D (UINT32 *)New; PrivateResourcePtr[0] =3D L1DCacheOffset; @@ -673,21 +678,21 @@ AddPpttTable ( } else { // Add the Thread PPTT structure for (ThreadIndex =3D 0; ThreadIndex < CpuTopo.Threads; ThreadInd= ex++) { - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Thread =3D SBSAQEMU_ACP= I_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT ( + EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR Thread =3D SBSAQEMU_ACP= I_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT ( ThreadFlags, CoreOffset, CpuId, 0 ); - CopyMem (New, &Thread, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PRO= CESSOR)); - New +=3D sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR); + CopyMem (New, &Thread, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PRO= CESSOR)); + New +=3D sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR); CpuId++; } =20 - CoreOffset +=3D CpuTopo.Threads * sizeof (EFI_ACPI_6_3_PPTT_STR= UCTURE_PROCESSOR); + CoreOffset +=3D CpuTopo.Threads * sizeof (EFI_ACPI_6_5_PPTT_STR= UCTURE_PROCESSOR); } =20 - CoreOffset +=3D sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + s= izeof (UINT32) * 2; + CoreOffset +=3D sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR) + s= izeof (UINT32) * 2; } =20 ClusterOffset =3D CoreOffset; --=20 2.45.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119896): https://edk2.groups.io/g/devel/message/119896 Mute This Topic: https://groups.io/mt/107160642/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-