From: "Marcin Juszkiewicz" <marcin.juszkiewicz@linaro.org>
To: devel@edk2.groups.io
Cc: Xiong Yining <xiongyining1480@phytium.com.cn>,
Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>,
Leif Lindholm <quic_llindhol@quicinc.com>,
Ard Biesheuvel <ardb+tianocore@kernel.org>,
Graeme Gregory <graeme@xora.org.uk>,
Chen Baozi <chenbaozi@phytium.com.cn>,
Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Subject: [edk2-devel] [PATCH edk2-platforms v5 5/6] SbsaQemu: introduce helper in PPTT generation
Date: Thu, 11 Jul 2024 13:32:01 +0200 [thread overview]
Message-ID: <20240711-acpi65-v5-5-a30180b74964@linaro.org> (raw)
In-Reply-To: <20240711-acpi65-v5-0-a30180b74964@linaro.org>
Function AddPpttTable() adding PPTT got too long. This change moves part
of it into helper function AddCoresToPpttTable() which takes care of
generating entries for Core and below (Cache, Thread).
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 243 +++++++++++---------
1 file changed, 133 insertions(+), 110 deletions(-)
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index e4bdd5edbd95..61f9de45d082 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
@@ -31,6 +31,9 @@ static UINTN GicItsBase;
#pragma pack ()
+static UINTN mCpuId;
+static UINTN mCacheId;
+
/*
* A Function to Compute the ACPI Table Checksum
*/
@@ -491,6 +494,127 @@ AddSsdtTable (
return Status;
}
+STATIC
+UINT32
+AddCoresToPpttTable (
+ UINT8 *New,
+ UINT32 ClusterOffset,
+ CpuTopology CpuTopo
+ )
+{
+ UINT32 L1DCacheOffset;
+ UINT32 L1ICacheOffset;
+ UINT32 L2CacheOffset;
+ UINT32 CoreOffset;
+ UINT32 Offset;
+ UINT32 CoreCpuId;
+ UINT32 CoreIndex;
+ UINT32 ThreadIndex;
+ UINT32 *PrivateResourcePtr;
+
+ EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS CoreFlags = {
+ EFI_ACPI_6_5_PPTT_PACKAGE_NOT_PHYSICAL,
+ EFI_ACPI_6_5_PPTT_PROCESSOR_ID_VALID,
+ EFI_ACPI_6_5_PPTT_PROCESSOR_IS_NOT_THREAD,
+ EFI_ACPI_6_5_PPTT_NODE_IS_LEAF,
+ EFI_ACPI_6_5_PPTT_IMPLEMENTATION_IDENTICAL
+ };
+
+ if (CpuTopo.Threads > 1) {
+ // The Thread structure is the leaf structure, adjust the value of CoreFlags.
+ CoreFlags.AcpiProcessorIdValid = EFI_ACPI_6_5_PPTT_PROCESSOR_ID_INVALID;
+ CoreFlags.NodeIsALeaf = EFI_ACPI_6_5_PPTT_NODE_IS_NOT_LEAF;
+ }
+
+ EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS ThreadFlags = {
+ EFI_ACPI_6_5_PPTT_PACKAGE_NOT_PHYSICAL,
+ EFI_ACPI_6_5_PPTT_PROCESSOR_ID_VALID,
+ EFI_ACPI_6_5_PPTT_PROCESSOR_IS_THREAD,
+ EFI_ACPI_6_5_PPTT_NODE_IS_LEAF,
+ EFI_ACPI_6_5_PPTT_IMPLEMENTATION_IDENTICAL
+ };
+
+ EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE L1DCache = SBSAQEMU_ACPI_PPTT_L1_D_CACHE_STRUCT;
+ EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE L1ICache = SBSAQEMU_ACPI_PPTT_L1_I_CACHE_STRUCT;
+ EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE L2Cache = SBSAQEMU_ACPI_PPTT_L2_CACHE_STRUCT;
+
+ CoreOffset = ClusterOffset + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
+ Offset = CoreOffset;
+
+ for (CoreIndex = 0; CoreIndex < CpuTopo.Cores; CoreIndex++) {
+ if (CpuTopo.Threads == 1) {
+ CoreCpuId = mCpuId;
+ } else {
+ CoreCpuId = 0;
+ }
+
+ // space for Core + PrivateResourcePtr
+ Offset += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
+ Offset += sizeof (UINT32) * 2;
+
+ L1DCacheOffset = Offset;
+ L1ICacheOffset = L1DCacheOffset + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE);
+ L2CacheOffset = L1ICacheOffset + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE);
+
+ EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR Core = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT (
+ CoreFlags,
+ ClusterOffset,
+ CoreCpuId,
+ 2
+ );
+
+ CopyMem (New, &Core, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR));
+ New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
+
+ PrivateResourcePtr = (UINT32 *)New;
+ PrivateResourcePtr[0] = L1DCacheOffset;
+ PrivateResourcePtr[1] = L1ICacheOffset;
+ New += (2 * sizeof (UINT32));
+
+ // Add L1 D Cache structure
+ L1DCache.CacheId = mCacheId++;
+ CopyMem (New, &L1DCache, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE));
+ ((EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache = L2CacheOffset;
+ New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE);
+
+ // Add L1 I Cache structure
+ L1ICache.CacheId = mCacheId++;
+ CopyMem (New, &L1ICache, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE));
+ ((EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache = L2CacheOffset;
+ New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE);
+
+ // Add L2 Cache structure
+ L2Cache.CacheId = mCacheId++;
+ CopyMem (New, &L2Cache, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE));
+ New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE);
+
+ Offset += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE) * 3;
+
+ if (CpuTopo.Threads == 1) {
+ mCpuId++;
+ } else {
+ // Add the Thread PPTT structure
+ for (ThreadIndex = 0; ThreadIndex < CpuTopo.Threads; ThreadIndex++) {
+ EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR Thread = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT (
+ ThreadFlags,
+ CoreOffset,
+ mCpuId,
+ 0
+ );
+ CopyMem (New, &Thread, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR));
+ New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
+ mCpuId++;
+ }
+
+ Offset += CpuTopo.Threads * sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
+ }
+
+ CoreOffset = Offset;
+ }
+
+ return CoreOffset - ClusterOffset;
+}
+
/*
* A function that adds the PPTT ACPI table.
*/
@@ -502,28 +626,17 @@ AddPpttTable (
EFI_STATUS Status;
UINTN TableHandle;
UINT32 TableSize;
- EFI_PHYSICAL_ADDRESS PageAddress;
- UINT8 *New;
- UINT32 CpuId;
- CpuTopology CpuTopo;
+ UINT32 CoresPartSize;
UINT32 SocketIndex;
UINT32 ClusterIndex;
- UINT32 CoreIndex;
- UINT32 ThreadIndex;
UINT32 SocketOffset;
UINT32 ClusterOffset;
- UINT32 CoreOffset;
- UINT32 L1DCacheOffset;
- UINT32 L1ICacheOffset;
- UINT32 L2CacheOffset;
- UINT32 CacheId;
+ EFI_PHYSICAL_ADDRESS PageAddress;
+ UINT8 *New;
+ CpuTopology CpuTopo;
GetCpuTopology (&CpuTopo);
- EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE L1DCache = SBSAQEMU_ACPI_PPTT_L1_D_CACHE_STRUCT;
- EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE L1ICache = SBSAQEMU_ACPI_PPTT_L1_I_CACHE_STRUCT;
- EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE L2Cache = SBSAQEMU_ACPI_PPTT_L2_CACHE_STRUCT;
-
EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS SocketFlags = {
EFI_ACPI_6_5_PPTT_PACKAGE_PHYSICAL,
EFI_ACPI_6_5_PPTT_PROCESSOR_ID_INVALID,
@@ -540,28 +653,6 @@ AddPpttTable (
EFI_ACPI_6_5_PPTT_IMPLEMENTATION_IDENTICAL
};
- EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS CoreFlags = {
- EFI_ACPI_6_5_PPTT_PACKAGE_NOT_PHYSICAL,
- EFI_ACPI_6_5_PPTT_PROCESSOR_ID_VALID,
- EFI_ACPI_6_5_PPTT_PROCESSOR_IS_NOT_THREAD,
- EFI_ACPI_6_5_PPTT_NODE_IS_LEAF,
- EFI_ACPI_6_5_PPTT_IMPLEMENTATION_IDENTICAL
- };
-
- if (CpuTopo.Threads > 1) {
- // The Thread structure is the leaf structure, adjust the value of CoreFlags.
- CoreFlags.AcpiProcessorIdValid = EFI_ACPI_6_5_PPTT_PROCESSOR_ID_INVALID;
- CoreFlags.NodeIsALeaf = EFI_ACPI_6_5_PPTT_NODE_IS_NOT_LEAF;
- }
-
- EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS ThreadFlags = {
- EFI_ACPI_6_5_PPTT_PACKAGE_NOT_PHYSICAL,
- EFI_ACPI_6_5_PPTT_PROCESSOR_ID_VALID,
- EFI_ACPI_6_5_PPTT_PROCESSOR_IS_THREAD,
- EFI_ACPI_6_5_PPTT_NODE_IS_LEAF,
- EFI_ACPI_6_5_PPTT_IMPLEMENTATION_IDENTICAL
- };
-
EFI_ACPI_DESCRIPTION_HEADER Header =
SBSAQEMU_ACPI_HEADER (
EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE,
@@ -600,8 +691,8 @@ AddPpttTable (
((EFI_ACPI_DESCRIPTION_HEADER *)New)->Length = TableSize;
New += sizeof (EFI_ACPI_DESCRIPTION_HEADER);
- CpuId = 0;
- CacheId = 1; // 0 is not a valid Cache ID.
+ mCpuId = 0;
+ mCacheId = 1; // 0 is not a valid Cache ID.
SocketOffset = sizeof (EFI_ACPI_DESCRIPTION_HEADER);
for (SocketIndex = 0; SocketIndex < CpuTopo.Sockets; SocketIndex++) {
@@ -627,77 +718,9 @@ AddPpttTable (
CopyMem (New, &Cluster, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR));
New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
- CoreOffset = ClusterOffset + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
- for (CoreIndex = 0; CoreIndex < CpuTopo.Cores; CoreIndex++) {
- UINT32 *PrivateResourcePtr;
- UINT32 CoreCpuId;
-
- // two UINT32s for PrivateResourcePtr data
- L1DCacheOffset = CoreOffset + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR) + sizeof (UINT32) * 2;
- L1ICacheOffset = L1DCacheOffset + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE);
- L2CacheOffset = L1ICacheOffset + sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE);
-
- if (CpuTopo.Threads == 1) {
- CoreCpuId = CpuId;
- } else {
- CoreCpuId = 0;
- }
-
- EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR Core = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT (
- CoreFlags,
- ClusterOffset,
- CoreCpuId,
- 2
- );
- CopyMem (New, &Core, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR));
- New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
-
- PrivateResourcePtr = (UINT32 *)New;
- PrivateResourcePtr[0] = L1DCacheOffset;
- PrivateResourcePtr[1] = L1ICacheOffset;
- New += (2 * sizeof (UINT32));
-
- // Add L1 D Cache structure
- L1DCache.CacheId = CacheId++;
- CopyMem (New, &L1DCache, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE));
- ((EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache = L2CacheOffset;
- New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE);
-
- // Add L1 I Cache structure
- L1ICache.CacheId = CacheId++;
- CopyMem (New, &L1ICache, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE));
- ((EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache = L2CacheOffset;
- New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE);
-
- // Add L2 Cache structure
- L2Cache.CacheId = CacheId++;
- CopyMem (New, &L2Cache, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE));
- New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE);
-
- if (CpuTopo.Threads == 1) {
- CpuId++;
- } else {
- // Add the Thread PPTT structure
- for (ThreadIndex = 0; ThreadIndex < CpuTopo.Threads; ThreadIndex++) {
- EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR Thread = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT (
- ThreadFlags,
- CoreOffset,
- CpuId,
- 0
- );
- CopyMem (New, &Thread, sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR));
- New += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
- CpuId++;
- }
-
- CoreOffset += CpuTopo.Threads * sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
- }
-
- CoreOffset += sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR) + sizeof (UINT32) * 2;
- CoreOffset += 3 * sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE);
- }
-
- ClusterOffset = CoreOffset;
+ CoresPartSize = AddCoresToPpttTable (New, ClusterOffset, CpuTopo);
+ ClusterOffset += CoresPartSize;
+ New += CoresPartSize - sizeof (EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR);
}
SocketOffset = ClusterOffset;
--
2.45.2
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next prev parent reply other threads:[~2024-07-11 11:32 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-11 11:31 [edk2-devel] [PATCH edk2-platforms v5 0/6] SbsaQemu: Align the PPTT tables with QEMU Marcin Juszkiewicz
2024-07-11 11:31 ` [edk2-devel] [PATCH edk2-platforms v5 1/6] SbsaQemu: get the information of CPU topology via SMC calls Marcin Juszkiewicz
2024-07-11 11:31 ` [edk2-devel] [PATCH edk2-platforms v5 2/6] SbsaQemu: align the PPTT tables with QEMU Marcin Juszkiewicz
2024-07-11 11:31 ` [edk2-devel] [PATCH edk2-platforms v5 3/6] SbsaQemu: update PPTT to ACPI 6.5 Marcin Juszkiewicz
2024-07-11 11:32 ` [edk2-devel] [PATCH edk2-platforms v5 4/6] SbsaQemu: provide cache info per core in PPTT Marcin Juszkiewicz
2024-07-11 11:32 ` Marcin Juszkiewicz [this message]
2024-07-11 11:32 ` [edk2-devel] [PATCH edk2-platforms v5 6/6] SbsaQemu: export proper cache values " Marcin Juszkiewicz
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