From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail05.groups.io (mail05.groups.io [45.79.224.7]) by spool.mail.gandi.net (Postfix) with ESMTPS id 74171D80473 for ; Sat, 20 Jul 2024 19:54:13 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=Q4kLNfzcvmzbD4WFvY3XG6LqHyUzBthcz9eUfA9V1YE=; c=relaxed/simple; d=groups.io; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Resent-From:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding:Content-Type; s=20240206; t=1721505253; v=1; b=NJxc+g2ErxdmrbWrHuIox8lFftRpq1qQ72hswhkhKCLj0REaBobhyK+0y7ROp9riDl58EYDC MYIVMBSssNOgHUCjyetI3dz0+h6B5lJg9frQHJg8P1UdqVHo8NZ2CFrAR3PVn5dogEPQn7URbY9 bNyjF5DeJoLszYjGtUl15nGutsQ9q5wx+MJWxRelNG8I2B2oEmlz7Bj7/FV5E4iHdNVh4vMs+x2 TTQ3IPSunAXxdJfmu35QzNt7rKH094RFO+107wNeXPRdgprCGaawSJ9862tax6z/n+1VoGqSkBs EIpQltPm7TaN7puV+FWt6s/f/AycD6EaYz0+d1E9t4BXA== X-Received: by 127.0.0.2 with SMTP id P9GuYY7687511xV2yT5TNMpA; Sat, 20 Jul 2024 12:54:11 -0700 X-Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mx.groups.io with SMTP id smtpd.web11.12632.1721505251382983318 for ; Sat, 20 Jul 2024 12:54:11 -0700 X-Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 46KJn3I8028425; Sat, 20 Jul 2024 12:54:08 -0700 X-Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 40gcrj8fme-4 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 20 Jul 2024 12:54:08 -0700 (PDT) X-Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sat, 20 Jul 2024 12:53:30 -0700 X-Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Sat, 20 Jul 2024 12:53:30 -0700 X-Received: from MRVL-5Lp9he46Ey.marvell.com (unknown [10.193.3.166]) by maili.marvell.com (Postfix) with ESMTP id A42C13F705D; Sat, 20 Jul 2024 12:53:29 -0700 (PDT) From: "Narinder Dhillon" To: CC: , , , , Narinder Dhillon Subject: [edk2-devel] [edk2-platforms PATCH v4 5/7] Silicon/Marvell: Driver to publish device tree Date: Sat, 20 Jul 2024 12:53:21 -0700 Message-ID: <20240720195323.130619-6-ndhillon@marvell.com> In-Reply-To: <20240720195323.130619-1-ndhillon@marvell.com> References: <20240720195323.130619-1-ndhillon@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: qmiNsKOCU2tSbgBwjRmS4P5lihykmpHY X-Proofpoint-GUID: qmiNsKOCU2tSbgBwjRmS4P5lihykmpHY Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Sat, 20 Jul 2024 12:54:11 -0700 Resent-From: ndhillon@marvell.com Reply-To: devel@edk2.groups.io,ndhillon@marvell.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: ZByv3bCNL3Mn2djs29MDmKSXx7686176AA= Content-Transfer-Encoding: 8bit Content-Type: text/plain X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=NJxc+g2E; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=marvell.com (policy=none) From: Narinder Dhillon This patch adds driver that can provide device tree to OS if user so wishes. PCD's are used to enable this, default is not to take this action. Signed-off-by: Narinder Dhillon --- .../Drivers/Fdt/FdtPlatformDxe/FdtPlatform.c | 255 ++++++++++++++++++ .../Fdt/FdtPlatformDxe/FdtPlatformDxe.inf | 49 ++++ .../MarvellSiliconPkg/MarvellSiliconPkg.dec | 21 ++ 3 files changed, 325 insertions(+) create mode 100644 Silicon/Marvell/Drivers/Fdt/FdtPlatformDxe/FdtPlatform.c create mode 100644 Silicon/Marvell/Drivers/Fdt/FdtPlatformDxe/FdtPlatformDxe.inf diff --git a/Silicon/Marvell/Drivers/Fdt/FdtPlatformDxe/FdtPlatform.c b/Silicon/Marvell/Drivers/Fdt/FdtPlatformDxe/FdtPlatform.c new file mode 100644 index 0000000000..e328d5fe5e --- /dev/null +++ b/Silicon/Marvell/Drivers/Fdt/FdtPlatformDxe/FdtPlatform.c @@ -0,0 +1,255 @@ +/** @file + + SPDX-License-Identifier: BSD-2-Clause-Patent + https://spdx.org/licenses + + Copyright (C) 2023 Marvell + + Copyright (c) 2015, ARM Ltd. All rights reserved.
+ +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +// +// Internal variables +// + +VOID *mFdtBlobBase; + +EFI_STATUS +DeleteFdtNode ( + IN VOID *FdtAddr, + CONST CHAR8 *NodePath, + CONST CHAR8 *Compatible +) +{ + INTN Offset = -1; + INTN Return; + + if ((NodePath != NULL) && (Compatible != NULL)) { + return EFI_INVALID_PARAMETER; + } + + if (NodePath != NULL) { + Offset = fdt_path_offset (FdtAddr, NodePath); + + DEBUG ((DEBUG_INFO, "Offset: %d\n", Offset)); + + if (Offset < 0) { + DEBUG ((DEBUG_ERROR, "Error getting the device node %a offset: %a\n", + NodePath, fdt_strerror (Offset))); + return EFI_NOT_FOUND; + } + } + + if (Compatible != NULL) { + Offset = fdt_node_offset_by_compatible (FdtAddr, -1, Compatible); + + DEBUG ((DEBUG_INFO, "Offset: %d\n", Offset)); + + if (Offset < 0) { + DEBUG ((DEBUG_ERROR, "Error getting the device node for %a offset: %a\n", + Compatible, fdt_strerror (Offset))); + return EFI_NOT_FOUND; + } + } + + if (Offset >= 0) { + Return = fdt_del_node (FdtAddr, Offset); + + DEBUG ((DEBUG_INFO, "Return: %d\n", Return)); + + if (Return < 0) { + DEBUG ((DEBUG_ERROR, "Error deleting the device node %a: %a\n", + NodePath, fdt_strerror (Return))); + return EFI_NOT_FOUND; + } + } + + return EFI_SUCCESS; +} + +EFI_STATUS +DeleteRtcNode ( + IN VOID *FdtAddr + ) +{ + INT32 Offset, NameLen, Return; + BOOLEAN Found; + CONST CHAR8 *Name; + + Found = FALSE; + for (Offset = fdt_next_node(FdtAddr, 0, NULL); + Offset >= 0; + Offset = fdt_next_node(FdtAddr, Offset, NULL)) { + + Name = fdt_get_name(FdtAddr, Offset, &NameLen); + if (!Name) { + continue; + } + + if ((Name[0] == 'r') && (Name[1] == 't') && (Name[2] == 'c')) { + Found = TRUE; + break; + } + } + + if (Found == TRUE) { + Return = fdt_del_node (FdtAddr, Offset); + + if (Return < 0) { + DEBUG ((DEBUG_ERROR, "Error deleting the device node %a\n", Name)); + return EFI_NOT_FOUND; + } + } + + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +FdtFixup( + IN VOID *FdtAddr + ) +{ + EFI_STATUS Status = EFI_SUCCESS; + + if (FeaturePcdGet(PcdFixupFdt)) { + Status |= DeleteFdtNode (FdtAddr, (CHAR8*)PcdGetPtr (PcdFdtConfigRootNode), NULL); + + // Hide the RTC + Status |= DeleteRtcNode (FdtAddr); + } + + if (!EFI_ERROR(Status)) { + fdt_pack(FdtAddr); + } + + return EFI_SUCCESS; +} + + +/** + Install the FDT specified by its device path in text form. + + @retval EFI_SUCCESS The FDT was installed. + @retval EFI_NOT_FOUND Failed to locate a protocol or a file. + @retval EFI_INVALID_PARAMETER Invalid device path. + @retval EFI_UNSUPPORTED Device path not supported. + @retval EFI_OUT_OF_RESOURCES An allocation failed. +**/ +STATIC +EFI_STATUS +InstallFdt ( + IN UINTN FdtBlobSize +) +{ + EFI_STATUS Status; + VOID *FdtConfigurationTableBase; + + Status = EFI_SUCCESS; + + FdtConfigurationTableBase = AllocateRuntimeCopyPool (FdtBlobSize, mFdtBlobBase); + if (FdtConfigurationTableBase == NULL) { + goto Error; + } + Status = FdtFixup((VOID*)FdtConfigurationTableBase); + if (EFI_ERROR (Status)) { + FreePool (FdtConfigurationTableBase); + goto Error; + } + // + // Install the FDT into the Configuration Table + // + Status = gBS->InstallConfigurationTable ( + &gFdtTableGuid, + FdtConfigurationTableBase + ); + if (EFI_ERROR (Status)) { + FreePool (FdtConfigurationTableBase); + } + +Error: + return Status; +} + +/** + Main entry point of the FDT platform driver. + + @param[in] ImageHandle The firmware allocated handle for the present driver + UEFI image. + @param[in] *SystemTable A pointer to the EFI System table. + + @retval EFI_SUCCESS The driver was initialized. + @retval EFI_OUT_OF_RESOURCES The "End of DXE" event could not be allocated or + there was not enough memory in pool to install + the Shell Dynamic Command protocol. + @retval EFI_LOAD_ERROR Unable to add the HII package. + +**/ +EFI_STATUS +FdtPlatformEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + VOID *HobList; + EFI_HOB_GUID_TYPE *GuidHob; + UINTN FdtBlobSize; + + // + // Get the HOB list. If it is not present, then ASSERT. + // + HobList = GetHobList (); + ASSERT (HobList != NULL); + + // + // Search for FDT GUID HOB. If it is not present, then + // there's nothing we can do. It may not exist on the update path. + // + GuidHob = GetNextGuidHob (&gFdtHobGuid, HobList); + if (GuidHob != NULL) { + mFdtBlobBase = (VOID *)*(UINT64 *)(GET_GUID_HOB_DATA (GuidHob)); + FdtBlobSize = fdt_totalsize((VOID *)mFdtBlobBase); + + // + // Ensure that the FDT header is valid and that the Size of the Device Tree + // is smaller than the size of the read file + // + if (fdt_check_header (mFdtBlobBase)) { + DEBUG ((DEBUG_ERROR, "InstallFdt() - FDT blob seems to be corrupt\n")); + mFdtBlobBase = NULL; + Status = EFI_LOAD_ERROR; + goto Error; + } + } else { + Status = EFI_NOT_FOUND; + goto Error; + } + + // + // Install the Device Tree from its expected location + // + if (FeaturePcdGet(PcdPublishFdt)) { + Status = InstallFdt (FdtBlobSize); + } + + ASSERT_EFI_ERROR(Status); + +Error: + return Status; +} diff --git a/Silicon/Marvell/Drivers/Fdt/FdtPlatformDxe/FdtPlatformDxe.inf b/Silicon/Marvell/Drivers/Fdt/FdtPlatformDxe/FdtPlatformDxe.inf new file mode 100644 index 0000000000..4e254f17cb --- /dev/null +++ b/Silicon/Marvell/Drivers/Fdt/FdtPlatformDxe/FdtPlatformDxe.inf @@ -0,0 +1,49 @@ +#/** @file +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# https://spdx.org/licenses +# +# Copyright (C) 2023 Marvell +# +# Copyright (c) 2015, ARM Ltd. All rights reserved.
+# +#**/ + +[Defines] + INF_VERSION = 0x00010006 + BASE_NAME = FdtPlatformDxe + FILE_GUID = 6e9a4c69-57c6-4fcd-b083-4f2c3bdb6051 + MODULE_TYPE = UEFI_DRIVER + VERSION_STRING = 0.1 + ENTRY_POINT = FdtPlatformEntryPoint + +[Sources.common] + FdtPlatform.c + +[Packages] + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Platform/ARM/ARM.dec + Silicon/Marvell/MarvellSiliconPkg/MarvellSiliconPkg.dec + +[LibraryClasses] + UefiDriverEntryPoint + BaseMemoryLib + DebugLib + FdtLib + HobLib + +[Guids] + gFdtHobGuid + gFdtTableGuid + +[FeaturePcd] + gMarvellSiliconTokenSpaceGuid.PcdPublishFdt + gMarvellSiliconTokenSpaceGuid.PcdFixupFdt + +[FixedPcd] + gMarvellSiliconTokenSpaceGuid.PcdFdtConfigRootNode + +[Depex] + TRUE diff --git a/Silicon/Marvell/MarvellSiliconPkg/MarvellSiliconPkg.dec b/Silicon/Marvell/MarvellSiliconPkg/MarvellSiliconPkg.dec index 1e17152f13..8d1a842aab 100644 --- a/Silicon/Marvell/MarvellSiliconPkg/MarvellSiliconPkg.dec +++ b/Silicon/Marvell/MarvellSiliconPkg/MarvellSiliconPkg.dec @@ -28,6 +28,7 @@ gShellEepromHiiGuid = { 0xb2f4c714, 0x147f, 0x4ff7, { 0x82, 0x1b, 0xce, 0x7b, 0x91, 0x7f, 0x5f, 0x2f } } gShellFUpdateHiiGuid = { 0x9b5d2176, 0x590a, 0x49db, { 0x89, 0x5d, 0x4a, 0x70, 0xfe, 0xad, 0xbe, 0x24 } } gShellSfHiiGuid = { 0x03a67756, 0x8cde, 0x4638, { 0x82, 0x34, 0x4a, 0x0f, 0x6d, 0x58, 0x81, 0x39 } } + gShellDumpFdtHiiGuid = { 0x8afa7610, 0x62b1, 0x46aa, { 0xb5, 0x34, 0xc3, 0xde, 0xff, 0x39, 0x77, 0x8c } } [LibraryClasses] ArmadaBoardDescLib|Include/Library/ArmadaBoardDescLib.h @@ -36,12 +37,15 @@ MvGpioLib|Include/Library/MvGpioLib.h NonDiscoverableInitLib|Include/Library/NonDiscoverableInitLib.h SampleAtResetLib|Include/Library/SampleAtResetLib.h + SmcLib|Include/IndustryStandard/smcLib.h [Protocols] # installed as a protocol by PlatInitDxe to force ordering between DXE drivers # that depend on the lowlevel platform initialization having been completed gMarvellPlatformInitCompleteProtocolGuid = { 0x465b8cf7, 0x016f, 0x4ba6, { 0xbe, 0x6b, 0x28, 0x0e, 0x3a, 0x7d, 0x38, 0x6f } } + gMrvlFdtClientProtocolGuid = { 0xE11FACA0, 0x4710, 0x4C8E, { 0xA7, 0xA2, 0x01, 0xBA, 0xA2, 0x59, 0x1B, 0x4C } } + [PcdsFixedAtBuild.common] #Board description gMarvellSiliconTokenSpaceGuid.PcdMaxCpCount|0x2|UINT8|0x30000072 @@ -198,6 +202,23 @@ gMarvellSiliconTokenSpaceGuid.PcdOpTeeRegionBase|0x0|UINT64|0x50000004 gMarvellSiliconTokenSpaceGuid.PcdOpTeeRegionSize|0x0|UINT32|0x50000005 +# FDT + # FDT configuration node to be stripped before passing to OS + gMarvellSiliconTokenSpaceGuid.PcdFdtConfigRootNode|"/marvell,ebf"|VOID*|0x50000090 + + gMarvellSiliconTokenSpaceGuid.PcdNodeDramBase|0x10000000000|UINT64|0x00000004 + gMarvellSiliconTokenSpaceGuid.PcdIoBaseAddress|0x800000000000|UINT64|0x00000005 + gMarvellSiliconTokenSpaceGuid.PcdNodeIoBaseAddress|0x100000000000|UINT64|0x00000006 + gMarvellSiliconTokenSpaceGuid.PcdIoSize|0xF0000000000|UINT64|0x00000007 + + gMarvellSiliconTokenSpaceGuid.PcdGtiWatchdogBase64|0x802000000000|UINT64|0x00000008 + +[PcdsFeatureFlag.common] + # Publish FDT to the OS as Configuration Table with gFdtTableGuid + gMarvellSiliconTokenSpaceGuid.PcdPublishFdt|FALSE|BOOLEAN|0x50000091 + # Fixup the FDT or not (taken into consideration only when PcdPublishFdt = TRUE) + gMarvellSiliconTokenSpaceGuid.PcdFixupFdt|TRUE|BOOLEAN|0x50000092 + [Protocols] gMarvellBoardDescProtocolGuid = { 0xebed8738, 0xd4a6, 0x4001, { 0xa9, 0xc9, 0x52, 0xb0, 0xcb, 0x7d, 0xdb, 0xf9 }} gMarvellEepromProtocolGuid = { 0x71954bda, 0x60d3, 0x4ef8, { 0x8e, 0x3c, 0x0e, 0x33, 0x9f, 0x3b, 0xc2, 0x2b }} -- 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119993): https://edk2.groups.io/g/devel/message/119993 Mute This Topic: https://groups.io/mt/107457427/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-