From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail05.groups.io (mail05.groups.io [45.79.224.7]) by spool.mail.gandi.net (Postfix) with ESMTPS id B32EE9416A3 for ; Wed, 31 Jul 2024 10:42:21 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=gMXXL0rSdCuredi1fC43f4xwOmfy/MSawobl1wytdpk=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Resent-From:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20240206; t=1722422541; v=1; b=2TV7OacWkM7GhaRSQInbASTpOp577atfpNTUJh0ATIv55fA9IX7ZnDpMl+xk+96/g1ZBbjWT LNuUtVrABR3WOO+X8XVOw92XoAl7ZmHQiLOTGp1uJ7Cs/sEPa0a4tw2y/RUTlnoMYDVlODwG98J JQreGRoo2Sa60skcxM7iMeUXpZ/X/so7wHumLplwgqqBS/PWrG9aYfB+PlZSuwtCYCMbLkx6A4O 4wdTe1R7U9th2ORoHiGgH7cVbLK8CV0mNbHdzmqS53Vnewoo2dcrdb8+QcBGn7brYPDZUm/jf9W WC0i6lCTQDlKmpHMdUowaIYgnJs9JOFNh8nMApH7Tg3bg== X-Received: by 127.0.0.2 with SMTP id 7kvuYY7687511xqeXIGF8saR; Wed, 31 Jul 2024 03:42:20 -0700 X-Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by mx.groups.io with SMTP id smtpd.web10.39886.1722422539109305302 for ; Wed, 31 Jul 2024 03:42:19 -0700 X-Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 541A4CE1390; Wed, 31 Jul 2024 10:42:17 +0000 (UTC) X-Received: by smtp.kernel.org (Postfix) with ESMTPSA id 038CAC4AF0E; Wed, 31 Jul 2024 10:42:14 +0000 (UTC) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: quic_llindhol@quicinc.com, Ard Biesheuvel Subject: [edk2-devel] [PATCH edk2-platforms 2/2] Platform/Beagle: Remove secondary CPU handling Date: Wed, 31 Jul 2024 12:42:04 +0200 Message-Id: <20240731104204.5905-2-ardb@kernel.org> In-Reply-To: <20240731104204.5905-1-ardb@kernel.org> References: <20240731104204.5905-1-ardb@kernel.org> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Wed, 31 Jul 2024 03:42:19 -0700 Resent-From: ardb@kernel.org Reply-To: devel@edk2.groups.io,ardb@kernel.org List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: Cdtbcken1exA0r800Fp94TjXx7686176AA= Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=2TV7OacW; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=kernel.org (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io Beagle's PrePi fork rather pointlessly includes the handling of secondary stacks, as it implements the UniCore flavor only, has its PcdCoreCount set to the default value of 1, and does not actually exist in a SMP configuration. So drop this handling so we can retire it completely in EDK2. Signed-off-by: Ard Biesheuvel --- Platform/BeagleBoard/BeagleBoardPkg/BeagleBoardPkg.dsc | 1 - Platform/BeagleBoard/BeagleBoardPkg/PrePi/PeiUniCore.inf | 3 - Platform/BeagleBoard/BeagleBoardPkg/PrePi/Arm/ModuleEntryPoint.S | 29 += --- Platform/BeagleBoard/BeagleBoardPkg/PrePi/Arm/ModuleEntryPoint.asm | 142 -= ------------------- 4 files changed, 4 insertions(+), 171 deletions(-) diff --git a/Platform/BeagleBoard/BeagleBoardPkg/BeagleBoardPkg.dsc b/Platf= orm/BeagleBoard/BeagleBoardPkg/BeagleBoardPkg.dsc index a114c9b633d0..7d82f350bad6 100644 --- a/Platform/BeagleBoard/BeagleBoardPkg/BeagleBoardPkg.dsc +++ b/Platform/BeagleBoard/BeagleBoardPkg/BeagleBoardPkg.dsc @@ -31,7 +31,6 @@ [LibraryClasses.common] ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf=0D ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf=0D ArmPlatformLib|Platform/BeagleBoard/BeagleBoardPkg/Library/BeagleBoardLi= b/BeagleBoardLib.inf=0D - ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatfo= rmStackLib.inf=0D ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf=0D =0D HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf=0D diff --git a/Platform/BeagleBoard/BeagleBoardPkg/PrePi/PeiUniCore.inf b/Pla= tform/BeagleBoard/BeagleBoardPkg/PrePi/PeiUniCore.inf index 03d8f4daab48..44f6ebd52c1d 100644 --- a/Platform/BeagleBoard/BeagleBoardPkg/PrePi/PeiUniCore.inf +++ b/Platform/BeagleBoard/BeagleBoardPkg/PrePi/PeiUniCore.inf @@ -33,7 +33,6 @@ [Packages] [LibraryClasses]=0D ArmLib=0D ArmPlatformLib=0D - ArmPlatformStackLib=0D BaseLib=0D DebugLib=0D DebugAgentLib=0D @@ -58,7 +57,6 @@ [Guids] =0D [FeaturePcd]=0D gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob=0D - gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores=0D =0D [Pcd]=0D gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString=0D @@ -73,7 +71,6 @@ [FixedPcd] gArmTokenSpaceGuid.PcdFvSize=0D =0D gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize=0D - gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize=0D =0D gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize=0D =0D diff --git a/Platform/BeagleBoard/BeagleBoardPkg/PrePi/Arm/ModuleEntryPoint= .S b/Platform/BeagleBoard/BeagleBoardPkg/PrePi/Arm/ModuleEntryPoint.S index ff7e3a454853..46c1498b969f 100644 --- a/Platform/BeagleBoard/BeagleBoardPkg/PrePi/Arm/ModuleEntryPoint.S +++ b/Platform/BeagleBoard/BeagleBoardPkg/PrePi/Arm/ModuleEntryPoint.S @@ -13,11 +13,6 @@ ASM_FUNC(_ModuleEntryPoint) // Do early platform specific actions=0D bl ASM_PFX(ArmPlatformPeiBootAction)=0D =0D - // Get ID of this CPU in Multicore system=0D - bl ASM_PFX(ArmReadMpidr)=0D - // Keep a copy of the MpId register value=0D - mov r8, r0=0D -=0D _SetSVCMode:=0D // Enter SVC mode, Disable FIQ and IRQ=0D mov r1, #(CPSR_MODE_SVC | CPSR_IRQ | CPSR_FIQ)=0D @@ -82,33 +77,17 @@ _GetBaseUefiMemory: =0D _GetStackBase:=0D // r1 =3D The top of the Mpcore Stacks=0D + mov sp, r1=0D +=0D // Stack for the primary core =3D PrimaryCoreStack=0D MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))=0D sub r10, r1, r2=0D =0D - // Stack for the secondary core =3D Number of Cores - 1=0D - MOV32 (r1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreS= econdaryStackSize))=0D - sub r10, r10, r1=0D + // Get ID of this CPU in Multicore system=0D + bl ASM_PFX(ArmReadMpidr)=0D =0D - // r10 =3D The base of the MpCore Stacks (primary stack & secondary stac= ks)=0D - mov r0, r10=0D - mov r1, r8=0D - //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackS= ize)=0D - MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))=0D - MOV32 (r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))=0D - bl ASM_PFX(ArmPlatformStackSet)=0D -=0D - // Is it the Primary Core ?=0D - mov r0, r8=0D - bl ASM_PFX(ArmPlatformIsPrimaryCore)=0D - cmp r0, #1=0D - bne _PrepareArguments=0D -=0D -_PrepareArguments:=0D - mov r0, r8=0D mov r1, r9=0D mov r2, r10=0D - mov r3, sp=0D =0D // Move sec startup address into a data register=0D // Ensure we're jumping to FV version of the code (not boot remapped ali= as)=0D diff --git a/Platform/BeagleBoard/BeagleBoardPkg/PrePi/Arm/ModuleEntryPoint= .asm b/Platform/BeagleBoard/BeagleBoardPkg/PrePi/Arm/ModuleEntryPoint.asm deleted file mode 100644 index 3da789205124..000000000000 --- a/Platform/BeagleBoard/BeagleBoardPkg/PrePi/Arm/ModuleEntryPoint.asm +++ /dev/null @@ -1,142 +0,0 @@ -//=0D -// Copyright (c) 2011-2015, ARM Limited. All rights reserved.=0D -//=0D -// SPDX-License-Identifier: BSD-2-Clause-Patent=0D -//=0D -//=0D -=0D -#include =0D -#include =0D -=0D - INCLUDE AsmMacroIoLib.inc=0D -=0D - IMPORT CEntryPoint=0D - IMPORT ArmPlatformIsPrimaryCore=0D - IMPORT ArmReadMpidr=0D - IMPORT ArmPlatformPeiBootAction=0D - IMPORT ArmPlatformStackSet=0D - IMPORT mSystemMemoryEnd=0D -=0D - EXPORT _ModuleEntryPoint=0D -=0D - PRESERVE8=0D - AREA PrePiCoreEntryPoint, CODE, READONLY=0D -=0D -StartupAddr DCD CEntryPoint=0D -=0D -_ModuleEntryPoint=0D - // Do early platform specific actions=0D - bl ArmPlatformPeiBootAction=0D -=0D - // Get ID of this CPU in Multicore system=0D - bl ArmReadMpidr=0D - // Keep a copy of the MpId register value=0D - mov r8, r0=0D -=0D -_SetSVCMode=0D - // Enter SVC mode, Disable FIQ and IRQ=0D - mov r1, #(CPSR_MODE_SVC :OR: CPSR_IRQ :OR: CPSR_FIQ)=0D - msr CPSR_c, r1=0D -=0D -// Check if we can install the stack at the top of the System Memory or if= we need=0D -// to install the stacks at the bottom of the Firmware Device (case the FD= is located=0D -// at the top of the DRAM)=0D -_SystemMemoryEndInit=0D - adrll r1, mSystemMemoryEnd=0D - ldrd r2, r3, [r1]=0D - teq r3, #0=0D - moveq r1, r2=0D - mvnne r1, #0=0D -=0D -_SetupStackPosition=0D - // r1 =3D SystemMemoryTop=0D -=0D - // Calculate Top of the Firmware Device=0D - mov32 r2, FixedPcdGet32(PcdFdBaseAddress)=0D - mov32 r3, FixedPcdGet32(PcdFdSize)=0D - sub r3, r3, #1=0D - add r3, r3, r2 // r3 =3D FdTop =3D PcdFdBaseAddress + PcdFdSize=0D -=0D - // UEFI Memory Size (stacks are allocated in this region)=0D - mov32 r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize)=0D -=0D - //=0D - // Reserve the memory for the UEFI region (contain stacks on its top)=0D - //=0D -=0D - // Calculate how much space there is between the top of the Firmware and= the Top of the System Memory=0D - subs r0, r1, r3 // r0 =3D SystemMemoryTop - FdTop=0D - bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Cas= e when the PrePi is in XIP memory outside of the DRAM=0D - cmp r0, r4=0D - bge _SetupStack=0D -=0D - // Case the top of stacks is the FdBaseAddress=0D - mov r1, r2=0D -=0D -_SetupStack=0D - // r1 contains the top of the stack (and the UEFI Memory)=0D -=0D - // Because the 'push' instruction is equivalent to 'stmdb' (decrement be= fore), we need to increment=0D - // one to the top of the stack. We check if incrementing one does not ov= erflow (case of DRAM at the=0D - // top of the memory space)=0D - adds r9, r1, #1=0D - bcs _SetupOverflowStack=0D -=0D -_SetupAlignedStack=0D - mov r1, r9=0D - b _GetBaseUefiMemory=0D -=0D -_SetupOverflowStack=0D - // Case memory at the top of the address space. Ensure the top of the st= ack is EFI_PAGE_SIZE=0D - // aligned (4KB)=0D - mov32 r9, EFI_PAGE_MASK=0D - and r9, r9, r1=0D - sub r1, r1, r9=0D -=0D -_GetBaseUefiMemory=0D - // Calculate the Base of the UEFI Memory=0D - sub r9, r1, r4=0D -=0D -_GetStackBase=0D - // r1 =3D The top of the Mpcore Stacks=0D - // Stack for the primary core =3D PrimaryCoreStack=0D - mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)=0D - sub r10, r1, r2=0D -=0D - // Stack for the secondary core =3D Number of Cores - 1=0D - mov32 r1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSe= condaryStackSize)=0D - sub r10, r10, r1=0D -=0D - // r10 =3D The base of the MpCore Stacks (primary stack & secondary stac= ks)=0D - mov r0, r10=0D - mov r1, r8=0D - //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackS= ize)=0D - mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)=0D - mov32 r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)=0D - bl ArmPlatformStackSet=0D -=0D - // Is it the Primary Core ?=0D - mov r0, r8=0D - bl ArmPlatformIsPrimaryCore=0D - cmp r0, #1=0D - bne _PrepareArguments=0D -=0D -_PrepareArguments=0D - mov r0, r8=0D - mov r1, r9=0D - mov r2, r10=0D -=0D - // Move sec startup address into a data register=0D - // Ensure we're jumping to FV version of the code (not boot remapped ali= as)=0D - ldr r4, StartupAddr=0D -=0D - // Jump to PrePiCore C code=0D - // r0 =3D MpId=0D - // r1 =3D UefiMemoryBase=0D - // r2 =3D StacksBase=0D - blx r4=0D -=0D -_NeverReturn=0D - b _NeverReturn=0D -=0D - END=0D --=20 2.46.0.rc1.232.g9752f9e123-goog -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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