From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail05.groups.io (mail05.groups.io [45.79.224.7]) by spool.mail.gandi.net (Postfix) with ESMTPS id 7745A94168D for ; Fri, 30 Aug 2024 10:31:45 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=MaT4AzbgkEi+Iqe3sE/4Z2U0fwxUb4N3Fatg5eqWvpE=; c=relaxed/simple; d=groups.io; h=Date:From:To:CC:Subject:Message-ID:In-Reply-To:References:Organization:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Resent-From:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Transfer-Encoding; s=20240206; t=1725013905; v=1; b=bkiQC+CjqhNkBUS4p0dBcsZWZq6T7li38wNbc9fN3xssgNY9rDTYeoA/9A/5vZuYbcYWW69v 8OTpAOCOsLBMxrhDwgMaD8vb1Smg1qmxFPUj8XMpdZeHYzLEUEmVkzrW2TJi4NlbBvszas0zG/B IGgLZ5q5yds4Yd8cbIh3vDUaH8XU/O5TfloaEvtaYuhrMjxtbIPezT7K/Ar9syOjfyIWmnpudQP 9F1Mx913b+I6144WB0V4G0CH/Nb7tEpjWQVD+NNbQ8YiKA25MrOLCPAgOBtewXmNeA9vWxOxqUa FZ08br09R8oha+Wk9yZ+yOsqbezGnYM7BMat8+YfKNliA== X-Received: by 127.0.0.2 with SMTP id rplFYY7687511xXAWrCaO5t8; Fri, 30 Aug 2024 03:31:43 -0700 X-Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) by mx.groups.io with SMTP id smtpd.web10.10039.1725013902252374504 for ; Fri, 30 Aug 2024 03:31:42 -0700 X-Received: from mail.maildlp.com (unknown [172.18.186.31]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4WwDrN2W7nz6J7t2; Fri, 30 Aug 2024 18:28:20 +0800 (CST) X-Received: from lhrpeml500005.china.huawei.com (unknown [7.191.163.240]) by mail.maildlp.com (Postfix) with ESMTPS id 6560E140155; Fri, 30 Aug 2024 18:31:39 +0800 (CST) X-Received: from localhost (10.203.177.66) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Fri, 30 Aug 2024 11:31:38 +0100 Date: Fri, 30 Aug 2024 11:31:38 +0100 From: "Jonathan Cameron via groups.io" To: Yuquan Wang CC: , , , , , , , , Subject: Re: [edk2-devel] [RFC PATCH edk2-platforms 2/2] SbsaQemu: AcpiTables: Add CEDT Table Message-ID: <20240830113138.00005149@Huawei.com> In-Reply-To: <20240830031545.548789-3-wangyuquan1236@phytium.com.cn> References: <20240830031545.548789-1-wangyuquan1236@phytium.com.cn> <20240830031545.548789-3-wangyuquan1236@phytium.com.cn> Organization: Huawei Technologies Research and Development (UK) Ltd. MIME-Version: 1.0 X-Originating-IP: [10.203.177.66] X-ClientProxiedBy: lhrpeml100004.china.huawei.com (7.191.162.219) To lhrpeml500005.china.huawei.com (7.191.163.240) Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Fri, 30 Aug 2024 03:31:42 -0700 Resent-From: jonathan.cameron@huawei.com Reply-To: devel@edk2.groups.io,jonathan.cameron@huawei.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: ZIXbv02Fi6H5dLveV3wOlE0zx7686176AA= Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=bkiQC+Cj; dmarc=pass (policy=none) header.from=groups.io; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io On Fri, 30 Aug 2024 11:15:45 +0800 Yuquan Wang wrote: > Provide CXL Early Discovery Table that describes the static CXL > Platform Components of sbsa-ref. >=20 > This adds a static CXL Host Bridge structure and a CXL Fixed Memory > Window structure which are implemented as two independent space on > sbsa-ref: [SBSA_CXL_HOST] & [SBSA_CXL_FIXED_WINDOW]. >=20 > Signed-off-by: Yuquan Wang A few superficial comments. I'd love to see a dump of iasl -d for this table in the commit message. That's much easier to sanity check for spec compliance than reading the code that creates it. Jonathan > --- > .../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 6 +- > Silicon/Qemu/SbsaQemu/AcpiTables/Cedt.aslc | 70 +++++++++++++++++++ > Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 7 ++ > 3 files changed, 82 insertions(+), 1 deletion(-) > create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Cedt.aslc >=20 > diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qe= mu/SbsaQemu/AcpiTables/AcpiTables.inf > index b4d5aa807bd9..f39b06d708d5 100644 > --- a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf > +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf > @@ -21,7 +21,7 @@ > Fadt.aslc > Mcfg.aslc > Spcr.aslc > - > + Cedt.aslc Fix up to keep the white space. Also this seems to be alphabetical order so probably should stick to that. > [Packages] > ArmPlatformPkg/ArmPlatformPkg.dec > ArmPkg/ArmPkg.dec > @@ -78,6 +78,10 @@ > gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCxlBarSize > gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCxlBarLimit > =20 > + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChbcrBase > + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCfmwsBase > + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCfmwsSize > + > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase > =20 > gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase > diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Cedt.aslc b/Silicon/Qemu/Sb= saQemu/AcpiTables/Cedt.aslc > new file mode 100644 > index 000000000000..66c9dc8858bc > --- /dev/null > +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Cedt.aslc > @@ -0,0 +1,70 @@ > +/** @file > +* CXL Early Discovery Table (CEDT) > +* > +* Copyright (c) 2024, Phytium Technology Co Ltd. All rights reserved. > +* > +**/ > + > +#include > +#include > +#include > + > +#pragma pack(1) > + > +typedef struct > +{ > + EFI_ACPI_6_4_CXL_Early_Discovery_TABLE Header; > + EFI_ACPI_6_4_CXL_Host_Bridge_Structure Chbs; > + EFI_ACPI_6_4_CXL_Fixed_Memory_Window_Structure Cfmws; > +} SBSA_REF_CEDT; > + > + > +SBSA_REF_CEDT Cedt =3D > +{ > + // EFI_ACPI_6_4_CXL_Early_Discovery_TABLE(Header) > + { > + SBSAQEMU_ACPI_HEADER // EFI_ACPI_DESCRIPTION_HEADER > + ( > + EFI_ACPI_6_4_CXL_EARLY_DISCOVERY_TABLE_SIGNATURE, > + SBSA_REF_CEDT, > + EFI_ACPI_CXL_Early_Discovery_TABLE_REVISION_01 > + ), > + }, > + // EFI_ACPI_6_4_CXL_Host_Bridge_Structure > + { > + // EFI_ACPI_6_4_CEDT_Structure > + { > + EFI_ACPI_CEDT_TYPE_CHBS, // Type > + 0, // Rese= rved > + sizeof (EFI_ACPI_6_4_CXL_Host_Bridge_Structure), // Leng= th > + }, > + FixedPcdGet32 (PcdCxlBusMin), // UID > + 0x1, // CXLVersion > + 0, // Reserved > + FixedPcdGet32 (PcdChbcrBase), // CHBCR Base > + 0X10000, // Length > + }, > + // EFI_ACPI_6_4_CXL_Fixed_Memory_Window_Structure > + { > + // EFI_ACPI_6_4_CEDT_Structure > + { > + EFI_ACPI_CEDT_TYPE_CFMWS, // Type > + 0, // Rese= rved > + sizeof (EFI_ACPI_6_4_CXL_Fixed_Memory_Window_Structure), // Leng= th > + }, > + 0, // Reserved > + FixedPcdGet32 (PcdCfmwsBase), // BaseHPA > + FixedPcdGet32 (PcdCfmwsSize), // WindowSize > + 0, // InterleaveMembers > + 0, // InterleaveArithmetic > + 0, // Reserved1 > + 0, // Granularity > + 0xF, // Restrictions > + 0, // QtgId You'll need to implement the QTG DSM or I think the kernel will still moan = at you. > + FixedPcdGet32 (PcdCxlBusMin), // FirstTarget > + } > +}; > + > +#pragma pack () > + > +VOID* CONST ReferenceAcpiTable =3D &Cedt; > diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/S= bsaQemu.dec > index 7d8c7997160b..dff838315d06 100644 > --- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec > +++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec > @@ -65,6 +65,13 @@ HardwareInfoLib|Include/Library/HardwareInfoLib.h > gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCxlBusMin|254|UINT32|0x00000= 019 > gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCxlBusMax|255|UINT32|0x00000= 020 > =20 > + # PCDs complementing base address for CXL CHBCR (CXL Host Bridge Compo= nent Registers) > + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChbcrBase|0x60120000|UINT64|= 0x00000021 > + > + # CXL Fixed Memory Window I'd add an index from the start just to make this easier to extend. PcdCFwms0Base perhaps? > + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCfmwsBase|0xA0000000000|UINT= 64|0x00000022 > + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCfmwsSize|0x10000000000|UINT= 64|0x00000023 > + > [PcdsDynamic.common] > gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer|L""|VOID*= |0x00000110 > gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber|L""|VOID*= |0x00000111 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#120445): https://edk2.groups.io/g/devel/message/120445 Mute This Topic: https://groups.io/mt/108173685/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-