* [edk2-devel] [PATCH V1 1/2] MdeModulePkg: Check legal BarIndex/NumberofBars
@ 2024-10-16 6:28 Foster Nong
2024-10-16 6:28 ` [edk2-devel] [PATCH V1 2/2] MdeModulePkg:New Pcd to platform constrain BarSize Foster Nong
0 siblings, 1 reply; 2+ messages in thread
From: Foster Nong @ 2024-10-16 6:28 UTC (permalink / raw)
To: devel; +Cc: Foster Nong, Michael D Kinney, Liming Gao, Ray Ni
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4868
In current PCIE Resizable BAR feature, add below check:
1. Check Register Number of Resizable BARs is legal.
2. Check Register Register BAR Index is legal.
Signed-off-by: Foster Nong <foster.nong@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Ray Ni <ray.ni@intel.com>
---
MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 41 ++++++++++++++++++-------
1 file changed, 30 insertions(+), 11 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
index 84fc0161a1..f15dd6468d 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
@@ -1800,7 +1800,6 @@ PciProgramResizableBar (
UINT32 Index;
UINT32 Offset;
INTN Bit;
- UINTN ResizableBarNumber;
EFI_STATUS Status;
PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY Entries[PCI_MAX_BAR];
@@ -1812,19 +1811,39 @@ PciProgramResizableBar (
PciIoDevice->ResizableBarOffset,
PciIoDevice->ResizableBarNumber
));
+ if (PciIoDevice->ResizableBarNumber > PCI_MAX_BAR || PciIoDevice->ResizableBarNumber == 0) {
+ DEBUG ((DEBUG_ERROR, "ERROR: Resizable BAR register ResizableBarNumber=0x%X is illegal\n", PciIoDevice->ResizableBarNumber));
+ return EFI_DEVICE_ERROR;
+ }
- ResizableBarNumber = MIN (PciIoDevice->ResizableBarNumber, PCI_MAX_BAR);
- PciIo = &PciIoDevice->PciIo;
- Status = PciIo->Pci.Read (
- PciIo,
- EfiPciIoWidthUint8,
- PciIoDevice->ResizableBarOffset + sizeof (PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER),
- sizeof (PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY) * ResizableBarNumber,
- (VOID *)(&Entries)
- );
+ PciIo = &PciIoDevice->PciIo;
+ Status = PciIo->Pci.Read (
+ PciIo,
+ EfiPciIoWidthUint8,
+ PciIoDevice->ResizableBarOffset + sizeof (PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER),
+ sizeof (PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY) * PciIoDevice->ResizableBarNumber,
+ (VOID *)(&Entries)
+ );
ASSERT_EFI_ERROR (Status);
- for (Index = 0; Index < ResizableBarNumber; Index++) {
+ for (Index = 0; Index < PciIoDevice->ResizableBarNumber; Index++) {
+ //
+ // BAR index: encoded value
+ // 0 BAR located at offset 10h
+ // 1 BAR located at offset 14h
+ // 2 BAR located at offset 18h
+ // 3 BAR located at offset 1ch
+ // 4 BAR located at offset 20h
+ // 5 BAR located at offset 24h
+ // Others Reserved.
+ // Do not configure anything if some BAR info is wrong.
+ //
+ if (Entries[Index].ResizableBarControl.Bits.BarIndex >= PCI_MAX_BAR ) {
+ DEBUG ((DEBUG_ERROR, "ERROR: Resizable BAR Entry[%x].BarIndex=%x is illegal\n", Index, Entries[Index].ResizableBarControl.Bits.BarIndex));
+ return EFI_DEVICE_ERROR;
+ }
+ }
+ for (Index = 0; Index < PciIoDevice->ResizableBarNumber; Index++) {
//
// When the bit of Capabilities Set, indicates that the Function supports
// operating with the BAR sized to (2^Bit) MB.
--
2.37.1.windows.1
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* [edk2-devel] [PATCH V1 2/2] MdeModulePkg:New Pcd to platform constrain BarSize
2024-10-16 6:28 [edk2-devel] [PATCH V1 1/2] MdeModulePkg: Check legal BarIndex/NumberofBars Foster Nong
@ 2024-10-16 6:28 ` Foster Nong
0 siblings, 0 replies; 2+ messages in thread
From: Foster Nong @ 2024-10-16 6:28 UTC (permalink / raw)
To: devel; +Cc: Foster Nong, Michael D Kinney, Liming Gao, Ray Ni
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4868
1. Define a new dynamic PCD in MdeModulePkg
gEfiMdeModulePkgTokenSpaceGuid.PcdPcieResizableMaxBarSize
2. Modify PciProgramResizableBar() to implement configure BAR Size
within platform constrain provided in PcdPcieResizableMaxBarSize
Signed-off-by: Foster Nong <foster.nong@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Ray Ni <ray.ni@intel.com>
---
MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf | 1 +
MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 19 ++++++++++++++++---
MdeModulePkg/MdeModulePkg.dec | 5 +++++
3 files changed, 22 insertions(+), 3 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
index e317169d9c..f038b6eef2 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
@@ -107,6 +107,7 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdMrIovSupport ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration ## SOMETIMES_CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdPcieResizableBarSupport ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPcieResizableMaxBarSize ## CONSUMES
[UserExtensions.TianoCore."ExtraFiles"]
PciBusDxeExtra.uni
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
index f15dd6468d..d9729a0f42 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
@@ -1797,6 +1797,7 @@ PciProgramResizableBar (
{
EFI_PCI_IO_PROTOCOL *PciIo;
UINT64 Capabilities;
+ UINT64 CapabilitiesMask;
UINT32 Index;
UINT32 Offset;
INTN Bit;
@@ -1804,12 +1805,17 @@ PciProgramResizableBar (
PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY Entries[PCI_MAX_BAR];
ASSERT (PciIoDevice->ResizableBarOffset != 0);
-
+ //
+ // PCIE SPEC v6.0 section 7.8.6.3 Resizable BAR Control Register
+ // Bits[13:8] BAR Size define 43(8 EB) as maximum
+ //
+ CapabilitiesMask = LShiftU64 (1, MIN (PcdGet8 (PcdPcieResizableMaxBarSize), 43) + 1) - 1;
DEBUG ((
DEBUG_INFO,
- " Programs Resizable BAR register, offset: 0x%08x, number: %d\n",
+ " Programs Resizable BAR register, offset: 0x%08x, number: %d, PcdPcieResizableMaxBarSize: %d\n",
PciIoDevice->ResizableBarOffset,
- PciIoDevice->ResizableBarNumber
+ PciIoDevice->ResizableBarNumber,
+ PcdGet8 (PcdPcieResizableMaxBarSize)
));
if (PciIoDevice->ResizableBarNumber > PCI_MAX_BAR || PciIoDevice->ResizableBarNumber == 0) {
DEBUG ((DEBUG_ERROR, "ERROR: Resizable BAR register ResizableBarNumber=0x%X is illegal\n", PciIoDevice->ResizableBarNumber));
@@ -1851,10 +1857,17 @@ PciProgramResizableBar (
// Bit 0 is set: supports operating with the BAR sized to 1 MB
// Bit 1 is set: supports operating with the BAR sized to 2 MB
// Bit n is set: supports operating with the BAR sized to (2^n) MB
+ // Platform may impose limitation on the BAR size it supports using PcdPcieResizableMaxBarSize.
//
Capabilities = LShiftU64 (Entries[Index].ResizableBarControl.Bits.BarSizeCapability, 28)
| Entries[Index].ResizableBarCapability.Bits.BarSizeCapability;
+ Capabilities &= CapabilitiesMask;
+ if (Capabilities == 0) {
+ DEBUG ((DEBUG_ERROR, " WARNING: Resizable BAR Entry[%d] skip, Capabilities=0x%llx CapabilitiesMask=0x%llx\n",
+ Index, Entries[Index].ResizableBarCapability.Bits.BarSizeCapability, CapabilitiesMask));
+ continue;
+ }
if (ResizableBarOp == PciResizableBarMax) {
Bit = HighBitSet64 (Capabilities);
} else {
diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 1324b6d100..59fa506bd8 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -2264,6 +2264,11 @@
# @Prompt The value is use for Usb Network rate limiting supported.
gEfiMdeModulePkgTokenSpaceGuid.PcdUsbNetworkRateLimitingFactor|100|UINT32|0x10000028
+ # This PCD set maximum size of all PCIE Resizable BARs
+ # The max size equals to (2^PcdPcieResizableMaxBarSize) MB
+ # @Prompt Maximum size of PCIE Resizable BARs
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPcieResizableMaxBarSize|0x2B|UINT8|0x00030009
+
[PcdsPatchableInModule]
## Specify memory size with page number for PEI code when
# Loading Module at Fixed Address feature is enabled.
--
2.37.1.windows.1
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