From: Foster Nong <foster.nong@intel.com>
To: devel@edk2.groups.io
Cc: Foster Nong <foster.nong@intel.com>,
Michael D Kinney <michael.d.kinney@intel.com>,
Liming Gao <gaoliming@byosoft.com.cn>, Ray Ni <ray.ni@intel.com>
Subject: [edk2-devel] [PATCH v2 2/2] MdeModulePkg:New Pcd to platform constrain BarSize
Date: Fri, 18 Oct 2024 08:55:09 +0800 [thread overview]
Message-ID: <20241018005509.2913-2-foster.nong@intel.com> (raw)
In-Reply-To: <20241018005509.2913-1-foster.nong@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4868
1. Define a new dynamic PCD in MdeModulePkg
gEfiMdeModulePkgTokenSpaceGuid.PcdPcieResizableMaxBarSize
2. Modify PciProgramResizableBar() to implement configure BAR Size
within platform constrain provided in PcdPcieResizableMaxBarSize
Signed-off-by: Foster Nong <foster.nong@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Ray Ni <ray.ni@intel.com>
---
MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf | 1 +
MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 25 +++++++++++++++++---
MdeModulePkg/MdeModulePkg.dec | 5 ++++
3 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
index e317169d9c..f038b6eef2 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
@@ -107,6 +107,7 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdMrIovSupport ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration ## SOMETIMES_CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdPcieResizableBarSupport ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPcieResizableMaxBarSize ## CONSUMES
[UserExtensions.TianoCore."ExtraFiles"]
PciBusDxeExtra.uni
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
index dc5fd27665..95f331d0af 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
@@ -1797,6 +1797,7 @@ PciProgramResizableBar (
{
EFI_PCI_IO_PROTOCOL *PciIo;
UINT64 Capabilities;
+ UINT64 CapabilitiesMask;
UINT32 Index;
UINT32 Offset;
INTN Bit;
@@ -1804,12 +1805,17 @@ PciProgramResizableBar (
PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY Entries[PCI_MAX_BAR];
ASSERT (PciIoDevice->ResizableBarOffset != 0);
-
+ //
+ // PCIE SPEC v6.0 section 7.8.6.3 Resizable BAR Control Register
+ // Bits[13:8] BAR Size define 43(8 EB) as maximum
+ //
+ CapabilitiesMask = LShiftU64 (1, MIN (PcdGet8 (PcdPcieResizableMaxBarSize), 43) + 1) - 1;
DEBUG ((
DEBUG_INFO,
- " Programs Resizable BAR register, offset: 0x%08x, number: %d\n",
+ " Programs Resizable BAR register, offset: 0x%08x, number: %d, PcdPcieResizableMaxBarSize: %d\n",
PciIoDevice->ResizableBarOffset,
- PciIoDevice->ResizableBarNumber
+ PciIoDevice->ResizableBarNumber,
+ PcdGet8 (PcdPcieResizableMaxBarSize)
));
if ((PciIoDevice->ResizableBarNumber > PCI_MAX_BAR) || (PciIoDevice->ResizableBarNumber == 0)) {
@@ -1853,9 +1859,22 @@ PciProgramResizableBar (
// Bit 0 is set: supports operating with the BAR sized to 1 MB
// Bit 1 is set: supports operating with the BAR sized to 2 MB
// Bit n is set: supports operating with the BAR sized to (2^n) MB
+ // Platform may impose limitation on the BAR size it supports using PcdPcieResizableMaxBarSize.
//
Capabilities = LShiftU64 (Entries[Index].ResizableBarControl.Bits.BarSizeCapability, 28)
| Entries[Index].ResizableBarCapability.Bits.BarSizeCapability;
+ Capabilities &= CapabilitiesMask;
+
+ if (Capabilities == 0) {
+ DEBUG ((
+ DEBUG_ERROR,
+ " WARNING: Resizable BAR Entry[%d] skip, Capabilities=0x%llx CapabilitiesMask=0x%llx\n",
+ Index,
+ Entries[Index].ResizableBarCapability.Bits.BarSizeCapability,
+ CapabilitiesMask
+ ));
+ continue;
+ }
if (ResizableBarOp == PciResizableBarMax) {
Bit = HighBitSet64 (Capabilities);
diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 1324b6d100..59fa506bd8 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -2264,6 +2264,11 @@
# @Prompt The value is use for Usb Network rate limiting supported.
gEfiMdeModulePkgTokenSpaceGuid.PcdUsbNetworkRateLimitingFactor|100|UINT32|0x10000028
+ # This PCD set maximum size of all PCIE Resizable BARs
+ # The max size equals to (2^PcdPcieResizableMaxBarSize) MB
+ # @Prompt Maximum size of PCIE Resizable BARs
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPcieResizableMaxBarSize|0x2B|UINT8|0x00030009
+
[PcdsPatchableInModule]
## Specify memory size with page number for PEI code when
# Loading Module at Fixed Address feature is enabled.
--
2.37.1.windows.1
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next prev parent reply other threads:[~2024-10-23 17:00 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-18 0:55 [edk2-devel] [PATCH v2 1/2] MdeModulePkg: Check legal BarIndex/NumberofBars Foster Nong
2024-10-18 0:55 ` Foster Nong [this message]
2024-10-18 0:56 ` [edk2-devel] [PATCH v2 2/2] MdeModulePkg:New Pcd to platform constrain BarSize Nong, Foster
2024-10-18 0:56 ` [edk2-devel] [PATCH v2 1/2] MdeModulePkg: Check legal BarIndex/NumberofBars Nong, Foster
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