From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail05.groups.io (mail05.groups.io [45.79.224.7]) by spool.mail.gandi.net (Postfix) with ESMTPS id 6449E7803D0 for ; Tue, 5 Nov 2024 10:35:53 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=EpICFy0glyHXCXXqcLZBI2AYMka38jT6UoWVh1ljkLQ=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Resent-From:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20240830; t=1730802953; v=1; x=1731062151; b=atTka+0+2fS/Wy2MUrKQU/QuT0bJGje/FF4mMl8RBJqd9AfnBKoVnxHWE7I3FbEkgnsccJlO eg/H+dPUx8h951bphqNwszREhHYKU2SkfiQawmZx6tHINXZTS6xyJBV0pPLY+vXocOXAnkR3O7L XlaDTXHZnpVkycRL2zwCJFcpOZegdfcyZjEkwpFXNi/OJVY7XwpgWsKcdwqeBf6Dbkq1+l+sVjA KyXF5qi91zFVCGlHqATlg07TqYP6tp1PHC63C10Sy1UbpspQ6M4+lXpLLN4Ae3dQmGChZ6n77iH xuCFKPuKyTVYnw1LPCoVyuw4CUvngSkd2TDE3y6wjAvag== X-Received: by 127.0.0.2 with SMTP id ZfbgYY7687511xD523jpftYA; Tue, 05 Nov 2024 02:35:51 -0800 X-Received: from zg8tmtyylji0my4xnjqumte4.icoremail.net (zg8tmtyylji0my4xnjqumte4.icoremail.net [162.243.164.118]) by mx.groups.io with SMTP id smtpd.web11.14615.1730802950842355888 for ; Tue, 05 Nov 2024 02:35:51 -0800 X-Received: from prodtpl.icoremail.net (unknown [10.12.1.20]) by hzbj-icmmx-7 (Coremail) with SMTP id AQAAfwAnLh4D9SlnFcKHAw--.41379S2; Tue, 05 Nov 2024 18:35:47 +0800 (CST) X-Received: from phytium.com.cn (unknown [218.76.62.144]) by mail (Coremail) with SMTP id AQAAfwCH3nr99ClnV4xHAA--.23012S3; Tue, 05 Nov 2024 18:35:42 +0800 (CST) From: "Yuquan Wang" To: Jonathan.Cameron@Huawei.com, marcin.juszkiewicz@linaro.org, ardb+tianocore@kernel.org, quic_llindhol@quicinc.com, peter.maydell@linaro.org Cc: chenbaozi@phytium.com.cn, devel@edk2.groups.io, linux-cxl@vger.kernel.org, asa-dev@op-lists.linaro.org, Yuquan Wang Subject: [edk2-devel] [RFC PATCH edk2-platforms v2 0/1] add basic support for CXL on sbsa-ref Date: Tue, 5 Nov 2024 18:35:22 +0800 Message-Id: <20241105103523.415774-1-wangyuquan1236@phytium.com.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAfwCH3nr99ClnV4xHAA--.23012S3 X-CM-SenderInfo: 5zdqw5pxtxt0arstlqxsk13x1xpou0fpof0/1tbiAQAAAWcpJZAFfQAAsD X-Coremail-Antispam: 1Uk129KBjvJXoW7ArWxKFWxJrW8Zr47Cw17Wrg_yoW8CFWUpF WF9a13CFy5Ary2g393ua40vr4rC3WfZF48ursrXry8Wa43KF15Xrs7WFn2gF13Jrn3Ww4D Gr1kt34rAa1F93DanT9S1TB71UUUUUDqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj DUYxn0WfASr-VFAU7a7-sFnT9fnUUIcSsGvfJ3UbIYCTnIWIevJa73UjIFyTuYvj4RJUUU UUUUU Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Tue, 05 Nov 2024 02:35:51 -0800 Resent-From: wangyuquan1236@phytium.com.cn Reply-To: devel@edk2.groups.io,wangyuquan1236@phytium.com.cn List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: flgapBLf1iJwEGSBUO5EFTeLx7686176AA= Content-Transfer-Encoding: 8bit X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240830 header.b=atTka+0+; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io v1 -> v2: - PCDs values about CXL exclusive MMIO32 & MMIO64 space - CXL Bus range: 0xc0 ~ 0xff - PCIE ecam space & Cxl ecam space - CEDT format RFC because - Many contents are ported from Jonathan' patch on qemu virt design - Bring plenty of PCDs values and modifying the original PCIE values - Less experience and not particularly confident in ACPI area This series leverages Jonathan's patches[1] to add acpi0016 & acpi0017 objects into the previous DSDT table of sbsa-ref. Since the acpi0016 implementation model on qemu side is the pxb-cxl, this cxl Bus would share ECAM sapce of PCIE Bus. Thus I divide some space from Pcie Ecam to support cxl-related values. To prevent breaking the original pcie mmio space, this adds exclusive mmio32 & mmio64 space for cxl host. This defines the pcie bus range of cxl host is 0xc0 ~ 0xff, since the pxb-cxl-host as well as cxl components on it would occupy the original pcie buses, the original pcie ecam space should divided some range for pxb-cxl-host. Based on the new CEDT definitions patch on edk2[2], this series adds a static Cedt.aslc to support the [SBSA_CXL_HOST] & [SBSA_CXL_FIXED_WINDOW] space on sbsa-ref. Link: [1]: https://lore.kernel.org/linux-cxl/20220616141950.23374-2-Jonathan.Cameron@huawei.com/ [2]: https://edk2.groups.io/g/devel/topic/rfc_edk2_patch_v3_0_1/109403423# Yuquan Wang (1): SbsaQemu: Support basic CXL enablement Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 23 +- .../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 19 + Silicon/Qemu/SbsaQemu/AcpiTables/Cedt.aslc | 69 +++ Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 401 +++++++++++++++++- Silicon/Qemu/SbsaQemu/AcpiTables/Mcfg.aslc | 2 +- Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 34 +- 6 files changed, 537 insertions(+), 11 deletions(-) create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Cedt.aslc -- 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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