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From: "Laszlo Ersek" <lersek@redhat.com>
To: Rebecca Cran <rebecca@bsdio.com>, devel@edk2.groups.io
Cc: Jordan Justen <jordan.l.justen@intel.com>,
	Ard Biesheuvel <ard.biesheuvel@arm.com>,
	Peter Grehan <grehan@freebsd.org>
Subject: Re: [PATCH 1/1] OvmfPkg/Bhyve: Copy Real16ToFlat32.asm and enable cache in CR0
Date: Tue, 24 Nov 2020 01:03:57 +0100	[thread overview]
Message-ID: <21114ecb-5495-78af-9b28-1b69ca639baa@redhat.com> (raw)
In-Reply-To: <20201123061559.96393-1-rebecca@bsdio.com>

On 11/23/20 07:15, Rebecca Cran wrote:
> Copy UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm to
> OvmfPkg/Bhyve/ResetVector/Ia16, with one change, as has also been
> made in XenResetVector:
> 
>   - SEC_DEFAULT_CR0: enable cache (bit 30 or CD set to 0)
> 
> With the CD bit set to 1, this has the downside on AMD systems of
> actually running with the cache disabled, which slows the entire system
> to a crawl.
> There's no need for this bit to be set in virtualized
> environments.
> 
> This patch reapplies the change from the freebsd uefi-edk2 repo at
> https://github.com/freebsd/uefi-edk2/commit/08c00f4e8d9e3e469bdc2ce92d3aa839cae7cf17
> 
> Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
> ---
>  .../Bhyve/ResetVector/Ia16/Real16ToFlat32.asm | 142 ++++++++++++++++++
>  1 file changed, 142 insertions(+)
>  create mode 100644 OvmfPkg/Bhyve/ResetVector/Ia16/Real16ToFlat32.asm
> 
> diff --git a/OvmfPkg/Bhyve/ResetVector/Ia16/Real16ToFlat32.asm b/OvmfPkg/Bhyve/ResetVector/Ia16/Real16ToFlat32.asm
> new file mode 100644
> index 000000000000..fe377ac842f4
> --- /dev/null
> +++ b/OvmfPkg/Bhyve/ResetVector/Ia16/Real16ToFlat32.asm
> @@ -0,0 +1,142 @@
> +;------------------------------------------------------------------------------
> +; @file
> +; Transition from 16 bit real mode into 32 bit flat protected mode
> +;
> +; Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
> +; SPDX-License-Identifier: BSD-2-Clause-Patent

(1) Please prepend your copyright notice here.

With that:

Acked-by: Laszlo Ersek <lersek@redhat.com>

Meta-request: please collect all three patches in a series, and submit
them as a v2 *series* titled "various bhyve tweaks and updates". That's
going to make it *much* easier for me to merge the series.

Conceptually, this is of course not the right thing to do (you were
right to post the patches separately at first), but submitting a pull
request via github is so work intensive that I need to cut corners.

I'm not allowed to collect your separate patches into a single pull
request, but if you post them in a single round-up series, I'm allowed
to pick that up as-is. Of course it means that the patches need to be
correct at the same time; but for these three patches, that shouldn't be
a bug problem.

Thanks!
Laszlo

> +;
> +;------------------------------------------------------------------------------
> +
> +%define SEC_DEFAULT_CR0  0x00000023
> +%define SEC_DEFAULT_CR4  0x640
> +
> +BITS    16
> +
> +;
> +; Modified:  EAX, EBX
> +;
> +; @param[out]     DS       Selector allowing flat access to all addresses
> +; @param[out]     ES       Selector allowing flat access to all addresses
> +; @param[out]     FS       Selector allowing flat access to all addresses
> +; @param[out]     GS       Selector allowing flat access to all addresses
> +; @param[out]     SS       Selector allowing flat access to all addresses
> +;
> +TransitionFromReal16To32BitFlat:
> +
> +    debugShowPostCode POSTCODE_16BIT_MODE
> +
> +    cli
> +
> +    mov     bx, 0xf000
> +    mov     ds, bx
> +
> +    mov     bx, ADDR16_OF(gdtr)
> +
> +o32 lgdt    [cs:bx]
> +
> +    mov     eax, SEC_DEFAULT_CR0
> +    mov     cr0, eax
> +
> +    jmp     LINEAR_CODE_SEL:dword ADDR_OF(jumpTo32BitAndLandHere)
> +BITS    32
> +jumpTo32BitAndLandHere:
> +
> +    mov     eax, SEC_DEFAULT_CR4
> +    mov     cr4, eax
> +
> +    debugShowPostCode POSTCODE_32BIT_MODE
> +
> +    mov     ax, LINEAR_SEL
> +    mov     ds, ax
> +    mov     es, ax
> +    mov     fs, ax
> +    mov     gs, ax
> +    mov     ss, ax
> +
> +    OneTimeCallRet TransitionFromReal16To32BitFlat
> +
> +ALIGN   2
> +
> +gdtr:
> +    dw      GDT_END - GDT_BASE - 1   ; GDT limit
> +    dd      ADDR_OF(GDT_BASE)
> +
> +ALIGN   16
> +
> +;
> +; Macros for GDT entries
> +;
> +
> +%define  PRESENT_FLAG(p) (p << 7)
> +%define  DPL(dpl) (dpl << 5)
> +%define  SYSTEM_FLAG(s) (s << 4)
> +%define  DESC_TYPE(t) (t)
> +
> +; Type: data, expand-up, writable, accessed
> +%define  DATA32_TYPE 3
> +
> +; Type: execute, readable, expand-up, accessed
> +%define  CODE32_TYPE 0xb
> +
> +; Type: execute, readable, expand-up, accessed
> +%define  CODE64_TYPE 0xb
> +
> +%define  GRANULARITY_FLAG(g) (g << 7)
> +%define  DEFAULT_SIZE32(d) (d << 6)
> +%define  CODE64_FLAG(l) (l << 5)
> +%define  UPPER_LIMIT(l) (l)
> +
> +;
> +; The Global Descriptor Table (GDT)
> +;
> +
> +GDT_BASE:
> +; null descriptor
> +NULL_SEL            equ $-GDT_BASE
> +    DW      0            ; limit 15:0
> +    DW      0            ; base 15:0
> +    DB      0            ; base 23:16
> +    DB      0            ; sys flag, dpl, type
> +    DB      0            ; limit 19:16, flags
> +    DB      0            ; base 31:24
> +
> +; linear data segment descriptor
> +LINEAR_SEL          equ $-GDT_BASE
> +    DW      0xffff       ; limit 15:0
> +    DW      0            ; base 15:0
> +    DB      0            ; base 23:16
> +    DB      PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(DATA32_TYPE)
> +    DB      GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)
> +    DB      0            ; base 31:24
> +
> +; linear code segment descriptor
> +LINEAR_CODE_SEL     equ $-GDT_BASE
> +    DW      0xffff       ; limit 15:0
> +    DW      0            ; base 15:0
> +    DB      0            ; base 23:16
> +    DB      PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE32_TYPE)
> +    DB      GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)
> +    DB      0            ; base 31:24
> +
> +%ifdef ARCH_X64
> +; linear code (64-bit) segment descriptor
> +LINEAR_CODE64_SEL   equ $-GDT_BASE
> +    DW      0xffff       ; limit 15:0
> +    DW      0            ; base 15:0
> +    DB      0            ; base 23:16
> +    DB      PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE64_TYPE)
> +    DB      GRANULARITY_FLAG(1)|DEFAULT_SIZE32(0)|CODE64_FLAG(1)|UPPER_LIMIT(0xf)
> +    DB      0            ; base 31:24
> +%endif
> +
> +; linear code segment descriptor
> +LINEAR_CODE16_SEL     equ $-GDT_BASE
> +    DW      0xffff       ; limit 15:0
> +    DW      0            ; base 15:0
> +    DB      0            ; base 23:16
> +    DB      PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE32_TYPE)
> +    DB      GRANULARITY_FLAG(1)|DEFAULT_SIZE32(0)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)
> +    DB      0            ; base 31:24
> +
> +GDT_END:
> +
> 


      parent reply	other threads:[~2020-11-24  0:04 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-23  6:15 [PATCH 1/1] OvmfPkg/Bhyve: Copy Real16ToFlat32.asm and enable cache in CR0 Rebecca Cran
2020-11-23 22:27 ` Peter Grehan
2020-11-24  0:03 ` Laszlo Ersek [this message]

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