* [PATCH v4 0/8] Handling of multiple PCI host bridges specified
@ 2022-02-03 20:56 Ojeda Leon, Nicolas
2022-02-03 20:56 ` [PATCH v4 1/8] OvmfPkg/Library: Create base HardwareInfoLib for PCI Host Bridges Ojeda Leon, Nicolas
` (7 more replies)
0 siblings, 8 replies; 15+ messages in thread
From: Ojeda Leon, Nicolas @ 2022-02-03 20:56 UTC (permalink / raw)
To: devel; +Cc: atugup, Nicolas Ojeda Leon
Increased control is provided in Ovmf platforms to define and configure
the specifications of multiple PCI host bridges in the hypervisor. The
host propagates this information to the guest, initially through fw-cfg
interface.
In some AWS EC2 platforms, we expose a PCI topology including several
root bridges portraying information about physical distribution that
enables the guest to optimize accesses. Current PCI driver for Ovmf
enables the explicit definition of multiple root bridges and contains
the logic to fix their resources based on a platform-specific PCD entries.
However, we need a way to control, from the hypervisor, how many and which
resources each PCI host bridge can use. For this reason, this patch series
introduces a mechanism to provide PCI host bridges information like bus
number range, attributes, allocation attributes, PIO aperture as well as
32 and 64- bit prefetchable and non-prefetchable MMIO ranges through a
fw-cfg item created by the hypervisor and consumed by the guest firmware.
In order to offer a generic and extensible way to disclose non-discoverable
hardware information from the host to the guest, a new library called
HardwareInfoLib is created in the OvmfPkg. In essence, this library offers
the functionality to parse a generic BLOB into a list as well as the methods
to iterate over such list, including filtering options. The library is
conceived in a generic way so that further hardware elements can also be
described using it. For such purpose the length of the BLOB is not
restricted but instead regarded as a sequence of header-info elements that
allow the parsing during runtime. Furthermore, specific functionality is
provided wrapping QemuFwCfgReadBytes to extract hardware descriptions, in
the aforementioned format, in a static way so that early in the Pei stage
the library can be used to identify address space requirements. The core of
the library offers enough flexibility to process as many elements, even from
different hardware types (heterogenous), as needed in a single run. This
library is extended for the particular use case already exposed, PCI host
bridges, and this same code offers an example of how to tailor it for
further hardware components.
Furthermore, in this kind of high-performance platforms, we exploit PCIe
features like Access Control Services to configure peer-to-peer channels
between devices. This allows us to create direct communication channels
that do not require packets to reach the Root Complex but instead can
follow a direct path from source to target. To enable Guest Virtual Machines
to profit from this performance improvement, we configure resources (BARs)
of peer-to-peer intended devices with Host Physical Addresses. In this
scenario, devices can be instructed, from the guest VM, to perform DMA
operations targeting a peer address space, and the PCIe fabric can take
care of directly routing them. Therefore, long and busy links towards the
Root Complex are avoided. When we configure resources this way, the guest
must respect the pre-populated BARs so that devices preserve the address
ranges configured in the apertures of physical PCIe ports that enable
routing at the hardware level. Similarly, revealing details about the
underlying PCI hierarchy empowers the guest to perform topology-aware
optimizations and benefit from an enhanced performance.
---
Notes:
v4:
- Minor modification to use MAX_UINT64 as global invalid base address
when reading PCI host bridge information provided by the host (Patch 1)
- Refactor PciHostBridgeUtilityGetRootBridges into a thin wrapper that
calls 2 new function: one (BusScan) that performs the legacy bus scan
population process and a new one (HostProvided) that populates Root
Bridges with host provided values. (Patch 5)
- Move code that sets value of PcdPciPreservePopulatedMappings token
based on host-provided fw-cfg file into the function that populates
root bridges with host provided data (Patch 6)
- Restructured base address retrieval to leave PCI Resource Allocation
protocol untouched and instead augment the existing services to
enable base address retrieval before allocation. (Patch 7)
- Use new method to retrieve Root Bridge base addresses before
allocation and use that to handle pre-populated BARs (Patch 8)
Nicolas Ojeda Leon (8):
OvmfPkg/Library: Create base HardwareInfoLib for PCI Host Bridges
Ovmf/HardwareInfoLib: Create Pei lib to parse directly from fw-cfg
Ovmf/HardwareInfoLib: Add Dxe lib to dynamically parse heterogenous
data
Ovmf/PlatformPei: Use host-provided GPA end if available
OvmfPkg/PciHostBridgeUtilityLib: Initialize RootBridges apertures with
spec
MdeModulePkg, OvmfPkg: Add Pcd token for PCI pre-populated BARs
PciHostBridgeDxe: Extend service to get base addresses before
allocation
MdeModulePkg/PciBusDxe: Handling of pre-populated PCI BARs
MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 2 +
MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf | 1 +
.../Bus/Pci/PciBusDxe/PciEnumerator.c | 4 +-
.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 5 +-
MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 49 ++
.../Bus/Pci/PciBusDxe/PciResourceSupport.c | 277 +++++++++-
.../Bus/Pci/PciBusDxe/PciResourceSupport.h | 20 +
.../Bus/Pci/PciHostBridgeDxe/PciHostBridge.c | 93 +++-
.../Bus/Pci/PciHostBridgeDxe/PciHostBridge.h | 2 +
.../Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf | 4 +
.../Pci/PciHostBridgeDxe/PciHostResource.h | 1 +
MdeModulePkg/Include/Library/PciResourceLib.h | 20 +
MdeModulePkg/MdeModulePkg.dec | 6 +
OvmfPkg/Include/Library/HardwareInfoLib.h | 165 ++++++
.../HardwareInfoLib/DxeHardwareInfoLib.inf | 43 ++
.../Library/HardwareInfoLib/HardwareInfoDxe.c | 255 +++++++++
.../HardwareInfoPciHostBridgeLib.c | 514 ++++++++++++++++++
.../HardwareInfoPciHostBridgeLib.h | 262 +++++++++
.../Library/HardwareInfoLib/HardwareInfoPei.c | 85 +++
.../HardwareInfoLib/HardwareInfoTypesLib.h | 64 +++
.../HardwareInfoLib/PeiHardwareInfoLib.inf | 43 ++
.../QemuFwCfgHardwareInfoLib.c | 89 +++
.../PciHostBridgeUtilityLib.c | 333 +++++++++++-
.../PciHostBridgeUtilityLib.inf | 5 +
OvmfPkg/OvmfPkgX64.dsc | 3 +
OvmfPkg/PlatformPei/MemDetect.c | 146 ++++-
OvmfPkg/PlatformPei/PlatformPei.inf | 2 +
27 files changed, 2475 insertions(+), 18 deletions(-)
create mode 100644 MdeModulePkg/Include/Library/PciResourceLib.h
create mode 100644 OvmfPkg/Include/Library/HardwareInfoLib.h
create mode 100644 OvmfPkg/Library/HardwareInfoLib/DxeHardwareInfoLib.inf
create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoDxe.c
create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoPciHostBridgeLib.c
create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoPciHostBridgeLib.h
create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoPei.c
create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoTypesLib.h
create mode 100644 OvmfPkg/Library/HardwareInfoLib/PeiHardwareInfoLib.inf
create mode 100644 OvmfPkg/Library/HardwareInfoLib/QemuFwCfgHardwareInfoLib.c
--
2.17.1
Amazon Development Center Germany GmbH
Krausenstr. 38
10117 Berlin
Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss
Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
Sitz: Berlin
Ust-ID: DE 289 237 879
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v4 1/8] OvmfPkg/Library: Create base HardwareInfoLib for PCI Host Bridges
2022-02-03 20:56 [PATCH v4 0/8] Handling of multiple PCI host bridges specified Ojeda Leon, Nicolas
@ 2022-02-03 20:56 ` Ojeda Leon, Nicolas
2022-02-03 20:56 ` [PATCH v4 2/8] Ovmf/HardwareInfoLib: Create Pei lib to parse directly from fw-cfg Ojeda Leon, Nicolas
` (6 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Ojeda Leon, Nicolas @ 2022-02-03 20:56 UTC (permalink / raw)
To: devel; +Cc: atugup, Nicolas Ojeda Leon, Alexander Graf, Gerd Hoffmann
Create the Hardware Info library base together with the specifics to
describe PCI Host Bridges.
The Hardware Info library is intended to be used for disclosing
non-discoverable hardware information from the host to the guest in
Ovmf platforms. Core functionality will provide the possibility to
parse information from a generic BLOB into runtime structures. The
library is conceived in a generic way so that further hardware
elements can also be described using it. For such purpose the length
of the BLOB is not restricted but instead regarded as a sequence of
header-info elements that allow the parsing during runtime. The first
type of hardware defined will be PCI host bridges, providing the
possibility to define multiple and specify the resources each of them
can use. This enables the guest firmware to configure PCI resources
properly. Having the size of each individual element favors the reuse
of a single interface to convey descriptions of an arbitrary number
of heterogenous hardware elements. Furthermore, flexible access
mechanisms coupled with the size will grant the possibility of
interpreting them in a single run.
Define the base types of the generic Hardware Info library to parse
heterogeneous data. Also provide the specific changes to support
PCI host bridges as the first hardware type supported by the
library.
Additionally, define the HOST_BRIDGE_INFO structure to describe PCI
host bridges along with the functionality to parse such information
into proper structures used by the PCI driver in a centralized manner
and taking care of versioning.
As an example and motivation, the library will be used to define
multiple PCI host bridges for complex platforms that require it.
The first means of transportation that will be used is going to be
fw-cfg, over which a stream of bytes will be transferred and later
parsed by the hardware info library. Accordingly, the PCI driver
will make use of these host bridges definitions to populate the
list of Root Bridges and proceed with the configuration and discovery
of underlying hardware components.
As mentioned before, the binary data to be parsed by the Hardware
Info library should be organized as a sequence of Header-element
pairs in which the header describes the type and size of the associated
element that comes right after it. As an illustration, to provide
inforation of 3 host bridges the data, conceptually, would look
like this:
Header PCI Host Bridge (type and size) # 1
PCI Host Bridge info # 1
Header PCI Host Bridge (type and size) # 2
PCI Host Bridge info # 2
Header PCI Host Bridge (type and size) # 3
PCI Host Bridge info # 3
Cc: Alexander Graf <graf@amazon.de>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Nicolas Ojeda Leon <ncoleon@amazon.com>
---
Notes:
v4:
- Minor change in InvalidateRootBridgeAperture to always set the
invalid base address to MAX_UINT64, thus having a universal
invalid value.
.../HardwareInfoPciHostBridgeLib.c | 514 ++++++++++++++++++
.../HardwareInfoPciHostBridgeLib.h | 262 +++++++++
.../HardwareInfoLib/HardwareInfoTypesLib.h | 64 +++
3 files changed, 840 insertions(+)
create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoPciHostBridgeLib.c
create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoPciHostBridgeLib.h
create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoTypesLib.h
diff --git a/OvmfPkg/Library/HardwareInfoLib/HardwareInfoPciHostBridgeLib.c b/OvmfPkg/Library/HardwareInfoLib/HardwareInfoPciHostBridgeLib.c
new file mode 100644
index 0000000000..43a8d233ab
--- /dev/null
+++ b/OvmfPkg/Library/HardwareInfoLib/HardwareInfoPciHostBridgeLib.c
@@ -0,0 +1,514 @@
+/**@file
+ Hardware info library with types and accessors to parse information about
+ PCI host bridges.
+
+ Copyright 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ **/
+
+#include <Library/DebugLib.h>
+
+#include "HardwareInfoPciHostBridgeLib.h"
+
+#define IS_RANGE_INVALID(Start, Size, MaxValue) (Start >= MaxValue || Size == 0)
+
+/**
+ Calculate the last (inclusive) address of a range.
+
+ @param[in] Start First address of the range
+ @param[in] Size Size of the range
+ @return Last address of the range
+**/
+STATIC
+UINT64
+GetRangeEnd (
+ IN UINT64 Start,
+ IN UINT64 Size,
+ IN UINT64 MaxValue
+ )
+{
+ if (IS_RANGE_INVALID (Start, Size, MaxValue)) {
+ return 0;
+ }
+
+ return Start + Size - 1;
+}
+
+/**
+ Internal helper to update LastAddress if the Limit address
+ of the Mem aperture is higher than the provided value.
+
+ @param[in] Mem Pointer to aperture whose limit is
+ to be compared against accumulative
+ last address.
+ @param[out] LastAddress Pointer to accumulative last address
+ to be updated if Limit is higher
+**/
+STATIC
+VOID
+UpdateLastAddressIfHigher (
+ IN PCI_ROOT_BRIDGE_APERTURE *Mem,
+ OUT UINT64 *LastAddress
+ )
+{
+ if (Mem->Limit > *LastAddress) {
+ *LastAddress = Mem->Limit;
+ }
+}
+
+EFI_STATUS
+HardwareInfoPciHostBridgeLastMmioAddress (
+ IN CONST HOST_BRIDGE_INFO *HostBridge,
+ IN UINTN DataSize,
+ IN BOOLEAN HighMem,
+ OUT UINT64 *LastMmioAddress
+ )
+{
+ EFI_STATUS Status;
+ PCI_ROOT_BRIDGE_APERTURE Mem;
+ PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
+ PCI_ROOT_BRIDGE_APERTURE PMem;
+ PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;
+
+ if (LastMmioAddress == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // Set the output to the lowest possible value so that if some step fails
+ // the overall outcome reflects no information found
+ //
+ *LastMmioAddress = 0;
+
+ Status = HardwareInfoPciHostBridgeGetApertures (
+ HostBridge,
+ DataSize,
+ NULL,
+ &Mem,
+ &MemAbove4G,
+ &PMem,
+ &PMemAbove4G,
+ NULL
+ );
+
+ //
+ // Forward error to caller but ignore warnings given that, very likely,
+ // the host bridge will have a PIO aperture we are explicitly
+ // ignoring here since we care only about MMIO resources.
+ //
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ if (HighMem) {
+ UpdateLastAddressIfHigher (&MemAbove4G, LastMmioAddress);
+ UpdateLastAddressIfHigher (&PMemAbove4G, LastMmioAddress);
+ } else {
+ UpdateLastAddressIfHigher (&Mem, LastMmioAddress);
+ UpdateLastAddressIfHigher (&PMem, LastMmioAddress);
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Set the boundaries of an aperture to invalid values having
+ size zero and start MaxValue (yields Start > Limit which
+ depicts an invalid range)
+
+ @param[in] MaxValue Max value of the aperture's range (depends
+ on the data type)
+ @param[out] Aperture Aperture object to invalidate
+**/
+STATIC
+VOID
+InvalidateRootBridgeAperture (
+ OUT PCI_ROOT_BRIDGE_APERTURE *Aperture
+ )
+{
+ if (Aperture == NULL) {
+ return;
+ }
+
+ Aperture->Base = MAX_UINT64;
+ Aperture->Limit = 0;
+}
+
+/**
+ Fill a PCI ROOT BRIDGE APERTURE with the proper values calculated
+ from the provided start and size.
+
+ @param[in] Start Start address of the aperture
+ @param[in] Size Size, in bytes, of the aperture
+ @param[in] MaxValue Max value a valid address could take and which
+ represents an invalid start address.
+ @param[out] Aperture Pointer to the aperture to be filled
+
+ @retval EFI_SUCCESS Aperture was filled successfully
+ @retval EFI_INVALID_PARAMETER Range depicted by Start and Size is
+ valid but ignored because aperture
+ pointer is NULL
+ @retval EFI_WARN_BUFFER_TOO_SMALL Aperture pointer is invalid but the
+ range also is so no harm.
+**/
+STATIC
+EFI_STATUS
+FillHostBridgeAperture (
+ IN UINT64 Start,
+ IN UINT64 Size,
+ IN UINT64 MaxValue,
+ OUT PCI_ROOT_BRIDGE_APERTURE *Aperture
+ )
+{
+ UINT64 End;
+
+ End = GetRangeEnd (Start, Size, MaxValue);
+
+ if (Aperture == NULL) {
+ if (!IS_RANGE_INVALID (Start, Size, MaxValue)) {
+ //
+ // Report an error to the caller since the range specified in
+ // the host bridge's resources is non-empty but the provided
+ // aperture pointer is null, thus the valid range is ignored.
+ //
+ return EFI_INVALID_PARAMETER;
+ }
+
+ return EFI_WARN_BUFFER_TOO_SMALL;
+ }
+
+ if (IS_RANGE_INVALID (Start, Size, MaxValue)) {
+ //
+ // Fill Aperture with invalid range values to signal the
+ // absence of an address space (empty range)
+ //
+ InvalidateRootBridgeAperture (Aperture);
+ } else {
+ Aperture->Base = Start;
+ Aperture->Limit = End;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Merge 2 ranges (normal and prefetchable) into a single aperture
+ comprehending the addresses encompassed by both of them. If both
+ ranges are not empty they must be contiguous for correctness.
+
+ @param[in] Start Range start address
+ @param[in] Size Range size in bytes
+ @param[in] PStart Prefetchable range start address
+ @param[in] PSize Prefetchable range size in bytes
+ @param[in] MaxValue Max value a valid address could take and which
+ represents an invalid start address.
+ @param[out] Aperture Pointer to the aperture to be filled
+
+ @retval EFI_SUCCESS Aperture was filled successfully
+ @retval EFI_INVALID_PARAMETER Either range depicted by Start, Size
+ or PStart, PSize or both are valid
+ but ignored because aperture pointer
+ is NULL
+ @retval EFI_WARN_BUFFER_TOO_SMALL Aperture pointer is invalid but both
+ ranges are too so no harm.
+**/
+STATIC
+EFI_STATUS
+MergeHostBridgeApertures (
+ IN UINT64 Start,
+ IN UINT64 Size,
+ IN UINT64 PStart,
+ IN UINT64 PSize,
+ IN UINT64 MaxValue,
+ OUT PCI_ROOT_BRIDGE_APERTURE *Aperture
+ )
+{
+ UINT64 PEnd;
+
+ if (Aperture == NULL) {
+ if (!IS_RANGE_INVALID (Start, Size, MaxValue) ||
+ !IS_RANGE_INVALID (PStart, PSize, MaxValue))
+ {
+ //
+ // Report an error to the caller since the range specified in
+ // the host bridge's resources is non-empty but the provided
+ // aperture pointer is null, thus the valid range is ignored.
+ //
+ return EFI_INVALID_PARAMETER;
+ }
+
+ return EFI_WARN_BUFFER_TOO_SMALL;
+ }
+
+ //
+ // Start from an empty range (Limit < Base)
+ //
+ InvalidateRootBridgeAperture (Aperture);
+
+ if (!IS_RANGE_INVALID (Start, Size, MaxValue)) {
+ Aperture->Base = Start;
+ Aperture->Limit = Start + Size - 1;
+ }
+
+ if (!IS_RANGE_INVALID (PStart, PSize, MaxValue)) {
+ PEnd = PStart + PSize - 1;
+
+ if (PStart < Aperture->Base) {
+ Aperture->Base = PStart;
+ }
+
+ if (PEnd > Aperture->Limit) {
+ Aperture->Limit = PEnd;
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+HardwareInfoPciHostBridgeGetBusNrRange (
+ IN CONST HOST_BRIDGE_INFO *HostBridge,
+ IN UINTN DataSize,
+ OUT UINTN *BusNrStart,
+ OUT UINTN *BusNrLast
+ )
+{
+ if ((HostBridge == NULL) || (DataSize == 0) ||
+ (BusNrStart == NULL) || (BusNrLast == NULL))
+ {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // For now only version 0 is supported
+ //
+ if (HostBridge->Version != 0) {
+ return EFI_INCOMPATIBLE_VERSION;
+ }
+
+ *BusNrStart = HostBridge->BusNrStart;
+ *BusNrLast = HostBridge->BusNrLast;
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+HardwareInfoPciHostBridgeGetApertures (
+ IN CONST HOST_BRIDGE_INFO *HostBridge,
+ IN UINTN DataSize,
+ OUT PCI_ROOT_BRIDGE_APERTURE *Io,
+ OUT PCI_ROOT_BRIDGE_APERTURE *Mem,
+ OUT PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
+ OUT PCI_ROOT_BRIDGE_APERTURE *PMem,
+ OUT PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,
+ OUT PCI_ROOT_BRIDGE_APERTURE *PcieConfig
+ )
+{
+ EFI_STATUS Status;
+ BOOLEAN StickyError;
+
+ StickyError = FALSE;
+ if ((HostBridge == NULL) || (DataSize == 0)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // For now only version 0 is supported
+ //
+ if (HostBridge->Version != 0) {
+ return EFI_INCOMPATIBLE_VERSION;
+ }
+
+ Status = FillHostBridgeAperture (
+ HostBridge->IoStart,
+ HostBridge->IoSize,
+ MAX_UINT32,
+ Io
+ );
+ StickyError |= EFI_ERROR (Status);
+
+ Status = FillHostBridgeAperture (
+ HostBridge->PcieConfigStart,
+ HostBridge->PcieConfigSize,
+ MAX_UINT64,
+ PcieConfig
+ );
+ StickyError |= EFI_ERROR (Status);
+
+ if (HostBridge->Flags.Bits.CombineMemPMem) {
+ Status = MergeHostBridgeApertures (
+ HostBridge->MemStart,
+ HostBridge->MemSize,
+ HostBridge->PMemStart,
+ HostBridge->PMemSize,
+ MAX_UINT32,
+ Mem
+ );
+ StickyError |= EFI_ERROR (Status);
+
+ Status = MergeHostBridgeApertures (
+ HostBridge->MemAbove4GStart,
+ HostBridge->MemAbove4GSize,
+ HostBridge->PMemAbove4GStart,
+ HostBridge->PMemAbove4GSize,
+ MAX_UINT64,
+ MemAbove4G
+ );
+ StickyError |= EFI_ERROR (Status);
+
+ //
+ // Invalidate unused apertures
+ //
+ InvalidateRootBridgeAperture (PMem);
+ InvalidateRootBridgeAperture (PMemAbove4G);
+ } else {
+ Status = FillHostBridgeAperture (
+ HostBridge->MemStart,
+ HostBridge->MemSize,
+ MAX_UINT32,
+ Mem
+ );
+ StickyError |= EFI_ERROR (Status);
+
+ Status = FillHostBridgeAperture (
+ HostBridge->PMemStart,
+ HostBridge->PMemSize,
+ MAX_UINT32,
+ PMem
+ );
+ StickyError |= EFI_ERROR (Status);
+
+ Status = FillHostBridgeAperture (
+ HostBridge->MemAbove4GStart,
+ HostBridge->MemAbove4GSize,
+ MAX_UINT64,
+ MemAbove4G
+ );
+ StickyError |= EFI_ERROR (Status);
+
+ Status = FillHostBridgeAperture (
+ HostBridge->PMemAbove4GStart,
+ HostBridge->PMemAbove4GSize,
+ MAX_UINT64,
+ PMem
+ );
+ StickyError |= EFI_ERROR (Status);
+ }
+
+ if (StickyError) {
+ //
+ // If any function returned an error it is due to a valid range
+ // specified in the host bridge that was ignored due to a NULL
+ // pointer. Translate it to a warning to allow for calling with
+ // only a subset of the apertures.
+ //
+ return EFI_WARN_STALE_DATA;
+ }
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+HardwareInfoPciHostBridgeGetFlags (
+ IN CONST HOST_BRIDGE_INFO *HostBridge,
+ IN UINTN DataSize,
+ OUT UINT64 *Attributes OPTIONAL,
+ OUT BOOLEAN *DmaAbove4G OPTIONAL,
+ OUT BOOLEAN *NoExtendedConfigSpace OPTIONAL,
+ OUT BOOLEAN *CombineMemPMem OPTIONAL
+ )
+{
+ if ((HostBridge == NULL) || (DataSize == 0)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // For now only version 0 is supported
+ //
+ if (HostBridge->Version != 0) {
+ return EFI_INCOMPATIBLE_VERSION;
+ }
+
+ if (Attributes) {
+ *Attributes = HostBridge->Attributes;
+ }
+
+ if (DmaAbove4G) {
+ *DmaAbove4G = !!HostBridge->Flags.Bits.DmaAbove4G;
+ }
+
+ if (NoExtendedConfigSpace) {
+ *NoExtendedConfigSpace = !!HostBridge->Flags.Bits.NoExtendedConfigSpace;
+ }
+
+ if (CombineMemPMem) {
+ *CombineMemPMem = !!HostBridge->Flags.Bits.CombineMemPMem;
+ }
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+HardwareInfoPciHostBridgeGet (
+ IN CONST HOST_BRIDGE_INFO *HostBridge,
+ IN UINTN DataSize,
+ OUT UINTN *BusNrStart,
+ OUT UINTN *BusNrLast,
+ OUT UINT64 *Attributes OPTIONAL,
+ OUT BOOLEAN *DmaAbove4G OPTIONAL,
+ OUT BOOLEAN *NoExtendedConfigSpace OPTIONAL,
+ OUT BOOLEAN *CombineMemPMem OPTIONAL,
+ OUT PCI_ROOT_BRIDGE_APERTURE *Io OPTIONAL,
+ OUT PCI_ROOT_BRIDGE_APERTURE *Mem OPTIONAL,
+ OUT PCI_ROOT_BRIDGE_APERTURE *MemAbove4G OPTIONAL,
+ OUT PCI_ROOT_BRIDGE_APERTURE *PMem OPTIONAL,
+ OUT PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G OPTIONAL,
+ OUT PCI_ROOT_BRIDGE_APERTURE *PcieConfig OPTIONAL
+ )
+{
+ EFI_STATUS Status;
+
+ Status = HardwareInfoPciHostBridgeGetBusNrRange (
+ HostBridge,
+ DataSize,
+ BusNrStart,
+ BusNrLast
+ );
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = HardwareInfoPciHostBridgeGetFlags (
+ HostBridge,
+ DataSize,
+ Attributes,
+ DmaAbove4G,
+ NoExtendedConfigSpace,
+ CombineMemPMem
+ );
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = HardwareInfoPciHostBridgeGetApertures (
+ HostBridge,
+ DataSize,
+ Io,
+ Mem,
+ MemAbove4G,
+ PMem,
+ PMemAbove4G,
+ PcieConfig
+ );
+
+ return Status;
+}
diff --git a/OvmfPkg/Library/HardwareInfoLib/HardwareInfoPciHostBridgeLib.h b/OvmfPkg/Library/HardwareInfoLib/HardwareInfoPciHostBridgeLib.h
new file mode 100644
index 0000000000..397c8f8a5d
--- /dev/null
+++ b/OvmfPkg/Library/HardwareInfoLib/HardwareInfoPciHostBridgeLib.h
@@ -0,0 +1,262 @@
+/**@file
+ Hardware info library with types and accessors to parse information about
+ PCI host bridges.
+
+ Copyright 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ **/
+
+#ifndef __HARDWARE_INFO_PCI_HOST_BRIDGE_LIB_H__
+#define __HARDWARE_INFO_PCI_HOST_BRIDGE_LIB_H__
+
+#include <Uefi/UefiBaseType.h>
+#include <Uefi/UefiSpec.h>
+#include <Library/PciHostBridgeLib.h>
+
+//
+// Host Bridge resources information
+//
+#pragma pack(1)
+typedef struct {
+ //
+ // Feature tracking, initially 0
+ //
+ UINT64 Version;
+
+ //
+ // Host bridge enabled attributes (EFI_PCI_ATTRIBUTE_*)
+ //
+ UINT64 Attributes;
+
+ union {
+ UINT64 Uint64;
+ struct {
+ UINT64 DmaAbove4G : 1;
+ UINT64 NoExtendedConfigSpace : 1;
+ UINT64 CombineMemPMem : 1;
+ UINT64 Reserved : 61;
+ } Bits;
+ } Flags;
+
+ //
+ // Bus number range
+ //
+ UINT8 BusNrStart;
+ UINT8 BusNrLast;
+
+ UINT8 Padding[6];
+
+ //
+ // IO aperture
+ //
+ UINT64 IoStart;
+ UINT64 IoSize;
+
+ //
+ // 32-bit MMIO aperture
+ //
+ UINT64 MemStart;
+ UINT64 MemSize;
+
+ //
+ // 32-bit prefetchable MMIO aperture
+ //
+ UINT64 PMemStart;
+ UINT64 PMemSize;
+
+ //
+ // 64-bit MMIO aperture
+ //
+ UINT64 MemAbove4GStart;
+ UINT64 MemAbove4GSize;
+
+ //
+ // 64-bit prefetchable MMIO aperture
+ //
+ UINT64 PMemAbove4GStart;
+ UINT64 PMemAbove4GSize;
+
+ //
+ // MMIO accessible PCIe config space (ECAM)
+ //
+ UINT64 PcieConfigStart;
+ UINT64 PcieConfigSize;
+} HOST_BRIDGE_INFO;
+#pragma pack()
+
+/**
+ Extract the last MMIO address, either from high (64-bit) or low (32-bit)
+ memory used by the HostBridge's apertures.
+
+ @param[in] HostBridge Root bridge's resources specification
+ @param[in] DataSize Size in bytes of the actually filled
+ data available in the HostBridge object
+ @param[in] HighMem 64-bit (true) or 32-bit (false) MMIO
+ address
+ @param[out] LastMmioAddress Pointer to last MMIO address
+
+ @retval EFI_SUCCESS Operation succeeded
+ @retval EFI_INVALID_PARAMETER One or more pointer parameters are
+ invalid
+ @retval EFI_INCOMPATIBLE_VERSION HostBridge information belongs to
+ an unsupported version
+**/
+EFI_STATUS
+HardwareInfoPciHostBridgeLastMmioAddress (
+ IN CONST HOST_BRIDGE_INFO *HostBridge,
+ IN UINTN DataSize,
+ IN BOOLEAN HighMem,
+ OUT UINT64 *LastMmioAddress
+ );
+
+/**
+ Interpret the HostBridge resources and extact the bus number
+ range.
+
+ @param[in] HostBridge Root bridge's resources specification
+ @param[in] DataSize Size in bytes of the actually filled
+ data available in the HostBridge object
+ @param[out] BusNrStart Pointer to the Bus Number range start
+ @param[out] BusNrLast Pointer to the Bus Number range end
+
+ @retval EFI_SUCCESS Retrieved the bus number range
+ without any issues.
+ @retval EFI_INVALID_PARAMETER One of the parameters is invalid,
+ either NULL pointer or size 0
+ @retval EFI_INCOMPATIBLE_VERSION HostBridge data of unsupported
+ version
+**/
+EFI_STATUS
+HardwareInfoPciHostBridgeGetBusNrRange (
+ IN CONST HOST_BRIDGE_INFO *HostBridge,
+ IN UINTN DataSize,
+ OUT UINTN *BusNrStart,
+ OUT UINTN *BusNrLast
+ );
+
+/**
+ Interpret the MMIO resources in HostBridge and set the apertures
+ in 32-bit space (Mem), 64-bit space (MemAbove4G), PIO (IO) and
+ ECAM (PcieConfig) accordingly.
+
+ The 2 types of apertures in each MMIO space (prefetchable and
+ non-prefetchable) may be merged into a single window, hence if both
+ types of apertures are defined while the CombineMemPMem flag is set,
+ the ranges must be contiguous.
+
+ @param[in] HostBridge Root bridge's resources specification
+ @param[in] DataSize Size in bytes of the actually filled
+ data available in the HostBridge object
+ @param[out] Mem Pointer to 32-bit MMIO aperture
+ @param[out] MemAbove4G Pointer to 64-bit MMIO aperture
+ @param[out] PMem Pointer to the 32-bit prefetchable MMIO aperture
+ @param[out] PMemAbove4G Pointer to the 64-bit prefetchable MMIO aperture
+ @param[out] PcieConfig Pointer to MMIO mapped PCIe config aperture (ECAM)
+
+ @retval EFI_INVALID_PARAMETER HostBridge object is invalid
+ @retval EFI_INCOMPATIBLE_VERSION HostBridge information belongs to
+ an unsupported version
+ @retval EFI_WARN_STALE_DATA One or more valid aperture in the
+ HostBridge's resources were ignored
+ because corresponding aperture pointer
+ is NULL.
+ @retval EFI_SUCCESS Operation executed cleanly, all valid
+ ranges were parsed into the corresponding
+ aperture object.
+**/
+EFI_STATUS
+HardwareInfoPciHostBridgeGetApertures (
+ IN CONST HOST_BRIDGE_INFO *HostBridge,
+ IN UINTN DataSize,
+ OUT PCI_ROOT_BRIDGE_APERTURE *Io,
+ OUT PCI_ROOT_BRIDGE_APERTURE *Mem,
+ OUT PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
+ OUT PCI_ROOT_BRIDGE_APERTURE *PMem,
+ OUT PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,
+ OUT PCI_ROOT_BRIDGE_APERTURE *PcieConfig
+ );
+
+/**
+ Retrieve all flags and attributes of a host bridge describing the
+ resources and capabilities.
+
+ @param[in] HostBridge Host bridge information object
+ @param[in] DataSize Size in bytes of the actually filled
+ data available in the HostBridge object
+ @param[out] Attributes Pointer to the host bridge's attributes
+ @param[out] DmaAbove4G Pointer to the DMA Above 4G flag
+ @param[out] NoExtendedConfigSpace Pointer to the Extended Config Space flag
+ @param[out] CombineMemPMem Pointer to the Combine Mem and PMem flag
+
+ @retval EFI_INVALID_PARAMETER HostBridge object is invalid
+ @retval EFI_INCOMPATIBLE_VERSION HostBridge information belongs to
+ an unsupported version
+ @retval EFI_SUCCESS Operation executed cleanly
+**/
+EFI_STATUS
+HardwareInfoPciHostBridgeGetFlags (
+ IN CONST HOST_BRIDGE_INFO *HostBridge,
+ IN UINTN DataSize,
+ OUT UINT64 *Attributes OPTIONAL,
+ OUT BOOLEAN *DmaAbove4G OPTIONAL,
+ OUT BOOLEAN *NoExtendedConfigSpace OPTIONAL,
+ OUT BOOLEAN *CombineMemPMem OPTIONAL
+ );
+
+/**
+ Getter that parses information from a HOST_BRIDGE_INFO object
+ into smaller chunks of types handled by the PciHostBridgeLib.
+
+ @param[in] HostBridge Host bridge information object
+ @param[in] DataSize Size in bytes of the actually filled
+ data available in the HostBridge object
+ @param[out] BusNrStart Pointer to the Bus Number range start
+ @param[out] BusNrLast Pointer to the Bus Number range end
+ @param[out] Attributes Pointer to the host bridge's attributes
+ @param[out] DmaAbove4G Pointer to the DMA Above 4G flag
+ @param[out] NoExtendedConfigSpace Pointer to the Extended Config Space flag
+ @param[out] CombineMemPMem Pointer to the Combine Mem and PMem flag
+ @param[out] Io Pointer to the PIO aperture object
+ @param[out] Mem Pointer to the 32-bit MMIO aperture object
+ @param[out] MemAbove4G Pointer to the 64-bit MMIO aperture object
+ @param[out] PMem Pointer to the 32-bit prefetchable MMIO
+ aperture object
+ @param[out] PMemAbove4G Pointer to the 64-bit prefetchable MMIO
+ aperture object
+ @param[out] PcieConfig MMIO mapped PCIe config aperture (ECAM)
+
+ @retval EFI_SUCCESS Whole operation succeeded
+ @retval EFI_INVALID_PARAMETER HostBridge object and/or non-optional
+ output parameters are invalid
+ @retval EFI_INCOMPATIBLE_VERSION HostBridge information provided belongs to
+ and unsupported version
+ @retval EFI_WARN_STALE_DATA One or more apertures having valid ranges
+ in the HostBridge info were ignored because
+ the correspnding aperture pointer is NULL
+**/
+EFI_STATUS
+HardwareInfoPciHostBridgeGet (
+ IN CONST HOST_BRIDGE_INFO *HostBridge,
+ IN UINTN DataSize,
+ OUT UINTN *BusNrStart,
+ OUT UINTN *BusNrLast,
+ OUT UINT64 *Attributes OPTIONAL,
+ OUT BOOLEAN *DmaAbove4G OPTIONAL,
+ OUT BOOLEAN *NoExtendedConfigSpace OPTIONAL,
+ OUT BOOLEAN *CombineMemPMem OPTIONAL,
+ OUT PCI_ROOT_BRIDGE_APERTURE *Io OPTIONAL,
+ OUT PCI_ROOT_BRIDGE_APERTURE *Mem OPTIONAL,
+ OUT PCI_ROOT_BRIDGE_APERTURE *MemAbove4G OPTIONAL,
+ OUT PCI_ROOT_BRIDGE_APERTURE *PMem OPTIONAL,
+ OUT PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G OPTIONAL,
+ OUT PCI_ROOT_BRIDGE_APERTURE *PcieConfig OPTIONAL
+ );
+
+#endif // __HARDWARE_INFO_PCI_HOST_BRIDGE_LIB_H__
diff --git a/OvmfPkg/Library/HardwareInfoLib/HardwareInfoTypesLib.h b/OvmfPkg/Library/HardwareInfoLib/HardwareInfoTypesLib.h
new file mode 100644
index 0000000000..84edd1c6ac
--- /dev/null
+++ b/OvmfPkg/Library/HardwareInfoLib/HardwareInfoTypesLib.h
@@ -0,0 +1,64 @@
+/**@file
+ Hardware info types' definitions.
+
+ General hardware info types to parse the binary data
+
+ Copyright 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ **/
+
+#ifndef __HARDWARE_INFO_TYPES_LIB_H__
+#define __HARDWARE_INFO_TYPES_LIB_H__
+
+// Specific hardware types:
+#include "HardwareInfoPciHostBridgeLib.h"
+
+//
+// Hardware info types enumeration listing the supported
+// types which have an associated type definition
+//
+typedef enum {
+ HardwareInfoTypeUndefined = 0,
+ HardwareInfoTypeHostBridge = 1,
+} HARDWARE_INFO_TYPE;
+
+//
+// Header format preceding and describing an associated hardware
+// info element
+//
+#pragma pack(1)
+typedef struct {
+ union {
+ UINT64 Uint64;
+ HARDWARE_INFO_TYPE Value;
+ } Type;
+ UINT64 Size;
+} HARDWARE_INFO_HEADER;
+#pragma pack()
+
+//
+// Generic data structure to access any supported hardware type
+// resource definition
+//
+#pragma pack(1)
+typedef struct {
+ LIST_ENTRY Link;
+ HARDWARE_INFO_HEADER Header;
+ union {
+ UINT8 *Raw;
+ HOST_BRIDGE_INFO *PciHostBridge;
+ } Data;
+} HARDWARE_INFO;
+#pragma pack()
+
+#define HARDWARE_INFO_FROM_LINK(a) \
+ BASE_CR (a, HARDWARE_INFO, Link)
+
+#endif // __HARDWARE_INFO_TYPES_LIB_H__
--
2.17.1
Amazon Development Center Germany GmbH
Krausenstr. 38
10117 Berlin
Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss
Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
Sitz: Berlin
Ust-ID: DE 289 237 879
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v4 2/8] Ovmf/HardwareInfoLib: Create Pei lib to parse directly from fw-cfg
2022-02-03 20:56 [PATCH v4 0/8] Handling of multiple PCI host bridges specified Ojeda Leon, Nicolas
2022-02-03 20:56 ` [PATCH v4 1/8] OvmfPkg/Library: Create base HardwareInfoLib for PCI Host Bridges Ojeda Leon, Nicolas
@ 2022-02-03 20:56 ` Ojeda Leon, Nicolas
2022-02-03 20:56 ` [PATCH v4 3/8] Ovmf/HardwareInfoLib: Add Dxe lib to dynamically parse heterogenous data Ojeda Leon, Nicolas
` (5 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Ojeda Leon, Nicolas @ 2022-02-03 20:56 UTC (permalink / raw)
To: devel; +Cc: atugup, Nicolas Ojeda Leon, Alexander Graf, Gerd Hoffmann
Define the HardwareInfoLib API and create the PeiHardwareInfoLib
which implements it, specifically for Pei usage, supporting
only static accesses to parse data directly from a fw-cfg file.
All list-like APIs are implemented as unsupported and only a
fw-cfg wrapper to read hardware info elements is provided.
The Hardware Info library is intended to describe non-discoverable
hardware information and share that from the host to the guest in Ovmf
platforms. The QEMU fw-cfg extension for this library provides a first
variation to parse hardware info by reading it directly from a fw-cfg
file. This library offers a wrapper function to the plain
QmeuFwCfgReadBytes which, specifically, parses header-data pairs out
of the binary values in the file. For this purpose, the approach is
incremental, reading the file block by block and outputting the values
only for a specific known hardware type (e.g. PCI host bridges). One
element is returned in each call until the end of the file is reached.
Considering fw-cfg as the first means to transport hardware info from
the host to the guest, this wrapping library offers the possibility
to statically, and in steps, read a specific type of hardware info
elements out of the file. This method reads one hardware element of a
specific type at a time, without the need to pre-allocate memory and
read the whole file or dynamically allocate memory for each new
element found.
As a usage example, the static approach followed by this library
enables early UEFI stages to use and read hardware information
supplied by the host. For instance, in early times of the PEI stage,
hardware information can be parsed out from a fw-cfg file prescinding
from memory services, that may not yet be available, and avoiding
dynamic memory allocations.
Cc: Alexander Graf <graf@amazon.de>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Nicolas Ojeda Leon <ncoleon@amazon.com>
---
OvmfPkg/Include/Library/HardwareInfoLib.h | 165 ++++++++++++++++++
.../Library/HardwareInfoLib/HardwareInfoPei.c | 85 +++++++++
.../HardwareInfoLib/PeiHardwareInfoLib.inf | 43 +++++
.../QemuFwCfgHardwareInfoLib.c | 89 ++++++++++
OvmfPkg/OvmfPkgX64.dsc | 1 +
5 files changed, 383 insertions(+)
create mode 100644 OvmfPkg/Include/Library/HardwareInfoLib.h
create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoPei.c
create mode 100644 OvmfPkg/Library/HardwareInfoLib/PeiHardwareInfoLib.inf
create mode 100644 OvmfPkg/Library/HardwareInfoLib/QemuFwCfgHardwareInfoLib.c
diff --git a/OvmfPkg/Include/Library/HardwareInfoLib.h b/OvmfPkg/Include/Library/HardwareInfoLib.h
new file mode 100644
index 0000000000..9a8149bf20
--- /dev/null
+++ b/OvmfPkg/Include/Library/HardwareInfoLib.h
@@ -0,0 +1,165 @@
+/*/@file
+ Hardware info parsing functions.
+ Binary data is expected as a consecutive series of header - object pairs.
+ Complete library providing static Qemu fw-cfg wrappers as well as list-like
+ interface to dynamically manipulate hardware info objects and parsing from
+ a generic blob.
+
+ Copyright 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef __HARDWARE_INFO_LIB_H__
+#define __HARDWARE_INFO_LIB_H__
+
+#include "../Library/HardwareInfoLib/HardwareInfoTypesLib.h"
+
+/**
+ Read, if available, the next Type element in the FwCfg file.
+ The FwCfg item must already be selected, this is a wrapper around
+ QemuFwCfgReadBytes and the Data pointer should be set to an existent
+ memory location with TypeSize bytes allocated for the date to be
+ properly written. If a Type element is found in the file which has a
+ size (in the header) greater than TypeSize, it is skipped.
+
+ @param[in] Type Hardware Info Type to search for
+ @param[in] TypeSize Size (in bytes) of the structure intended to
+ be used to dereference the data
+ @param[in] TotalFileSize Total size (in bytes) of the FwCfg file from
+ which the data is read.
+ @param[out] Data Pointer to a memory allocated instance into
+ which the data is written to.
+ @param[out] DataSize Size in bytes of the actually filled
+ data available in the Data object after a
+ successful operation
+ @param[inout] ReadIndex Index of the next byte to be read. Incremented
+ accordingly after a read operation to reflect
+ up to date status
+
+ @retval EFI_SUCCESS Next element found and read into Data
+ @retval EFI_INVALID_PARAMETER Operation failed
+ @retval EFI_END_OF_FILE End of the file reached, no more elements
+ to read.
+**/
+EFI_STATUS
+QemuFwCfgReadNextHardwareInfoByType (
+ IN HARDWARE_INFO_TYPE Type,
+ IN UINTN TypeSize,
+ IN UINTN TotalFileSize,
+ OUT VOID *Data,
+ OUT UINTN *DataSize OPTIONAL,
+ IN OUT UINTN *ReadIndex
+ );
+
+/**
+ Parse binary data containing resource information of multiple hardware
+ elements into a list of interpreted resources.
+ The translation is done on a copy-parse base so the blob can be freed
+ afterwards.
+
+ @param[in] Blob Binary data to be parsed
+ @param[in] BlobSize Size (in bytes) of the binary data
+ @param[in] TypeFilter Optional type to filter entries. Set to
+ undefined to disable filtering and retrieve all
+ @param[out] ListHead Head of the list to populate hardware information
+
+ @retval EFI_SUCCESS Succeed.
+ @retval EFI_INVALID_PARAMETER Provided Blob inforation is invalid
+ @retval EFI_OUT_OF_RESOURCES Out of memory, list populated as far as
+ possible
+**/
+EFI_STATUS
+CreateHardwareInfoList (
+ IN UINT8 *Blob,
+ IN UINTN BlobSize,
+ IN HARDWARE_INFO_TYPE TypeFilter,
+ OUT LIST_ENTRY *ListHead
+ );
+
+/**
+ Free the dynamically allocated list of HADWARE_INFO items populated
+ during parsing of Blob
+
+ @param ListHead Head of the list to be destroyed
+**/
+VOID
+FreeHardwareInfoList (
+ IN OUT LIST_ENTRY *ListHead
+ );
+
+/**
+ Retrieve the number of hardware components of a specific type
+ in the list.
+
+ @param[in] ListHead Head of the hardware info list
+ @param[in] Type Type of hardware elements to count
+ @param[in] TypeSize Size (in bytes) of the structure intended to
+ be used to dereference the data
+ @return Count of elements of Type found
+**/
+UINTN
+GetHardwareInfoCountByType (
+ IN LIST_ENTRY *ListHead,
+ IN HARDWARE_INFO_TYPE Type,
+ IN UINTN TypeSize
+ );
+
+/**
+ Get the First Hardware Info entry in the list of the specified type
+
+ @param[in] ListHead Head of the hardware info list
+ @param[in] Type Hardware Info Type to search for
+ @param[in] TypeSize Size (in bytes) of the structure intended to
+ be used to dereference the data
+ @return Link of first entry of specified type or list head if not found
+**/
+LIST_ENTRY *
+GetFirstHardwareInfoByType (
+ IN LIST_ENTRY *ListHead,
+ IN HARDWARE_INFO_TYPE Type,
+ IN UINTN TypeSize
+ );
+
+/**
+ Get the Next Hardware Info entry in the list with the specified
+ type, which follows the provided Node.
+
+ @param[in] ListHead Head of the hardware info list
+ @param[in] Node Current, already processed, node's link
+ @param[in] Type Hardware Info Type to search for
+ @param[in] TypeSize Size (in bytes) of the structure intended to
+ be used to dereference the data
+ @return Link of next entry, after Node, of the specified type.
+ List head otherwise
+**/
+LIST_ENTRY *
+GetNextHardwareInfoByType (
+ IN LIST_ENTRY *ListHead,
+ IN LIST_ENTRY *Node,
+ IN HARDWARE_INFO_TYPE Type,
+ IN UINTN TypeSize
+ );
+
+/**
+ Assess if Node stands at the end of the doubly linked list
+
+ @param[in] ListHead Head of the hardware info list
+ @param[in] Node Current Node link
+
+ @retval TRUE Node is at the end of the list
+ @retval FALSE Node is not at the end of the list
+**/
+BOOLEAN
+EndOfHardwareInfoList (
+ IN LIST_ENTRY *ListHead,
+ IN LIST_ENTRY *Node
+ );
+
+#endif // __HARDWARE_INFO_LIB_H__
diff --git a/OvmfPkg/Library/HardwareInfoLib/HardwareInfoPei.c b/OvmfPkg/Library/HardwareInfoLib/HardwareInfoPei.c
new file mode 100644
index 0000000000..40d27f69ad
--- /dev/null
+++ b/OvmfPkg/Library/HardwareInfoLib/HardwareInfoPei.c
@@ -0,0 +1,85 @@
+/*/@file
+ Hardware info parsing functions.
+ Binary data is expected as a consecutive series of header - object pairs.
+ Provides static Qemu fw-cfg wrappers as well as list-like interface to
+ dynamically manipulate hardware info objects and parsing from a generic
+ blob.
+
+ Copyright 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#include <Library/DebugLib.h>
+
+#include <Library/HardwareInfoLib.h>
+
+EFI_STATUS
+CreateHardwareInfoList (
+ IN UINT8 *Blob,
+ IN UINTN BlobSize,
+ IN HARDWARE_INFO_TYPE TypeFilter,
+ OUT LIST_ENTRY *ListHead
+ )
+{
+ ASSERT (FALSE);
+ return EFI_UNSUPPORTED;
+}
+
+VOID
+FreeHardwareInfoList (
+ IN OUT LIST_ENTRY *ListHead
+ )
+{
+ ASSERT (FALSE);
+}
+
+UINTN
+GetHardwareInfoCountByType (
+ IN LIST_ENTRY *ListHead,
+ IN HARDWARE_INFO_TYPE Type,
+ IN UINTN TypeSize
+ )
+{
+ ASSERT (FALSE);
+ return 0;
+}
+
+LIST_ENTRY *
+GetFirstHardwareInfoByType (
+ IN LIST_ENTRY *ListHead,
+ IN HARDWARE_INFO_TYPE Type,
+ IN UINTN TypeSize
+ )
+{
+ ASSERT (FALSE);
+ return ListHead;
+}
+
+LIST_ENTRY *
+GetNextHardwareInfoByType (
+ IN LIST_ENTRY *ListHead,
+ IN LIST_ENTRY *Node,
+ IN HARDWARE_INFO_TYPE Type,
+ IN UINTN TypeSize
+ )
+{
+ ASSERT (FALSE);
+ return ListHead;
+}
+
+BOOLEAN
+EndOfHardwareInfoList (
+ IN LIST_ENTRY *ListHead,
+ IN LIST_ENTRY *Node
+ )
+{
+ ASSERT (FALSE);
+ return TRUE;
+}
diff --git a/OvmfPkg/Library/HardwareInfoLib/PeiHardwareInfoLib.inf b/OvmfPkg/Library/HardwareInfoLib/PeiHardwareInfoLib.inf
new file mode 100644
index 0000000000..540c0d0a8d
--- /dev/null
+++ b/OvmfPkg/Library/HardwareInfoLib/PeiHardwareInfoLib.inf
@@ -0,0 +1,43 @@
+## @file
+# Hardware information library wrappers over Qemu fw-cfg functionality to parse,
+# in a static manner, non-discoverable hardware information.
+#
+# Copyright 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PeiHardwareInfoLib
+ FILE_GUID = 3D5011B3-9CBB-4C0B-88E8-1D758283C659
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PeiHardwareInfoLib
+
+#
+# The following information is for reference only and not required by the build
+# tools.
+#
+# VALID_ARCHITECTURES = X64
+#
+
+[Sources]
+ HardwareInfoPei.c
+ QemuFwCfgHardwareInfoLib.c
+ HardwareInfoPciHostBridgeLib.c
+
+[Packages]
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ OvmfPkg/OvmfPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ QemuFwCfgLib
diff --git a/OvmfPkg/Library/HardwareInfoLib/QemuFwCfgHardwareInfoLib.c b/OvmfPkg/Library/HardwareInfoLib/QemuFwCfgHardwareInfoLib.c
new file mode 100644
index 0000000000..31ffff290a
--- /dev/null
+++ b/OvmfPkg/Library/HardwareInfoLib/QemuFwCfgHardwareInfoLib.c
@@ -0,0 +1,89 @@
+/*/@file
+ Qemu fw-cfg wrappers for hardware info parsing.
+ Provides an alternative to parse hardware information from a fw-cfg
+ file without relying on dynamic memory allocations.
+
+ Copyright 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#include <Library/DebugLib.h>
+#include <Library/QemuFwCfgLib.h>
+
+#include <Library/HardwareInfoLib.h>
+
+/**
+ Update an optional pointer value if possible
+
+ @param[out] DataSize Pointer to variable to be updated
+ @param[in] Value Value to set the pointed variable to.
+**/
+STATIC
+VOID
+UpdateDataSize (
+ OUT UINTN *DataSize,
+ IN UINTN Value
+ )
+{
+ if (DataSize == NULL) {
+ return;
+ }
+
+ *DataSize = Value;
+}
+
+EFI_STATUS
+QemuFwCfgReadNextHardwareInfoByType (
+ IN HARDWARE_INFO_TYPE Type,
+ IN UINTN TypeSize,
+ IN UINTN TotalFileSize,
+ OUT VOID *Data,
+ OUT UINTN *DataSize OPTIONAL,
+ IN OUT UINTN *ReadIndex
+ )
+{
+ HARDWARE_INFO_HEADER Header;
+
+ if ((Data == NULL) ||
+ (ReadIndex == NULL) ||
+ (TypeSize == 0) ||
+ (Type == HardwareInfoTypeUndefined) ||
+ (TotalFileSize == 0))
+ {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ UpdateDataSize (DataSize, 0);
+
+ while (*ReadIndex < TotalFileSize) {
+ QemuFwCfgReadBytes (sizeof (Header), &Header);
+ *ReadIndex += sizeof (Header);
+
+ if ((Header.Type.Value == Type) && (Header.Size <= TypeSize)) {
+ QemuFwCfgReadBytes (Header.Size, Data);
+
+ *ReadIndex += Header.Size;
+ UpdateDataSize (DataSize, Header.Size);
+
+ return EFI_SUCCESS;
+ }
+
+ //
+ // Skip the bytes corresponding to the next element as it is
+ // not of the expected type and/or size. The TotalFileSize
+ // and individual elements sizes should match so the size
+ // check is skipped.
+ //
+ QemuFwCfgSkipBytes (Header.Size);
+ *ReadIndex += Header.Size;
+ }
+
+ return EFI_END_OF_FILE;
+}
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 4589adff38..7a36f62e9f 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -180,6 +180,7 @@
VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
LoadLinuxLib|OvmfPkg/Library/LoadLinuxLib/LoadLinuxLib.inf
MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf
+ PeiHardwareInfoLib|OvmfPkg/Library/HardwareInfoLib/PeiHardwareInfoLib.inf
!if $(SMM_REQUIRE) == FALSE
LockBoxLib|OvmfPkg/Library/LockBoxLib/LockBoxBaseLib.inf
!endif
--
2.17.1
Amazon Development Center Germany GmbH
Krausenstr. 38
10117 Berlin
Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss
Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
Sitz: Berlin
Ust-ID: DE 289 237 879
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v4 3/8] Ovmf/HardwareInfoLib: Add Dxe lib to dynamically parse heterogenous data
2022-02-03 20:56 [PATCH v4 0/8] Handling of multiple PCI host bridges specified Ojeda Leon, Nicolas
2022-02-03 20:56 ` [PATCH v4 1/8] OvmfPkg/Library: Create base HardwareInfoLib for PCI Host Bridges Ojeda Leon, Nicolas
2022-02-03 20:56 ` [PATCH v4 2/8] Ovmf/HardwareInfoLib: Create Pei lib to parse directly from fw-cfg Ojeda Leon, Nicolas
@ 2022-02-03 20:56 ` Ojeda Leon, Nicolas
2022-02-03 20:56 ` [PATCH v4 4/8] Ovmf/PlatformPei: Use host-provided GPA end if available Ojeda Leon, Nicolas
` (4 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Ojeda Leon, Nicolas @ 2022-02-03 20:56 UTC (permalink / raw)
To: devel; +Cc: atugup, Nicolas Ojeda Leon, Alexander Graf, Gerd Hoffmann
Following the Hardware Info library, create the DxeHardwareInfoLib
which implements the whole API capable of parsing heterogeneous hardware
information. The list-like API grants callers a flexible and common
pattern to retrieve the data. Moreover, the initial source is a BLOB
which generalizes the host-to-guest transmission mechanism.
The Hardware Info library main objective is to provide a way to
describe non-discoverable hardware so that the host can share the
available resources with the guest in Ovmf platforms. This change
features and embraces the main idea behind the library by providing
an API that parses a BLOB into a linked list to retrieve hardware
data from any source. Additionally, list-like APIs are provided so
that the hardware info list can be traversed conveniently.
Similarly, the capability is provided to filter results by specific
hardware types. However, heterogeneous elements can be added to the
list, increasing the flexibility. This way, a single source, for
example a fw-cfg file, can be used to describe several instances of
multiple types of hardware.
This part of the Hardware Info library makes use of dynamic memory
and is intended for stages in which memory services are available.
A motivation example is the PciHostBridgeLib. This library, part
of the PCI driver populates the list of PCI root bridges during DXE
stage for future steps to discover the resources under them. The
hardware info library can be used to obtain the detailed description
of available host bridges, for instance in the form of a fw-cfg file,
and parse that information into a dynmaic list that allows, first to
verify consistency of the data, and second discover the resources
availabe for each root bridge.
Cc: Alexander Graf <graf@amazon.de>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Nicolas Ojeda Leon <ncoleon@amazon.com>
---
.../HardwareInfoLib/DxeHardwareInfoLib.inf | 43 +++
.../Library/HardwareInfoLib/HardwareInfoDxe.c | 255 ++++++++++++++++++
OvmfPkg/OvmfPkgX64.dsc | 1 +
3 files changed, 299 insertions(+)
create mode 100644 OvmfPkg/Library/HardwareInfoLib/DxeHardwareInfoLib.inf
create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoDxe.c
diff --git a/OvmfPkg/Library/HardwareInfoLib/DxeHardwareInfoLib.inf b/OvmfPkg/Library/HardwareInfoLib/DxeHardwareInfoLib.inf
new file mode 100644
index 0000000000..0a93d24b8a
--- /dev/null
+++ b/OvmfPkg/Library/HardwareInfoLib/DxeHardwareInfoLib.inf
@@ -0,0 +1,43 @@
+## @file
+# Hardware information library to describe non-discoverable hardware resources
+#
+# Copyright 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = DxeHardwareInfoLib
+ FILE_GUID = F60B206A-5C56-11EC-AEAC-67CB080BCFF2
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = DxeHardwareInfoLib
+
+#
+# The following information is for reference only and not required by the build
+# tools.
+#
+# VALID_ARCHITECTURES = X64
+#
+
+[Sources]
+ HardwareInfoDxe.c
+ HardwareInfoPciHostBridgeLib.c
+ QemuFwCfgHardwareInfoLib.c
+
+[Packages]
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ OvmfPkg/OvmfPkg.dec
+
+[LibraryClasses]
+ BaseMemoryLib
+ DebugLib
+ MemoryAllocationLib
diff --git a/OvmfPkg/Library/HardwareInfoLib/HardwareInfoDxe.c b/OvmfPkg/Library/HardwareInfoLib/HardwareInfoDxe.c
new file mode 100644
index 0000000000..4f0b51c942
--- /dev/null
+++ b/OvmfPkg/Library/HardwareInfoLib/HardwareInfoDxe.c
@@ -0,0 +1,255 @@
+/*/@file
+ Hardware info parsing functions.
+ Binary data is expected as a consecutive series of header - object pairs.
+ Complete library providing list-like interface to dynamically manipulate
+ hardware info objects and parsing from a generic blob.
+
+ Copyright 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#include <string.h>
+#include <Uefi/UefiBaseType.h>
+#include <Uefi/UefiSpec.h>
+#include <Library/DebugLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/BaseLib.h>
+#include <Library/UefiLib.h>
+
+#include <Library/HardwareInfoLib.h>
+
+EFI_STATUS
+CreateHardwareInfoList (
+ IN UINT8 *Blob,
+ IN UINTN BlobSize,
+ IN HARDWARE_INFO_TYPE TypeFilter,
+ OUT LIST_ENTRY *ListHead
+ )
+{
+ UINT8 *Index;
+ HARDWARE_INFO *HwComponent;
+
+ if ((Blob == NULL) || (BlobSize <= 0) ||
+ (ListHead == NULL))
+ {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ Index = Blob;
+ while (Index < (Blob + BlobSize)) {
+ HwComponent = AllocateZeroPool (sizeof (HARDWARE_INFO));
+
+ if (HwComponent == NULL) {
+ goto FailedAllocate;
+ }
+
+ HwComponent->Header.Type.Uint64 = *((UINT64 *)Index);
+ Index += sizeof (HwComponent->Header.Type);
+ HwComponent->Header.Size = *((UINT64 *)(Index));
+ Index += sizeof (HwComponent->Header.Size);
+
+ //
+ // Check if optional TypeFilter is set, skip if the current
+ // object is of a different type and release the partially
+ // allocated object
+ //
+ if ((TypeFilter != HardwareInfoTypeUndefined) &&
+ (HwComponent->Header.Type.Value != TypeFilter))
+ {
+ FreePool (HwComponent);
+ Index += HwComponent->Header.Size;
+ continue;
+ }
+
+ HwComponent->Data.Raw = AllocateZeroPool (HwComponent->Header.Size);
+ if (HwComponent->Data.Raw == NULL) {
+ goto FreeResources;
+ }
+
+ CopyMem (HwComponent->Data.Raw, Index, HwComponent->Header.Size);
+ Index += HwComponent->Header.Size;
+
+ InsertTailList (ListHead, &HwComponent->Link);
+ }
+
+ return EFI_SUCCESS;
+
+FreeResources:
+ //
+ // Clean the resources allocated in the incomplete cycle
+ //
+ FreePool (HwComponent);
+
+FailedAllocate:
+ DEBUG ((
+ EFI_D_ERROR,
+ "%a: Failed to allocate memory for hardware info\n",
+ __FUNCTION__
+ ));
+
+ return EFI_OUT_OF_RESOURCES;
+}
+
+VOID
+FreeHardwareInfoList (
+ IN OUT LIST_ENTRY *ListHead
+ )
+{
+ LIST_ENTRY *CurrentLink;
+ HARDWARE_INFO *HwComponent;
+
+ if (IsListEmpty (ListHead)) {
+ return;
+ }
+
+ CurrentLink = ListHead->ForwardLink;
+ while (CurrentLink != NULL && CurrentLink != ListHead) {
+ HwComponent = HARDWARE_INFO_FROM_LINK (CurrentLink);
+
+ //
+ // Remove item from list before invalidating the pointers
+ //
+ CurrentLink = RemoveEntryList (CurrentLink);
+
+ FreePool (HwComponent->Data.Raw);
+ FreePool (HwComponent);
+ }
+}
+
+/**
+ Validates if the specified Node has a valid data size and is of
+ specified type.
+ The data size can be less or equal to the provided type size to be
+ regarded as valid and thus accessible with the typed pointer.
+
+ For future compatibility the size is allowed to be smaller so that
+ different versions interpret fields differently and, particularly,
+ have smaller data structures. However, it cannot be larger than the
+ type size to avoid accessing memory out of bounds.
+
+ @param[in] Node Hardware Info node to be validated
+ @param[in] TypeSize Size (in bytes) of the data type intended to be
+ used to dereference the data.
+ @retval TRUE Node is valid and can be accessed
+ @retval FALSE Node is not valid
+/*/
+STATIC
+BOOLEAN
+IsHardwareInfoNodeValidByType (
+ IN LIST_ENTRY *ListHead,
+ IN LIST_ENTRY *Link,
+ IN HARDWARE_INFO_TYPE Type,
+ IN UINTN TypeSize
+ )
+{
+ HARDWARE_INFO *HwComponent;
+
+ if (IsNull (ListHead, Link)) {
+ return FALSE;
+ }
+
+ HwComponent = HARDWARE_INFO_FROM_LINK (Link);
+
+ //
+ // Verify if the node type is the specified one and the size of
+ // the data allocated to the node is greater than the size of
+ // the type intended to dereference it in order to avoid access
+ // to memory out of bondaries.
+ //
+ if ((HwComponent->Header.Type.Value == Type) &&
+ (HwComponent->Header.Size >= TypeSize))
+ {
+ return TRUE;
+ }
+
+ return FALSE;
+}
+
+UINTN
+GetHardwareInfoCountByType (
+ IN LIST_ENTRY *ListHead,
+ IN HARDWARE_INFO_TYPE Type,
+ IN UINTN TypeSize
+ )
+{
+ UINTN Count;
+ LIST_ENTRY *Link;
+
+ Count = 0;
+ for (Link = GetFirstHardwareInfoByType (ListHead, Type, TypeSize);
+ !IsNull (ListHead, Link);
+ Link = GetNextHardwareInfoByType (ListHead, Link, Type, TypeSize))
+ {
+ if (IsHardwareInfoNodeValidByType (ListHead, Link, Type, TypeSize)) {
+ Count++;
+ }
+ }
+
+ return Count;
+}
+
+LIST_ENTRY *
+GetFirstHardwareInfoByType (
+ IN LIST_ENTRY *ListHead,
+ IN HARDWARE_INFO_TYPE Type,
+ IN UINTN TypeSize
+ )
+{
+ LIST_ENTRY *Link;
+
+ if (IsListEmpty (ListHead)) {
+ return ListHead;
+ }
+
+ Link = GetFirstNode (ListHead);
+
+ if (IsHardwareInfoNodeValidByType (ListHead, Link, Type, TypeSize)) {
+ return Link;
+ }
+
+ return GetNextHardwareInfoByType (ListHead, Link, Type, TypeSize);
+}
+
+LIST_ENTRY *
+GetNextHardwareInfoByType (
+ IN LIST_ENTRY *ListHead,
+ IN LIST_ENTRY *Node,
+ IN HARDWARE_INFO_TYPE Type,
+ IN UINTN TypeSize
+ )
+{
+ LIST_ENTRY *Link;
+
+ Link = GetNextNode (ListHead, Node);
+
+ while (!IsNull (ListHead, Link)) {
+ if (IsHardwareInfoNodeValidByType (ListHead, Link, Type, TypeSize)) {
+ //
+ // Found a node of specified type and with valid size. Break and
+ // return the found node.
+ //
+ break;
+ }
+
+ Link = GetNextNode (ListHead, Link);
+ }
+
+ return Link;
+}
+
+BOOLEAN
+EndOfHardwareInfoList (
+ IN LIST_ENTRY *ListHead,
+ IN LIST_ENTRY *Node
+ )
+{
+ return IsNull (ListHead, Node);
+}
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 7a36f62e9f..b376387b7c 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -181,6 +181,7 @@
LoadLinuxLib|OvmfPkg/Library/LoadLinuxLib/LoadLinuxLib.inf
MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf
PeiHardwareInfoLib|OvmfPkg/Library/HardwareInfoLib/PeiHardwareInfoLib.inf
+ DxeHardwareInfoLib|OvmfPkg/Library/HardwareInfoLib/DxeHardwareInfoLib.inf
!if $(SMM_REQUIRE) == FALSE
LockBoxLib|OvmfPkg/Library/LockBoxLib/LockBoxBaseLib.inf
!endif
--
2.17.1
Amazon Development Center Germany GmbH
Krausenstr. 38
10117 Berlin
Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss
Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
Sitz: Berlin
Ust-ID: DE 289 237 879
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v4 4/8] Ovmf/PlatformPei: Use host-provided GPA end if available
2022-02-03 20:56 [PATCH v4 0/8] Handling of multiple PCI host bridges specified Ojeda Leon, Nicolas
` (2 preceding siblings ...)
2022-02-03 20:56 ` [PATCH v4 3/8] Ovmf/HardwareInfoLib: Add Dxe lib to dynamically parse heterogenous data Ojeda Leon, Nicolas
@ 2022-02-03 20:56 ` Ojeda Leon, Nicolas
2022-02-03 20:56 ` [PATCH v4 5/8] OvmfPkg/PciHostBridgeUtilityLib: Initialize RootBridges apertures with spec Ojeda Leon, Nicolas
` (3 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Ojeda Leon, Nicolas @ 2022-02-03 20:56 UTC (permalink / raw)
To: devel; +Cc: atugup, Nicolas Ojeda Leon, Alexander Graf, Gerd Hoffmann
Read the "hardware-info" item from fw-cfg to extract specifications
of PCI host bridges and analyze the 64-bit apertures of them to
find out the highest 64-bit MMIO address required which determines
the address space required by the guest, and, consequently, the
FirstNonAddress used to calculate size of physical addresses.
Using the static PeiHardwareInfoLib, read the fw-cfg file of
hardware information to extract, one by one, all the host
bridges. Find the last 64-bit MMIO address of each host bridge,
using the HardwareInfoPciHostBridgeLib API, and compare it to an
accumulate value to discover the highest address used, which
corresponds to the highest value that must be included in the
guest's physical address space.
Given that platforms with multiple host bridges may provide the PCI
apertures' addresses, the memory detection logic must take into
account that, if the host provided the MMIO windows that can and must
be used, the guest needs to take those values. Therefore, if the
MMIO windows are found in the host-provided fw-cfg file, skip all the
logic calculating the physical address size and just use the value
provided. Since each PCI host bridge corresponds to an element in
the information provided by the host, each of these must be analyzed
looking for the highest address used.
Cc: Alexander Graf <graf@amazon.de>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Nicolas Ojeda Leon <ncoleon@amazon.com>
---
OvmfPkg/PlatformPei/MemDetect.c | 146 ++++++++++++++++++++++++++--
OvmfPkg/PlatformPei/PlatformPei.inf | 1 +
2 files changed, 141 insertions(+), 6 deletions(-)
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index 1bcb5a08bc..26f6df7e7e 100644
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -36,6 +36,7 @@ Module Name:
#include <Library/MtrrLib.h>
#include <Library/QemuFwCfgLib.h>
#include <Library/QemuFwCfgSimpleParserLib.h>
+#include <Library/HardwareInfoLib.h>
#include "Platform.h"
#include "Cmos.h"
@@ -369,6 +370,126 @@ GetSystemMemorySizeAbove4gb (
return LShiftU64 (Size, 16);
}
+/**
+ Iterate over the PCI host bridges resources information optionally provided
+ in fw-cfg and find the highest address contained in the PCI MMIO windows. If
+ the information is found, return the exclusive end; one past the last usable
+ address.
+
+ @param[out] PciMmioAddressEnd Pointer to one-after End Address updated with
+ information extracted from host-provided data
+ or zero if no information available or an
+ error happened
+
+ @retval EFI_SUCCESS PCI information was read and the output
+ parameter updated with the last valid
+ address in the 64-bit MMIO range.
+ @retval EFI_INVALID_PARAMETER Pointer parameter is invalid
+ @retval EFI_INCOMPATIBLE_VERSION Hardware information found in fw-cfg
+ has an incompatible format
+ @retval EFI_UNSUPPORTED Fw-cfg is not supported, thus host
+ provided information, if any, cannot be
+ read
+ @retval EFI_NOT_FOUND No PCI host bridge information provided
+ by the host.
+**/
+STATIC
+EFI_STATUS
+ScanHostProvided64BitPciMmioEnd (
+ OUT UINT64 *PciMmioAddressEnd
+ )
+{
+ EFI_STATUS Status;
+ HOST_BRIDGE_INFO HostBridge;
+ FIRMWARE_CONFIG_ITEM FwCfgItem;
+ UINTN FwCfgSize;
+ UINTN FwCfgReadIndex;
+ UINTN ReadDataSize;
+ UINT64 Above4GMmioEnd;
+
+ if (PciMmioAddressEnd == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ *PciMmioAddressEnd = 0;
+ Above4GMmioEnd = 0;
+
+ Status = QemuFwCfgFindFile ("etc/hardware-info", &FwCfgItem, &FwCfgSize);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ QemuFwCfgSelectItem (FwCfgItem);
+
+ FwCfgReadIndex = 0;
+ while (FwCfgReadIndex < FwCfgSize) {
+ Status = QemuFwCfgReadNextHardwareInfoByType (
+ HardwareInfoTypeHostBridge,
+ sizeof (HostBridge),
+ FwCfgSize,
+ &HostBridge,
+ &ReadDataSize,
+ &FwCfgReadIndex
+ );
+
+ if (Status != EFI_SUCCESS) {
+ //
+ // No more data available to read in the file, break
+ // loop and finish process
+ //
+ break;
+ }
+
+ Status = HardwareInfoPciHostBridgeLastMmioAddress (
+ &HostBridge,
+ ReadDataSize,
+ TRUE,
+ &Above4GMmioEnd
+ );
+
+ if (Status != EFI_SUCCESS) {
+ //
+ // Error parsing MMIO apertures and extracting last MMIO
+ // address, reset PciMmioAddressEnd as if no information was
+ // found, to avoid moving forward with incomplete data, and
+ // bail out
+ //
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: ignoring malformed hardware information from fw_cfg\n",
+ __FUNCTION__
+ ));
+ *PciMmioAddressEnd = 0;
+ return Status;
+ }
+
+ if (Above4GMmioEnd > *PciMmioAddressEnd) {
+ *PciMmioAddressEnd = Above4GMmioEnd;
+ }
+ }
+
+ if (*PciMmioAddressEnd > 0) {
+ //
+ // Host-provided PCI information was found and a MMIO window end
+ // derived from it.
+ // Increase the End address by one to have the output pointing to
+ // one after the address in use (exclusive end).
+ //
+ *PciMmioAddressEnd += 1;
+
+ DEBUG ((
+ DEBUG_INFO,
+ "%a: Pci64End=0x%Lx\n",
+ __FUNCTION__,
+ *PciMmioAddressEnd
+ ));
+
+ return EFI_SUCCESS;
+ }
+
+ return EFI_NOT_FOUND;
+}
+
/**
Return the highest address that DXE could possibly use, plus one.
**/
@@ -550,15 +671,28 @@ AddressWidthInitialization (
VOID
)
{
- UINT64 FirstNonAddress;
+ UINT64 FirstNonAddress;
+ EFI_STATUS Status;
//
- // As guest-physical memory size grows, the permanent PEI RAM requirements
- // are dominated by the identity-mapping page tables built by the DXE IPL.
- // The DXL IPL keys off of the physical address bits advertized in the CPU
- // HOB. To conserve memory, we calculate the minimum address width here.
+ // First scan host-provided hardware information to assess if the address
+ // space is already known. If so, guest must use those values.
//
- FirstNonAddress = GetFirstNonAddress ();
+ Status = ScanHostProvided64BitPciMmioEnd (&FirstNonAddress);
+
+ if (EFI_ERROR (Status)) {
+ //
+ // If the host did not provide valid hardware information leading to a
+ // hard-defined 64-bit MMIO end, fold back to calculating the minimum range
+ // needed.
+ // As guest-physical memory size grows, the permanent PEI RAM requirements
+ // are dominated by the identity-mapping page tables built by the DXE IPL.
+ // The DXL IPL keys off of the physical address bits advertized in the CPU
+ // HOB. To conserve memory, we calculate the minimum address width here.
+ //
+ FirstNonAddress = GetFirstNonAddress ();
+ }
+
mPhysMemAddressWidth = (UINT8)HighBitSet64 (FirstNonAddress);
//
diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/PlatformPei.inf
index 8ef404168c..e840f960d3 100644
--- a/OvmfPkg/PlatformPei/PlatformPei.inf
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -64,6 +64,7 @@
MemEncryptSevLib
PcdLib
VmgExitLib
+ PeiHardwareInfoLib
[Pcd]
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase
--
2.17.1
Amazon Development Center Germany GmbH
Krausenstr. 38
10117 Berlin
Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss
Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
Sitz: Berlin
Ust-ID: DE 289 237 879
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v4 5/8] OvmfPkg/PciHostBridgeUtilityLib: Initialize RootBridges apertures with spec
2022-02-03 20:56 [PATCH v4 0/8] Handling of multiple PCI host bridges specified Ojeda Leon, Nicolas
` (3 preceding siblings ...)
2022-02-03 20:56 ` [PATCH v4 4/8] Ovmf/PlatformPei: Use host-provided GPA end if available Ojeda Leon, Nicolas
@ 2022-02-03 20:56 ` Ojeda Leon, Nicolas
2022-02-04 7:39 ` Gerd Hoffmann
2022-02-03 20:56 ` [PATCH v4 6/8] MdeModulePkg, OvmfPkg: Add Pcd token for PCI pre-populated BARs Ojeda Leon, Nicolas
` (2 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Ojeda Leon, Nicolas @ 2022-02-03 20:56 UTC (permalink / raw)
To: devel; +Cc: atugup, Nicolas Ojeda Leon, Alexander Graf, Gerd Hoffmann
Consume the host-provided specification of PCI host bridges if
available. Using the DxeHardwareInfoLib, populate a list of
hardware descriptors based on the content of the "hardware-info"
fw-cfg file, if provided. In the affirmative case, use the
resources and attributes specified by the hypervisor for each
Host Bridge to create the RootBridge elements.
In Ovmf platforms, the host can provide the specification of
non-discoverable hardware resources like PCI host bridges. If the
proper fw-cfg file is found, parse the contents provided by the
host into a linked list by using the Hardware Info library. Then,
using the list of PCI host bridges' descriptions, populate the
PCI_ROOT_BRIDGES array with the resources and attributes specified
by the host. If the file is not provided or no Host Bridge is found
in it, fold back to the legacy method based on pre-defined
apertures and rules.
In some use cases, the host requires additional control over the
hardware resources' configurations in the guest for performance and
discoverability reasons. For instance, to disclose information about
the PCI hierarchy to the guest so that this can profit from
optimized accesses. In this case, the host can decide to describe
multiple PCI Host Bridges and provide a specific set of resources
(e.g. MMIO apertures) so that the guest uses the values provided.
Using the provided values may entitle the guest to added performance,
for example by using specific MMIO mappings that can enable peer-to-peer
communication across the PCI hierarchy or by allocating memory closer
to a device for faster DMA transactions.
Cc: Alexander Graf <graf@amazon.de>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Nicolas Ojeda Leon <ncoleon@amazon.com>
---
Notes:
v4:
- Splitted PciHostBridgeUtilityGetRootBridges into 2 smaller functions,
one that performs same BusScan population and a new one that uses
HostProvided values to populate Root Bridges.
- PciHostBridgeUtilityGetRootBridges is left as a thin wrapper that calls
the 2 functions depending on availability of host-provided data.
.../PciHostBridgeUtilityLib.c | 316 +++++++++++++++++-
.../PciHostBridgeUtilityLib.inf | 1 +
2 files changed, 312 insertions(+), 5 deletions(-)
diff --git a/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c b/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c
index 92e1ea812f..4bd4671f10 100644
--- a/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c
+++ b/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c
@@ -12,13 +12,16 @@
#include <IndustryStandard/Acpi10.h>
#include <IndustryStandard/Pci.h>
+#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/DevicePathLib.h>
+#include <Library/HardwareInfoLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/PciHostBridgeUtilityLib.h>
#include <Library/PciLib.h>
#include <Library/QemuFwCfgLib.h>
+#include <Protocol/PciHostBridgeResourceAllocation.h>
#pragma pack(1)
typedef struct {
@@ -189,7 +192,9 @@ PciHostBridgeUtilityUninitRootBridge (
}
/**
- Utility function to return all the root bridge instances in an array.
+ Utility function to scan PCI root bridges and create instances for those
+ that are found not empty. Populate their resources from the default
+ provided parameters and return all the root bridge instances in an array.
@param[out] Count The number of root bridge instances.
@@ -217,9 +222,9 @@ PciHostBridgeUtilityUninitRootBridge (
@return All the root bridge instances in an array.
**/
+STATIC
PCI_ROOT_BRIDGE *
-EFIAPI
-PciHostBridgeUtilityGetRootBridges (
+PciHostBridgeUtilityGetRootBridgesBusScan (
OUT UINTN *Count,
IN UINT64 Attributes,
IN UINT64 AllocationAttributes,
@@ -243,8 +248,6 @@ PciHostBridgeUtilityGetRootBridges (
UINTN LastRootBridgeNumber;
UINTN RootBridgeNumber;
- *Count = 0;
-
if ((BusMin > BusMax) || (BusMax > PCI_MAX_BUS)) {
DEBUG ((
DEBUG_ERROR,
@@ -403,6 +406,309 @@ FreeBridges:
return NULL;
}
+/**
+ Utility function to read root bridges information from host-provided fw-cfg
+ file and return them in an array.
+
+ @param[out] Count The number of root bridge instances.
+
+ @return All the root bridge instances in an array parsed from
+ host-provided fw-cfg file (hardware-info).
+**/
+STATIC
+PCI_ROOT_BRIDGE *
+PciHostBridgeUtilityGetRootBridgesHostProvided (
+ OUT UINTN *Count
+ )
+{
+ EFI_STATUS Status;
+ FIRMWARE_CONFIG_ITEM FwCfgItem;
+ UINTN FwCfgSize;
+ PCI_ROOT_BRIDGE *Bridges;
+ UINTN Initialized;
+ UINTN LastRootBridgeNumber;
+ UINTN RootBridgeNumber;
+ UINTN PciHostBridgeCount;
+ UINT8 *HardwareInfoBlob;
+ LIST_ENTRY HwInfoList;
+ LIST_ENTRY *HwLink;
+ HARDWARE_INFO *HwInfo;
+ UINT64 Attributes;
+ UINT64 AllocationAttributes;
+ BOOLEAN DmaAbove4G;
+ BOOLEAN NoExtendedConfigSpace;
+ BOOLEAN CombineMemPMem;
+ PCI_ROOT_BRIDGE_APERTURE Io;
+ PCI_ROOT_BRIDGE_APERTURE Mem;
+ PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
+ PCI_ROOT_BRIDGE_APERTURE PMem;
+ PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;
+
+ //
+ // Initialize the Hardware Info list head to start with an empty but valid
+ // list head.
+ //
+ InitializeListHead (&HwInfoList);
+ HardwareInfoBlob = NULL;
+ Initialized = 0;
+ Bridges = NULL;
+ PciHostBridgeCount = 0;
+
+ //
+ // Hypervisor can provide the specifications (resources) for one or more
+ // PCI host bridges. Such information comes through fw-cfg as part of
+ // the hardware-info file.
+ //
+ Status = QemuFwCfgFindFile ("etc/hardware-info", &FwCfgItem, &FwCfgSize);
+
+ if (EFI_ERROR (Status)) {
+ return NULL;
+ }
+
+ HardwareInfoBlob = AllocatePool (FwCfgSize);
+
+ if (HardwareInfoBlob == NULL) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: Failed to allocate memory for hardware resources info\n",
+ __FUNCTION__
+ ));
+ return NULL;
+ }
+
+ QemuFwCfgSelectItem (FwCfgItem);
+ QemuFwCfgReadBytes (FwCfgSize, HardwareInfoBlob);
+
+ //
+ // Create the list of hardware info devices filtering for PCI host
+ // bridges
+ //
+ Status = CreateHardwareInfoList (
+ HardwareInfoBlob,
+ FwCfgSize,
+ HardwareInfoTypeHostBridge,
+ &HwInfoList
+ );
+
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: Failed to create hardware info list to retrieve host "
+ "bridges information from fw-cfg\n",
+ __FUNCTION__
+ ));
+
+ goto FreeBridges;
+ }
+
+ PciHostBridgeCount = GetHardwareInfoCountByType (
+ &HwInfoList,
+ HardwareInfoTypeHostBridge,
+ sizeof (HOST_BRIDGE_INFO)
+ );
+
+ if (PciHostBridgeCount == 0) {
+ goto FreeBridges;
+ }
+
+ DEBUG ((
+ DEBUG_INFO,
+ "%a: Host provided description for %Lu root bridges\n",
+ __FUNCTION__,
+ PciHostBridgeCount
+ ));
+
+ //
+ // Allocate the root bridges
+ //
+ Bridges = AllocatePool (((UINTN)PciHostBridgeCount) * sizeof *Bridges);
+ if (Bridges == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES));
+ goto FreeBridges;
+ }
+
+ //
+ // If Host Bridges' specification was obtained from fw-cfg, the list
+ // contains information to populate all root bridges in the system
+ // including resources and attributes.
+ //
+ HwLink = GetFirstHardwareInfoByType (
+ &HwInfoList,
+ HardwareInfoTypeHostBridge,
+ sizeof (HOST_BRIDGE_INFO)
+ );
+
+ while (!EndOfHardwareInfoList (&HwInfoList, HwLink)) {
+ HwInfo = HARDWARE_INFO_FROM_LINK (HwLink);
+
+ HardwareInfoPciHostBridgeGet (
+ HwInfo->Data.PciHostBridge,
+ HwInfo->Header.Size,
+ &RootBridgeNumber,
+ &LastRootBridgeNumber,
+ &Attributes,
+ &DmaAbove4G,
+ &NoExtendedConfigSpace,
+ &CombineMemPMem,
+ &Io,
+ &Mem,
+ &MemAbove4G,
+ &PMem,
+ &PMemAbove4G,
+ NULL
+ );
+
+ AllocationAttributes = 0;
+ if (CombineMemPMem) {
+ AllocationAttributes |= EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
+ }
+
+ if ((MemAbove4G.Limit > MemAbove4G.Base) ||
+ (PMemAbove4G.Limit > PMemAbove4G.Base))
+ {
+ AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
+ }
+
+ Status = PciHostBridgeUtilityInitRootBridge (
+ Attributes,
+ Attributes,
+ AllocationAttributes,
+ DmaAbove4G,
+ NoExtendedConfigSpace,
+ RootBridgeNumber,
+ LastRootBridgeNumber,
+ &Io,
+ &Mem,
+ &MemAbove4G,
+ &PMem,
+ &PMemAbove4G,
+ &Bridges[Initialized]
+ );
+
+ if (EFI_ERROR (Status)) {
+ goto FreeBridges;
+ }
+
+ ++Initialized;
+
+ HwLink = GetNextHardwareInfoByType (
+ &HwInfoList,
+ HwLink,
+ HardwareInfoTypeHostBridge,
+ sizeof (HOST_BRIDGE_INFO)
+ );
+ }
+
+ *Count = Initialized;
+
+ //
+ // If resources were allocated for host bridges info, release them
+ //
+ if (HardwareInfoBlob) {
+ FreePool (HardwareInfoBlob);
+ }
+
+ FreeHardwareInfoList (&HwInfoList);
+ return Bridges;
+
+FreeBridges:
+ while (Initialized > 0) {
+ --Initialized;
+ PciHostBridgeUtilityUninitRootBridge (&Bridges[Initialized]);
+ }
+
+ if (Bridges) {
+ FreePool (Bridges);
+ }
+
+ if (HardwareInfoBlob) {
+ FreePool (HardwareInfoBlob);
+ }
+
+ FreeHardwareInfoList (&HwInfoList);
+ return NULL;
+}
+
+/**
+ Utility function to return all the root bridge instances in an array.
+
+ @param[out] Count The number of root bridge instances.
+
+ @param[in] Attributes Initial attributes.
+
+ @param[in] AllocAttributes Allocation attributes.
+
+ @param[in] DmaAbove4G DMA above 4GB memory.
+
+ @param[in] NoExtendedConfigSpace No Extended Config Space.
+
+ @param[in] BusMin Minimum Bus number, inclusive.
+
+ @param[in] BusMax Maximum Bus number, inclusive.
+
+ @param[in] Io IO aperture.
+
+ @param[in] Mem MMIO aperture.
+
+ @param[in] MemAbove4G MMIO aperture above 4G.
+
+ @param[in] PMem Prefetchable MMIO aperture.
+
+ @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G.
+
+ @return All the root bridge instances in an array.
+**/
+PCI_ROOT_BRIDGE *
+EFIAPI
+PciHostBridgeUtilityGetRootBridges (
+ OUT UINTN *Count,
+ IN UINT64 Attributes,
+ IN UINT64 AllocationAttributes,
+ IN BOOLEAN DmaAbove4G,
+ IN BOOLEAN NoExtendedConfigSpace,
+ IN UINTN BusMin,
+ IN UINTN BusMax,
+ IN PCI_ROOT_BRIDGE_APERTURE *Io,
+ IN PCI_ROOT_BRIDGE_APERTURE *Mem,
+ IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
+ IN PCI_ROOT_BRIDGE_APERTURE *PMem,
+ IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G
+ )
+{
+ PCI_ROOT_BRIDGE *Bridges;
+
+ *Count = 0;
+
+ //
+ // First attempt to get the host provided descriptions of the Root Bridges
+ // if available.
+ //
+ Bridges = PciHostBridgeUtilityGetRootBridgesHostProvided (Count);
+
+ //
+ // If host did not provide Root Bridge information, scan the buses and
+ // auto populate them with default resources.
+ //
+ if (Bridges == NULL) {
+ Bridges = PciHostBridgeUtilityGetRootBridgesBusScan (
+ Count,
+ Attributes,
+ AllocationAttributes,
+ DmaAbove4G,
+ NoExtendedConfigSpace,
+ BusMin,
+ BusMax,
+ Io,
+ Mem,
+ MemAbove4G,
+ PMem,
+ PMemAbove4G
+ );
+ }
+
+ return Bridges;
+}
+
/**
Utility function to free root bridge instances array from
PciHostBridgeUtilityGetRootBridges().
diff --git a/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf b/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf
index 83a734c172..e4fc903121 100644
--- a/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf
+++ b/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf
@@ -38,6 +38,7 @@
BaseMemoryLib
DebugLib
DevicePathLib
+ DxeHardwareInfoLib
MemoryAllocationLib
PciLib
QemuFwCfgLib
--
2.17.1
Amazon Development Center Germany GmbH
Krausenstr. 38
10117 Berlin
Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss
Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
Sitz: Berlin
Ust-ID: DE 289 237 879
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v4 6/8] MdeModulePkg, OvmfPkg: Add Pcd token for PCI pre-populated BARs
2022-02-03 20:56 [PATCH v4 0/8] Handling of multiple PCI host bridges specified Ojeda Leon, Nicolas
` (4 preceding siblings ...)
2022-02-03 20:56 ` [PATCH v4 5/8] OvmfPkg/PciHostBridgeUtilityLib: Initialize RootBridges apertures with spec Ojeda Leon, Nicolas
@ 2022-02-03 20:56 ` Ojeda Leon, Nicolas
2022-02-03 20:56 ` [PATCH v4 7/8] PciHostBridgeDxe: Extend service to get base addresses before allocation Ojeda Leon, Nicolas
2022-02-03 20:56 ` [PATCH v4 8/8] MdeModulePkg/PciBusDxe: Handling of pre-populated PCI BARs Ojeda Leon, Nicolas
7 siblings, 0 replies; 15+ messages in thread
From: Ojeda Leon, Nicolas @ 2022-02-03 20:56 UTC (permalink / raw)
To: devel; +Cc: atugup, Nicolas Ojeda Leon, Alexander Graf, Gerd Hoffmann
Create a new PCD boolean token in MdeModulePkg for global use.
We use this token to indicate if the configuration, parsed from
fw-cfg, requires pre-populated BARs to be preserved.
During creation of root bridges configurations, the flag is set
according to the "pre-populated-bars" item in fw-cfg. The Pcd token
is created as a dynamic item so it can be modified at runtime and
it is consumed in both Pei and Dxe PCI modules.
In virtualized environments, the hypervisor provides a layer of
isolation between the VMs and the hardware. This isolation may
include address translations and shadowing of configurations that
prevent guests directly modifying hardware registers. The hypervisor
then takes care of emulating the hardware accesses requested by
the guest. In some cases, the host may want the guest to use a
specific value for some or all PCI BARs so that transactions in
GPA level (particularly DMA) can make use of the controlled set
of addresses. The host then indicates the guest to preserve
those BARs that are pre-populated, that is, BARs that already
report a value even before guest's firmware BAR placement.
The token provides a globally accessible configuration flag to
determine, during PCI BAR allocation, if pre-populated BARs must
be respected. The pre-allocated PCI BARs are used in platforms in
which MMIO resources are configured with the same host physical
addresses in the guest so that DMA transactions can happen between
PCI devices without packets going through the IOMMU. Performance is
improved due to PCI packets travelling shorter distances and
avoiding links reaching the Root Complex, which can get busy during
I/O intensive periods.
Cc: Alexander Graf <graf@amazon.de>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Nicolas Ojeda Leon <ncoleon@amazon.com>
---
Notes:
v4:
- Move the code reading the pre-populated-bars fw-cfg file and setting
the PcdPciPreservePopulatedMappings token to the new function that
gets root bridge information from host-provided data. It only makes
sense to have fixed BARs if the root bridge resources are also
controlled and thus, both things match.
MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf | 1 +
MdeModulePkg/MdeModulePkg.dec | 6 ++++++
.../PciHostBridgeUtilityLib.c | 17 +++++++++++++++++
.../PciHostBridgeUtilityLib.inf | 4 ++++
OvmfPkg/OvmfPkgX64.dsc | 1 +
OvmfPkg/PlatformPei/PlatformPei.inf | 1 +
6 files changed, 30 insertions(+)
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
index e317169d9c..046876bb3b 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
@@ -107,6 +107,7 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdMrIovSupport ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration ## SOMETIMES_CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdPcieResizableBarSupport ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciPreservePopulatedMappings## CONSUMES
[UserExtensions.TianoCore."ExtraFiles"]
PciBusDxeExtra.uni
diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 463e889e9a..078877ba7f 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -1902,6 +1902,12 @@
# @Prompt Disable full PCI enumeration.
gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|FALSE|BOOLEAN|0x10000048
+ ## The flag to control preservation of pre-populated PCI BARs
+ # TRUE - Respect pre-populated PCI BARs
+ # FALSE - No pre-populated BARs, place all BARs
+ # @Prompt Enable preservsation of pre-populated PCI BARs
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciPreservePopulatedMappings|FALSE|BOOLEAN|0x10000050
+
## Disk I/O - Number of Data Buffer block.
# Define the size in block of the pre-allocated buffer. It provide better
# performance for large Disk I/O requests.
diff --git a/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c b/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c
index 4bd4671f10..bb666aef62 100644
--- a/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c
+++ b/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c
@@ -18,6 +18,7 @@
#include <Library/DevicePathLib.h>
#include <Library/HardwareInfoLib.h>
#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
#include <Library/PciHostBridgeUtilityLib.h>
#include <Library/PciLib.h>
#include <Library/QemuFwCfgLib.h>
@@ -443,6 +444,22 @@ PciHostBridgeUtilityGetRootBridgesHostProvided (
PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
PCI_ROOT_BRIDGE_APERTURE PMem;
PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;
+ UINT64 PrePopulatedBars;
+
+ //
+ // Find file for pre-populated bars and set Pcd token if enabled
+ //
+ Status = QemuFwCfgFindFile ("etc/pre-populated-bars", &FwCfgItem, &FwCfgSize);
+ PrePopulatedBars = 0;
+ if (!EFI_ERROR (Status) && (FwCfgSize == sizeof (PrePopulatedBars))) {
+ QemuFwCfgSelectItem (FwCfgItem);
+ QemuFwCfgReadBytes (FwCfgSize, &PrePopulatedBars);
+
+ if (PrePopulatedBars) {
+ PcdSetBoolS (PcdPciPreservePopulatedMappings, TRUE);
+ DEBUG ((DEBUG_INFO, "%a: Pre-populated BARs present\n", __FUNCTION__));
+ }
+ }
//
// Initialize the Hardware Info list head to start with an empty but valid
diff --git a/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf b/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf
index e4fc903121..570bf7e97c 100644
--- a/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf
+++ b/OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf
@@ -40,5 +40,9 @@
DevicePathLib
DxeHardwareInfoLib
MemoryAllocationLib
+ PcdLib
PciLib
QemuFwCfgLib
+
+[Pcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciPreservePopulatedMappings
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index b376387b7c..1656509f03 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -594,6 +594,7 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0
!endif
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciPreservePopulatedMappings|FALSE
gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|800
gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|600
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable|FALSE
diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/PlatformPei.inf
index e840f960d3..b58f79c6e3 100644
--- a/OvmfPkg/PlatformPei/PlatformPei.inf
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -96,6 +96,7 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciPreservePopulatedMappings
gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode
gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable
gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack
--
2.17.1
Amazon Development Center Germany GmbH
Krausenstr. 38
10117 Berlin
Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss
Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
Sitz: Berlin
Ust-ID: DE 289 237 879
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v4 7/8] PciHostBridgeDxe: Extend service to get base addresses before allocation
2022-02-03 20:56 [PATCH v4 0/8] Handling of multiple PCI host bridges specified Ojeda Leon, Nicolas
` (5 preceding siblings ...)
2022-02-03 20:56 ` [PATCH v4 6/8] MdeModulePkg, OvmfPkg: Add Pcd token for PCI pre-populated BARs Ojeda Leon, Nicolas
@ 2022-02-03 20:56 ` Ojeda Leon, Nicolas
2022-02-04 8:36 ` Gerd Hoffmann
2022-02-03 20:56 ` [PATCH v4 8/8] MdeModulePkg/PciBusDxe: Handling of pre-populated PCI BARs Ojeda Leon, Nicolas
7 siblings, 1 reply; 15+ messages in thread
From: Ojeda Leon, Nicolas @ 2022-02-03 20:56 UTC (permalink / raw)
To: devel; +Cc: atugup, Nicolas Ojeda Leon, Alexander Graf, Gerd Hoffmann
Enhance the PCI Resource Allocation services to include a new state in
which only the base address of each root bridge is set. This new, partial
state is used in conjunction with GetProposedResources to retrieve the
Base Addresses of the resources before the allocation takes place, and
is reached only if pre-populated mappings are enabled.
The need for this information before allocation emerges from the handling
of pre-populated resources, that is, PCI BARs that have a fixed value
and should not be placed at a different address. For such a case, the
firmware already receives a fixed resource description of the root bridges
that agrees with those pre-populated resources.
For example, in Ovmf platform, the host can provide the specific resources
to be used for each root bridge in the guest and also indicate that there
are pre-populated resources that must be respected. In this case, those
resources need to be placed (offset-wise) before the rest of the resources.
The placement logic assigns a root bridge relative offset to each BAR,
therefore, the offsets of the pre-populated BARs need to be calculated
first and, for that, the root bridge' base address must be known
beforehand so that absolute addresses read from the devices can be
translated into a root bridge relative offset.
Cc: Alexander Graf <graf@amazon.de>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Nicolas Ojeda Leon <ncoleon@amazon.com>
---
Notes:
v4:
- Major restructuring of the concept to avoid modifications to the PCI
Resource Allocation protocol which comes from UEFI spec. Previous
rev3 patch was completely removed.
- Extended existing services of the protocol to integrate a new state
that allows the traditional GetProposedResources to retrieve, before
allocation phase, the base address of root bridges.
- Changes are guarded with PcdPciPreservePopulatedMappings token so that
existent platforms experience no change at all.
MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 1 +
.../Bus/Pci/PciBusDxe/PciEnumerator.c | 4 +-
.../Bus/Pci/PciHostBridgeDxe/PciHostBridge.c | 93 ++++++++++++++++++-
.../Bus/Pci/PciHostBridgeDxe/PciHostBridge.h | 2 +
.../Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf | 4 +
.../Pci/PciHostBridgeDxe/PciHostResource.h | 1 +
MdeModulePkg/Include/Library/PciResourceLib.h | 20 ++++
7 files changed, 122 insertions(+), 3 deletions(-)
create mode 100644 MdeModulePkg/Include/Library/PciResourceLib.h
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
index 4b58c3ea9b..ecb3d3cb5d 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
@@ -38,6 +38,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/UefiBootServicesTableLib.h>
#include <Library/DevicePathLib.h>
#include <Library/PcdLib.h>
+#include <Library/PciResourceLib.h>
#include <IndustryStandard/Pci.h>
#include <IndustryStandard/PeImage.h>
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
index 3f8c6e6da7..fdf8984661 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
@@ -1307,7 +1307,9 @@ GetResourceBase (
Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp;
ResStatus = Ptr->AddrTranslationOffset;
- if (ResStatus == EFI_RESOURCE_SATISFIED) {
+ if ((ResStatus == EFI_RESOURCE_SATISFIED) ||
+ (ResStatus == PCI_RESOURCE_PARTIAL))
+ {
switch (Ptr->ResType) {
//
// Memory type aperture
diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
index b20bcd310a..cfe45a6e3f 100644
--- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
+++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
@@ -884,8 +884,75 @@ NotifyPhase (
case EfiPciHostBridgeBeginResourceAllocation:
//
- // No specific action is required here, can perform any chipset specific programing
+ // In general, no specific action is required here, can perform any chipset specific programing
//
+ if (PcdGetBool (PcdPciPreservePopulatedMappings)) {
+ //
+ // If pre populated resources are present, resources are moved into
+ // ResBaseDiscovered state to enable the retrival of BaseAddresses.
+ // Set the base address of each resource with value in root bridges
+ // using same alignments but no allocation. This partial information is
+ // intended to be used by a preliminary call to GetProposedResoruces
+ // that retrieves only base addressed for resource placement purposes
+ //
+ for (Link = GetFirstNode (&HostBridge->RootBridges)
+ ; !IsNull (&HostBridge->RootBridges, Link)
+ ; Link = GetNextNode (&HostBridge->RootBridges, Link)
+ )
+ {
+ RootBridge = ROOT_BRIDGE_FROM_LINK (Link);
+
+ for (Index = TypeIo; Index < TypeBus; Index++) {
+ if (RootBridge->ResAllocNode[Index].Status == ResNone) {
+ Alignment = RootBridge->ResAllocNode[Index].Alignment;
+ BitsOfAlignment = LowBitSet64 (Alignment + 1);
+ BaseAddress = MAX_UINT64;
+
+ switch (Index) {
+ case TypeIo:
+ BitsOfAlignment = MIN (15, BitsOfAlignment);
+ BaseAddress = ALIGN_VALUE (RootBridge->Io.Base, Alignment + 1);
+ BaseAddress = ALIGN_VALUE (BaseAddress, LShiftU64 (1, BitsOfAlignment));
+ break;
+
+ case TypeMem32:
+ BitsOfAlignment = MIN (31, BitsOfAlignment);
+ BaseAddress = ALIGN_VALUE (RootBridge->Mem.Base, Alignment + 1);
+ BaseAddress = ALIGN_VALUE (BaseAddress, LShiftU64 (1, BitsOfAlignment));
+ break;
+
+ case TypePMem32:
+ BitsOfAlignment = MIN (31, BitsOfAlignment);
+ BaseAddress = ALIGN_VALUE (RootBridge->PMem.Base, Alignment + 1);
+ BaseAddress = ALIGN_VALUE (BaseAddress, LShiftU64 (1, BitsOfAlignment));
+ break;
+
+ case TypeMem64:
+ BitsOfAlignment = MIN (63, LowBitSet64 (Alignment + 1));
+ BaseAddress = ALIGN_VALUE (RootBridge->MemAbove4G.Base, Alignment + 1);
+ BaseAddress = ALIGN_VALUE (BaseAddress, LShiftU64 (1, BitsOfAlignment));
+ break;
+
+ case TypePMem64:
+ BitsOfAlignment = MIN (63, LowBitSet64 (Alignment + 1));
+ BaseAddress = ALIGN_VALUE (RootBridge->PMemAbove4G.Base, Alignment + 1);
+ BaseAddress = ALIGN_VALUE (BaseAddress, LShiftU64 (1, BitsOfAlignment));
+ break;
+
+ default:
+ ASSERT (FALSE);
+ break;
+ }
+
+ if (BaseAddress != MAX_UINT64) {
+ RootBridge->ResAllocNode[Index].Base = BaseAddress;
+ RootBridge->ResAllocNode[Index].Status = ResBaseDiscovered;
+ }
+ }
+ }
+ }
+ }
+
break;
case EfiPciHostBridgeAllocateResources:
@@ -919,7 +986,9 @@ NotifyPhase (
DEBUG ((DEBUG_INFO, " RootBridge: %s\n", RootBridge->DevicePathStr));
for (Index1 = TypeIo; Index1 < TypeBus; Index1++) {
- if (RootBridge->ResAllocNode[Index1].Status == ResNone) {
+ if ((RootBridge->ResAllocNode[Index1].Status == ResNone) ||
+ (RootBridge->ResAllocNode[Index1].Status == ResBaseDiscovered))
+ {
ResNodeHandled[Index1] = TRUE;
} else {
//
@@ -1571,6 +1640,22 @@ SubmitResources (
RootBridge->ResAllocNode[Type].Status = ResSubmitted;
}
+ if (PcdGetBool (PcdPciPreservePopulatedMappings)) {
+ //
+ // If pre-populated resources are present, causing the resources
+ // to go into ResBaseDiscovered before EfiPciHostBridgeAllocateResources
+ // clear nodes that are still in that state, which have a Base Address
+ // but no resources underneath them. Mark them as empty nodes since no
+ // resources were submitted for them, length required is zero.
+ //
+ for (Type = TypeIo; Type < TypeBus; Type++) {
+ if (RootBridge->ResAllocNode[Type].Status == ResBaseDiscovered) {
+ RootBridge->ResAllocNode[Type].Status = ResNone;
+ RootBridge->ResAllocNode[Type].Base = 0;
+ }
+ }
+ }
+
RootBridge->ResourceSubmitted = TRUE;
return EFI_SUCCESS;
}
@@ -1652,6 +1737,10 @@ GetProposedResources (
Descriptor->AddrTranslationOffset = (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : PCI_RESOURCE_LESS;
Descriptor->AddrLen = RootBridge->ResAllocNode[Index].Length;
+ if (ResStatus == ResBaseDiscovered) {
+ Descriptor->AddrTranslationOffset = PCI_RESOURCE_PARTIAL;
+ }
+
switch (Index) {
case TypeIo:
Descriptor->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;
diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h
index e7a30fd909..940adc5965 100644
--- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h
+++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h
@@ -15,6 +15,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/UefiDriverEntryPoint.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/PciHostBridgeLib.h>
+#include <Library/PcdLib.h>
+#include <Library/PciResourceLib.h>
#include <Protocol/PciHostBridgeResourceAllocation.h>
#include <Protocol/IoMmu.h>
diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
index 9c24cacc30..42d1cc6289 100644
--- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
+++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
@@ -39,6 +39,7 @@
UefiLib
PciHostBridgeLib
TimerLib
+ PcdLib
[Protocols]
gEfiCpuIo2ProtocolGuid ## CONSUMES
@@ -50,3 +51,6 @@
[Depex]
gEfiCpuIo2ProtocolGuid AND
gEfiCpuArchProtocolGuid
+
+[Pcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciPreservePopulatedMappings## CONSUMES
diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostResource.h b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostResource.h
index 772f4b513f..12725d3797 100644
--- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostResource.h
+++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostResource.h
@@ -28,6 +28,7 @@ typedef enum {
ResNone,
ResSubmitted,
ResAllocated,
+ ResBaseDiscovered,
ResStatusMax
} RES_STATUS;
diff --git a/MdeModulePkg/Include/Library/PciResourceLib.h b/MdeModulePkg/Include/Library/PciResourceLib.h
new file mode 100644
index 0000000000..e16394c352
--- /dev/null
+++ b/MdeModulePkg/Include/Library/PciResourceLib.h
@@ -0,0 +1,20 @@
+/** @file
+ Pci resource library consumed by PciBusDxe and PciHostBridgeDxe drivers to
+ share non-UEFI spec artefacts used in both drivers
+
+ Copyright 2022 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ **/
+#ifndef __PCI_RESOURCE_LIB_H__
+#define __PCI_RESOURCE_LIB_H__
+
+#define PCI_RESOURCE_PARTIAL 0xFFFFFFFFFFFFFFFDULL
+
+#endif
--
2.17.1
Amazon Development Center Germany GmbH
Krausenstr. 38
10117 Berlin
Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss
Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
Sitz: Berlin
Ust-ID: DE 289 237 879
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v4 8/8] MdeModulePkg/PciBusDxe: Handling of pre-populated PCI BARs
2022-02-03 20:56 [PATCH v4 0/8] Handling of multiple PCI host bridges specified Ojeda Leon, Nicolas
` (6 preceding siblings ...)
2022-02-03 20:56 ` [PATCH v4 7/8] PciHostBridgeDxe: Extend service to get base addresses before allocation Ojeda Leon, Nicolas
@ 2022-02-03 20:56 ` Ojeda Leon, Nicolas
7 siblings, 0 replies; 15+ messages in thread
From: Ojeda Leon, Nicolas @ 2022-02-03 20:56 UTC (permalink / raw)
To: devel; +Cc: atugup, Nicolas Ojeda Leon, Alexander Graf, Gerd Hoffmann
Extend the PCI BAR placement logic in order to consider pre-populated
resources first, if indicated by the Pcd token for such purpose.
The PCI_BAR type is augmented by one field for mapping the absolute
address of prepopulated BARs into a root bridge relative offset.
As part of the CreateResourceMap stage of the PCI resource allocation
process, all the resources belonging to a root bridge are analyzed and
if a BaseAddress (absolute address read from the PCI device during
enumeration) is present, it is translated into a root-bridge relative
offset and the space occupied by it is marked as used in the root
bridge's aperture. This process is performed before the regular
placement logic is executed.
The remaining unassigned BARs are then placed according to default
logic starting after the last pre-populated resource.
The motivation behind respecting pre-populated BARs is that the
hypervisor can decide on placement of some resources and the guest must
use the same values to benefit from performance optimizations or
specific requirements.
Cc: Alexander Graf <graf@amazon.de>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Nicolas Ojeda Leon <ncoleon@amazon.com>
---
Notes:
v4:
- Guarded the root bridge address retreiving and the handling of
pre-populated resources in PciLib with
PcdPciPreservePopulatedMappings token
- Use the new way to fetch Root Bridge base addresses by calling
GetProposedResources before allocation to then populate the
resource apertures to take care of pre-populated BARs.
MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 1 +
.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 5 +-
MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 49 ++++
.../Bus/Pci/PciBusDxe/PciResourceSupport.c | 277 +++++++++++++++++-
.../Bus/Pci/PciBusDxe/PciResourceSupport.h | 20 ++
5 files changed, 348 insertions(+), 4 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
index ecb3d3cb5d..1200924e95 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
@@ -95,6 +95,7 @@ typedef enum {
//
struct _PCI_BAR {
UINT64 BaseAddress;
+ UINT64 BaseAddressOffset;
UINT64 Length;
UINT64 Alignment;
PCI_BAR_TYPE BarType;
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
index 9251388bc2..91caf162e0 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
@@ -1776,8 +1776,9 @@ PciParseBar (
return Offset + 4;
}
- PciIoDevice->PciBar[BarIndex].BarTypeFixed = FALSE;
- PciIoDevice->PciBar[BarIndex].Offset = (UINT8)Offset;
+ PciIoDevice->PciBar[BarIndex].BarTypeFixed = FALSE;
+ PciIoDevice->PciBar[BarIndex].Offset = (UINT8)Offset;
+ PciIoDevice->PciBar[BarIndex].BaseAddressOffset = 0;
if ((Value & 0x01) != 0) {
//
// Device I/Os
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
index 63d149b3b8..be6bbd01c7 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
@@ -595,6 +595,55 @@ PciHostBridgeResourceAllocator (
GetResourceFromDevice (RootBridgeDev, IoBridge, Mem32Bridge, PMem32Bridge, Mem64Bridge, PMem64Bridge);
}
+ if (PcdGetBool (PcdPciPreservePopulatedMappings)) {
+ //
+ // If there are pre-populated resources (e.g. in virtualized platforms)
+ // the base addresses need to be retrieved to place them before the
+ // other resources. This also implies the firmware received the PCI
+ // apertures fixed and that these are consistent with the pre-populated
+ // values. At this point, the resources have status ResBaseDiscoverd and
+ // have only the Base address set (partially filled and not allocated)
+ //
+ AcpiConfig = NULL;
+ Status = PciResAlloc->GetProposedResources (
+ PciResAlloc,
+ RootBridgeDev->Handle,
+ &AcpiConfig
+ );
+
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ //
+ // Get the resource base by interpreting acpi resource node
+ //
+ //
+ GetResourceBase (
+ AcpiConfig,
+ &IoBase,
+ &Mem32Base,
+ &PMem32Base,
+ &Mem64Base,
+ &PMem64Base
+ );
+
+ if (AcpiConfig != NULL) {
+ FreePool (AcpiConfig);
+ }
+
+ //
+ // Handle pre-populated resources
+ //
+ PopulateResourceAperture (
+ Mem32Base,
+ PMem32Base,
+ Mem64Base,
+ PMem64Base,
+ RootBridgeDev
+ );
+ }
+
//
// Create resourcemap by going through all the devices subject to this root bridge
//
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
index 8ffd05f327..e2a550bf8e 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
@@ -324,6 +324,266 @@ CalculateApertureIo16 (
Bridge->Length = MAX (Bridge->Length, PaddingAperture);
}
+/**
+ Analyze a single BAR and if it is pre-populated (its baseAddress is already
+ set), calculate the offset inside the root bridge.
+
+ @param Bar PCI BAR to be placed if pre-populated
+ @param Base Base address of the root bridge
+
+**/
+STATIC
+VOID
+PrePopulateBAR (
+ IN OUT PCI_BAR *Bar,
+ IN UINT64 Base
+ )
+{
+ if (Base == gAllOne) {
+ return;
+ }
+
+ //
+ // Pre-populated IO space BARs are not supported
+ //
+ if ((Bar->BarType == PciBarTypeIo16) || (Bar->BarType == PciBarTypeIo32)) {
+ return;
+ }
+
+ if (Bar->BaseAddress < Base) {
+ return;
+ }
+
+ if (Bar->BaseAddress != 0) {
+ Bar->BaseAddressOffset = Bar->BaseAddress - Base;
+ }
+}
+
+/**
+ Calculate and set the address offset inside the root bridge of device
+ BARs that are pre-populated.
+
+ @param Dev PCI device whose BARs are to be analyzed
+ @param Base Base address of the root bridge under which the device
+ is located.
+
+ */
+STATIC
+VOID
+PopulateDeviceBars (
+ IN UINT64 Mem32Base,
+ IN UINT64 PMem32Base,
+ IN UINT64 Mem64Base,
+ IN UINT64 PMem64Base,
+ IN PCI_IO_DEVICE *Dev
+ )
+{
+ UINTN Index;
+
+ for (Index = 0; Index < PCI_MAX_BAR; Index++) {
+ switch (Dev->PciBar[Index].BarType) {
+ case PciBarTypeMem32:
+ PrePopulateBAR (&Dev->PciBar[Index], Mem32Base);
+ break;
+
+ case PciBarTypePMem32:
+ PrePopulateBAR (&Dev->PciBar[Index], PMem32Base);
+ break;
+
+ case PciBarTypeMem64:
+ PrePopulateBAR (&Dev->PciBar[Index], Mem64Base);
+ break;
+
+ case PciBarTypePMem64:
+ PrePopulateBAR (&Dev->PciBar[Index], PMem64Base);
+ break;
+
+ default:
+ break;
+ }
+ }
+}
+
+/**
+ Considering the Bridge attributes specifying the supported resources,
+ merge the base addresses to fake the non-suported types belonging to
+ the alternative type.
+
+ @param Mem32Base 32-bit base address
+ @param PMem32Base 32-bit prefetchable base address
+ @param Mem64Base 64-bit base address
+ @param PMem64Base 64-bit prefetchable base address
+ @param Bridge PCI resource node for given bridge device.
+
+ */
+STATIC
+VOID
+MergeBridgeResourceBases (
+ IN OUT UINT64 *Mem32Base,
+ IN OUT UINT64 *PMem32Base,
+ IN OUT UINT64 *Mem64Base,
+ IN OUT UINT64 *PMem64Base,
+ IN PCI_IO_DEVICE *Bridge
+ )
+{
+ //
+ // if root bridge supports combined Pmem Mem decoding
+ // merge these two type of resource
+ //
+ if (BridgeSupportResourceDecode (Bridge, EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED)) {
+ *PMem32Base = *Mem32Base;
+ *PMem64Base = *Mem64Base;
+ }
+
+ //
+ // If bridge doesn't support Pmem32
+ // degrade it to mem32
+ //
+ if (!BridgeSupportResourceDecode (Bridge, EFI_BRIDGE_PMEM32_DECODE_SUPPORTED)) {
+ *PMem32Base = *Mem32Base;
+ }
+
+ //
+ // If firmware is in 32-bit mode,
+ // then degrade PMEM64/MEM64 requests
+ //
+ if (sizeof (UINTN) <= 4) {
+ *Mem64Base = *Mem32Base;
+ *PMem64Base = *PMem32Base;
+ } else {
+ //
+ // if the bridge does not support MEM64, degrade MEM64 to MEM32
+ //
+ if (!BridgeSupportResourceDecode (Bridge, EFI_BRIDGE_MEM64_DECODE_SUPPORTED)) {
+ *Mem64Base = *Mem32Base;
+ }
+
+ //
+ // if the bridge does not support PMEM64, degrade PMEM64 to PMEM32
+ //
+ if (!BridgeSupportResourceDecode (Bridge, EFI_BRIDGE_PMEM64_DECODE_SUPPORTED)) {
+ *PMem64Base = *PMem32Base;
+ }
+ }
+}
+
+/**
+ Populate a root bridge's resource aperture according to
+ initial conditions ruled by individual pre-populated
+ resources
+
+ @param Bridge PCI resource node for given bridge device.
+ @param Base Resource aperture base address
+
+**/
+VOID
+PopulateResourceAperture (
+ IN UINT64 Mem32Base,
+ IN UINT64 PMem32Base,
+ IN UINT64 Mem64Base,
+ IN UINT64 PMem64Base,
+ IN OUT PCI_IO_DEVICE *Bridge
+ )
+{
+ PCI_IO_DEVICE *Temp;
+ LIST_ENTRY *CurrentLink;
+
+ //
+ // Verify if pre-populated BARs need to be respected, otherwise
+ // there is no need to pre-populate any resource
+ //
+ if (!PcdGetBool (PcdPciPreservePopulatedMappings)) {
+ return;
+ }
+
+ CurrentLink = Bridge->ChildList.ForwardLink;
+
+ //
+ // Merge base addresses of the different types depending on resource
+ // decoding supported by the bridge
+ //
+ MergeBridgeResourceBases (
+ &Mem32Base,
+ &PMem32Base,
+ &Mem64Base,
+ &PMem64Base,
+ Bridge
+ );
+
+ while (CurrentLink != NULL && CurrentLink != &Bridge->ChildList) {
+ Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
+
+ PopulateDeviceBars (
+ Mem32Base,
+ PMem32Base,
+ Mem64Base,
+ PMem64Base,
+ Temp
+ );
+
+ //
+ // Recursive call to analyze the hierarchical tree under a bridge
+ //
+ if (IS_PCI_BRIDGE (&Temp->Pci)) {
+ PopulateResourceAperture (
+ Mem32Base,
+ PMem32Base,
+ Mem64Base,
+ PMem64Base,
+ Temp
+ );
+ }
+
+ CurrentLink = CurrentLink->ForwardLink;
+ }
+}
+
+/**
+ Calculate the current used resource of the bridge provided that some
+ of the resources under it might been pre-populated.
+
+ @param Bridge PCI resource node for given bridge device.
+
+**/
+STATIC
+UINT64
+GetBridgePopulatedAperture (
+ IN PCI_RESOURCE_NODE *Bridge
+ )
+{
+ UINT64 Aperture;
+ UINT64 EndAddress;
+ LIST_ENTRY *CurrentLink;
+ PCI_RESOURCE_NODE *Node;
+ PCI_BAR *Bar;
+
+ Aperture = 0;
+
+ //
+ // Analyze all resource nodes looking for the prepopulated with the
+ // highest address used.
+ //
+ for ( CurrentLink = GetFirstNode (&Bridge->ChildList)
+ ; !IsNull (&Bridge->ChildList, CurrentLink)
+ ; CurrentLink = GetNextNode (&Bridge->ChildList, CurrentLink)
+ )
+ {
+ Node = RESOURCE_NODE_FROM_LINK (CurrentLink);
+
+ Bar = &Node->PciDev->PciBar[Node->Bar];
+
+ if (Bar->BaseAddress != 0) {
+ EndAddress = Bar->BaseAddressOffset + Bar->Length;
+
+ if (EndAddress > Aperture) {
+ Aperture = EndAddress;
+ }
+ }
+ }
+
+ return Aperture;
+}
+
/**
This function is used to calculate the resource aperture
for a given bridge device.
@@ -337,6 +597,7 @@ CalculateResourceAperture (
)
{
UINT64 Aperture[2];
+ UINT64 InitialAperture;
LIST_ENTRY *CurrentLink;
PCI_RESOURCE_NODE *Node;
@@ -349,8 +610,14 @@ CalculateResourceAperture (
return;
}
- Aperture[PciResUsageTypical] = 0;
- Aperture[PciResUsagePadding] = 0;
+ //
+ // Initialize apertures at bridge's current resource usage
+ // which might be occupied by pre-populated resources.
+ //
+ InitialAperture = GetBridgePopulatedAperture (Bridge);
+ Aperture[PciResUsageTypical] = InitialAperture;
+ Aperture[PciResUsagePadding] = InitialAperture;
+
//
// Assume the bridge is aligned
//
@@ -361,6 +628,12 @@ CalculateResourceAperture (
{
Node = RESOURCE_NODE_FROM_LINK (CurrentLink);
+ PCI_BAR *Bar = &Node->PciDev->PciBar[Node->Bar];
+ if (PcdGetBool (PcdPciPreservePopulatedMappings) && Bar->BaseAddress) {
+ Node->Offset = Bar->BaseAddressOffset;
+ continue;
+ }
+
//
// It's possible for a bridge to contain multiple padding resource
// nodes due to DegradeResource().
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h
index 1527d4eafa..c5ab5f3fd9 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h
@@ -111,6 +111,26 @@ CalculateApertureIo16 (
IN PCI_RESOURCE_NODE *Bridge
);
+/**
+ Populate a root bridge's resource aperture according to
+ initial conditions ruled by individual pre-populated
+ resources
+
+ @note Pre-populated PIO BARs are not supported.
+
+ @param Bridge PCI resource node for given bridge device.
+ @param Base Resource aperture base address
+
+**/
+VOID
+PopulateResourceAperture (
+ IN UINT64 Mem32Base,
+ IN UINT64 PMem32Base,
+ IN UINT64 Mem64Base,
+ IN UINT64 PMem64Base,
+ IN OUT PCI_IO_DEVICE *Bridge
+ );
+
/**
This function is used to calculate the resource aperture
for a given bridge device.
--
2.17.1
Amazon Development Center Germany GmbH
Krausenstr. 38
10117 Berlin
Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss
Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
Sitz: Berlin
Ust-ID: DE 289 237 879
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v4 5/8] OvmfPkg/PciHostBridgeUtilityLib: Initialize RootBridges apertures with spec
2022-02-03 20:56 ` [PATCH v4 5/8] OvmfPkg/PciHostBridgeUtilityLib: Initialize RootBridges apertures with spec Ojeda Leon, Nicolas
@ 2022-02-04 7:39 ` Gerd Hoffmann
0 siblings, 0 replies; 15+ messages in thread
From: Gerd Hoffmann @ 2022-02-04 7:39 UTC (permalink / raw)
To: Nicolas Ojeda Leon; +Cc: devel, atugup, Alexander Graf
On Thu, Feb 03, 2022 at 09:56:25PM +0100, Nicolas Ojeda Leon wrote:
> Consume the host-provided specification of PCI host bridges if
> available. Using the DxeHardwareInfoLib, populate a list of
> hardware descriptors based on the content of the "hardware-info"
> fw-cfg file, if provided. In the affirmative case, use the
> resources and attributes specified by the hypervisor for each
> Host Bridge to create the RootBridge elements.
>
> In Ovmf platforms, the host can provide the specification of
> non-discoverable hardware resources like PCI host bridges. If the
> proper fw-cfg file is found, parse the contents provided by the
> host into a linked list by using the Hardware Info library. Then,
> using the list of PCI host bridges' descriptions, populate the
> PCI_ROOT_BRIDGES array with the resources and attributes specified
> by the host. If the file is not provided or no Host Bridge is found
> in it, fold back to the legacy method based on pre-defined
> apertures and rules.
>
> In some use cases, the host requires additional control over the
> hardware resources' configurations in the guest for performance and
> discoverability reasons. For instance, to disclose information about
> the PCI hierarchy to the guest so that this can profit from
> optimized accesses. In this case, the host can decide to describe
> multiple PCI Host Bridges and provide a specific set of resources
> (e.g. MMIO apertures) so that the guest uses the values provided.
> Using the provided values may entitle the guest to added performance,
> for example by using specific MMIO mappings that can enable peer-to-peer
> communication across the PCI hierarchy or by allocating memory closer
> to a device for faster DMA transactions.
>
> Cc: Alexander Graf <graf@amazon.de>
> Cc: Gerd Hoffmann <kraxel@redhat.com>
>
> Signed-off-by: Nicolas Ojeda Leon <ncoleon@amazon.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 7/8] PciHostBridgeDxe: Extend service to get base addresses before allocation
2022-02-03 20:56 ` [PATCH v4 7/8] PciHostBridgeDxe: Extend service to get base addresses before allocation Ojeda Leon, Nicolas
@ 2022-02-04 8:36 ` Gerd Hoffmann
2022-02-04 9:17 ` Ojeda Leon, Nicolas
2022-02-04 9:42 ` Ojeda Leon, Nicolas
0 siblings, 2 replies; 15+ messages in thread
From: Gerd Hoffmann @ 2022-02-04 8:36 UTC (permalink / raw)
To: Nicolas Ojeda Leon; +Cc: devel, atugup, Alexander Graf
Hi,
> - if (ResStatus == EFI_RESOURCE_SATISFIED) {
> + if ((ResStatus == EFI_RESOURCE_SATISFIED) ||
> + (ResStatus == PCI_RESOURCE_PARTIAL))
> + {
> +++ b/MdeModulePkg/Include/Library/PciResourceLib.h
> @@ -0,0 +1,20 @@
> +/** @file
> + Pci resource library consumed by PciBusDxe and PciHostBridgeDxe drivers to
> + share non-UEFI spec artefacts used in both drivers
> +
> + Copyright 2022 Amazon.com, Inc. or its affiliates. All Rights Reserved.
> +
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the BSD License
> + which accompanies this distribution. The full text of the license may be found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> + **/
> +#ifndef __PCI_RESOURCE_LIB_H__
> +#define __PCI_RESOURCE_LIB_H__
> +
> +#define PCI_RESOURCE_PARTIAL 0xFFFFFFFFFFFFFFFDULL
> +
> +#endif
Hmm, so you are hiding the #define here to avoid updating
Protocol/PciHostBridgeResourceAllocation.h ...
I suspect if this can't be implemented in the pci enumerator alone
there is just no way around actually extending uefi protocols. But it's
also not fully clear to me why you need this new "partial" state.
Wouldn't you know either nothing or both base + size for a resource?
Also: Maybe split this series into two? One for the host-provided
bridges, and another for the pre-populated bars? So the former can
already be merged while the later is still sorted?
take care,
Gerd
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 7/8] PciHostBridgeDxe: Extend service to get base addresses before allocation
2022-02-04 8:36 ` Gerd Hoffmann
@ 2022-02-04 9:17 ` Ojeda Leon, Nicolas
2022-02-14 10:18 ` Gerd Hoffmann
2022-02-04 9:42 ` Ojeda Leon, Nicolas
1 sibling, 1 reply; 15+ messages in thread
From: Ojeda Leon, Nicolas @ 2022-02-04 9:17 UTC (permalink / raw)
To: Gerd Hoffmann; +Cc: devel@edk2.groups.io, Gupta, Atul, Graf (AWS), Alexander
Hi Gerd,
> Hmm, so you are hiding the #define here to avoid updating Protocol/PciHostBridgeResourceAllocation.h ...
>
> I suspect if this can't be implemented in the pci enumerator alone there is just no way around actually extending uefi protocols. But it's also not fully clear to me why you need this new "partial" state.
> Wouldn't you know either nothing or both base + size for a resource?
>
Yes you are right, the current status is we have nothing and after the resources are allocated we have base and size. However, the allocation happens after CreateResourceMap is called, this function is the one that iterates over all resources of all devices under a root bridges and places them in a root bridge relative offset to then calculate the length of the resources required for that specific root bridge. For the pre-populated BARs I retrieve the Base Address of the Root Bridge before placing the resources at the root bridge relative offset so that I can translate the BAR address (set by the host) into an offset. That's why I created this patch to retrieve only the base address before the root bridge resource map is created, submitted and allocated.
> Also: Maybe split this series into two? One for the host-provided bridges, and another for the pre-populated bars? So the former can already be merged while the later is still sorted?
Yes I will do that.
> take care,
> Gerd
Thanks,
Nicolas
Amazon Development Center Germany GmbH
Krausenstr. 38
10117 Berlin
Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss
Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
Sitz: Berlin
Ust-ID: DE 289 237 879
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 7/8] PciHostBridgeDxe: Extend service to get base addresses before allocation
2022-02-04 8:36 ` Gerd Hoffmann
2022-02-04 9:17 ` Ojeda Leon, Nicolas
@ 2022-02-04 9:42 ` Ojeda Leon, Nicolas
1 sibling, 0 replies; 15+ messages in thread
From: Ojeda Leon, Nicolas @ 2022-02-04 9:42 UTC (permalink / raw)
To: Gerd Hoffmann; +Cc: devel@edk2.groups.io, Gupta, Atul, Graf (AWS), Alexander
Hi Gerd,
> Also: Maybe split this series into two? One for the host-provided bridges, and another for the pre-populated bars? So the former can already be merged while the later is still sorted?
Is it already possible for someone to merge the first 5 patches or should I submit a new revision with the 5 patches alone?
Best regards,
Nicolas
Amazon Development Center Germany GmbH
Krausenstr. 38
10117 Berlin
Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss
Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
Sitz: Berlin
Ust-ID: DE 289 237 879
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 7/8] PciHostBridgeDxe: Extend service to get base addresses before allocation
2022-02-04 9:17 ` Ojeda Leon, Nicolas
@ 2022-02-14 10:18 ` Gerd Hoffmann
2022-02-14 10:28 ` [edk2-devel] " Ojeda Leon, Nicolas
0 siblings, 1 reply; 15+ messages in thread
From: Gerd Hoffmann @ 2022-02-14 10:18 UTC (permalink / raw)
To: Ojeda Leon, Nicolas
Cc: devel@edk2.groups.io, Gupta, Atul, Graf (AWS), Alexander
On Fri, Feb 04, 2022 at 09:17:48AM +0000, Ojeda Leon, Nicolas wrote:
> Hi Gerd,
>
> > Hmm, so you are hiding the #define here to avoid updating Protocol/PciHostBridgeResourceAllocation.h ...
> >
> > I suspect if this can't be implemented in the pci enumerator alone there is just no way around actually extending uefi protocols. But it's also not fully clear to me why you need this new "partial" state.
> > Wouldn't you know either nothing or both base + size for a resource?
> >
>
> Yes you are right, the current status is we have nothing and after the
> resources are allocated we have base and size. However, the allocation
> happens after CreateResourceMap is called, this function is the one
> that iterates over all resources of all devices under a root bridges
> and places them in a root bridge relative offset to then calculate the
> length of the resources required for that specific root bridge. For
> the pre-populated BARs I retrieve the Base Address of the Root Bridge
> before placing the resources at the root bridge relative offset so
> that I can translate the BAR address (set by the host) into an offset.
> That's why I created this patch to retrieve only the base address
> before the root bridge resource map is created, submitted and
> allocated.
Hmm, nasty init order issue. No good idea offhand.
Have you tried to exclude the pre-populated BARs from the host bridge
windows communicated to the edk2 pci core? The pci enumerator should
not create overlapping pci bar assignment then. But it might very well
be that this only shifts the problem to another place ...
take care,
Gerd
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [edk2-devel] [PATCH v4 7/8] PciHostBridgeDxe: Extend service to get base addresses before allocation
2022-02-14 10:18 ` Gerd Hoffmann
@ 2022-02-14 10:28 ` Ojeda Leon, Nicolas
0 siblings, 0 replies; 15+ messages in thread
From: Ojeda Leon, Nicolas @ 2022-02-14 10:28 UTC (permalink / raw)
To: devel@edk2.groups.io, kraxel@redhat.com
Cc: Gupta, Atul, Graf (AWS), Alexander
>> > Hmm, so you are hiding the #define here to avoid updating Protocol/PciHostBridgeResourceAllocation.h ...
>> >
>> > I suspect if this can't be implemented in the pci enumerator alone there is just no way around actually extending uefi protocols. But it's also not fully clear to me why you need this new "partial" state.
>> > Wouldn't you know either nothing or both base + size for a resource?
>> >
>>
>> Yes you are right, the current status is we have nothing and after the
>> resources are allocated we have base and size. However, the allocation
>> happens after CreateResourceMap is called, this function is the one
>> that iterates over all resources of all devices under a root bridges
>> and places them in a root bridge relative offset to then calculate the
>> length of the resources required for that specific root bridge. For
>> the pre-populated BARs I retrieve the Base Address of the Root Bridge
>> before placing the resources at the root bridge relative offset so
>> that I can translate the BAR address (set by the host) into an offset.
>> That's why I created this patch to retrieve only the base address
>> before the root bridge resource map is created, submitted and
>> allocated.
>
>Hmm, nasty init order issue. No good idea offhand.
>
>Have you tried to exclude the pre-populated BARs from the host bridge windows communicated to the edk2 pci core? The pci enumerator should not create overlapping pci bar assignment then. But it might very well be that this only shifts the problem to another place ...
>
>take care,
> Gerd
Haven't tried that but we are working on a new approach that do not touches the protocol at all but instead profits from the retry loop already in place and, after an allocation round, verifies if the pre-populated BARs are in the correct place, otherwise tries again. Similar to what is currently done when the allocation fails due to not enough space. Also we are creating a routine that "adjusts" the resources by analyzing pre-populated BAR situation to decide which device to reject before trying again.
Expect a new revision soon.
Best regards,
Nicolas
Amazon Development Center Germany GmbH
Krausenstr. 38
10117 Berlin
Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss
Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
Sitz: Berlin
Ust-ID: DE 289 237 879
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2022-02-14 10:28 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-02-03 20:56 [PATCH v4 0/8] Handling of multiple PCI host bridges specified Ojeda Leon, Nicolas
2022-02-03 20:56 ` [PATCH v4 1/8] OvmfPkg/Library: Create base HardwareInfoLib for PCI Host Bridges Ojeda Leon, Nicolas
2022-02-03 20:56 ` [PATCH v4 2/8] Ovmf/HardwareInfoLib: Create Pei lib to parse directly from fw-cfg Ojeda Leon, Nicolas
2022-02-03 20:56 ` [PATCH v4 3/8] Ovmf/HardwareInfoLib: Add Dxe lib to dynamically parse heterogenous data Ojeda Leon, Nicolas
2022-02-03 20:56 ` [PATCH v4 4/8] Ovmf/PlatformPei: Use host-provided GPA end if available Ojeda Leon, Nicolas
2022-02-03 20:56 ` [PATCH v4 5/8] OvmfPkg/PciHostBridgeUtilityLib: Initialize RootBridges apertures with spec Ojeda Leon, Nicolas
2022-02-04 7:39 ` Gerd Hoffmann
2022-02-03 20:56 ` [PATCH v4 6/8] MdeModulePkg, OvmfPkg: Add Pcd token for PCI pre-populated BARs Ojeda Leon, Nicolas
2022-02-03 20:56 ` [PATCH v4 7/8] PciHostBridgeDxe: Extend service to get base addresses before allocation Ojeda Leon, Nicolas
2022-02-04 8:36 ` Gerd Hoffmann
2022-02-04 9:17 ` Ojeda Leon, Nicolas
2022-02-14 10:18 ` Gerd Hoffmann
2022-02-14 10:28 ` [edk2-devel] " Ojeda Leon, Nicolas
2022-02-04 9:42 ` Ojeda Leon, Nicolas
2022-02-03 20:56 ` [PATCH v4 8/8] MdeModulePkg/PciBusDxe: Handling of pre-populated PCI BARs Ojeda Leon, Nicolas
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