From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0D4A321E256AD for ; Thu, 25 Jan 2018 00:17:13 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Jan 2018 00:22:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,411,1511856000"; d="scan'208";a="25303274" Received: from ray-dev.ccr.corp.intel.com (HELO [10.239.9.19]) ([10.239.9.19]) by fmsmga001.fm.intel.com with ESMTP; 25 Jan 2018 00:22:41 -0800 To: Jian J Wang , edk2-devel@lists.01.org Cc: Eric Dong , Laszlo Ersek References: <20180125074219.7220-1-jian.j.wang@intel.com> From: "Ni, Ruiyu" Message-ID: <212bc278-a163-dc86-8e7e-bd96d0bbae43@Intel.com> Date: Thu, 25 Jan 2018 16:22:41 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2 MIME-Version: 1.0 In-Reply-To: <20180125074219.7220-1-jian.j.wang@intel.com> Subject: Re: [PATCH v2] UefiCpuPkg/MpInitLib: fix AP init issue in 64-bit PEI X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 25 Jan 2018 08:17:14 -0000 Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit On 1/25/2018 3:42 PM, Jian J Wang wrote: >> v2: >> Roll back changes (just white spaces) caused by misoperation in git > > This issue is introduced by a patch at > > f32bfe6d061420a15bac6083063d227c567e6388 > > The above patch miss the case of 64-bit PEI, which will link > X64/MpFuncs.nasm instead of Ia32/MpFuncs.nasm. For X64/MpFuncs.nasm, > ExchangeInfo->ModeHighMemory should be always initialized no matter > if separate wakeup buffer is allocated or not. Ia32/MpFuncs.nasm will > not need ModeHighMemory during AP init. So the changes made in this > patch should not affect the functionality of it. > > Cc: Ruiyu Ni > Cc: Eric Dong > Cc: Laszlo Ersek > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Jian J Wang > --- > UefiCpuPkg/Library/MpInitLib/MpLib.c | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > > diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c > index 42011d6231..0b7073fd02 100644 > --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c > +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c > @@ -834,14 +834,15 @@ FillExchangeInfoData ( > ); > > ExchangeInfo->ModeTransitionMemory = (UINT32)CpuMpData->WakeupBufferHigh; > - ExchangeInfo->ModeHighMemory = (UINT32)CpuMpData->WakeupBufferHigh + > - (UINT32)ExchangeInfo->ModeOffset - > - (UINT32)CpuMpData->AddressMap.ModeTransitionOffset; > - ExchangeInfo->ModeHighSegment = (UINT16)ExchangeInfo->CodeSegment; > } else { > ExchangeInfo->ModeTransitionMemory = (UINT32) > (ExchangeInfo->BufferStart + CpuMpData->AddressMap.ModeTransitionOffset); > } > + > + ExchangeInfo->ModeHighMemory = ExchangeInfo->ModeTransitionMemory + > + (UINT32)ExchangeInfo->ModeOffset - > + (UINT32)CpuMpData->AddressMap.ModeTransitionOffset; > + ExchangeInfo->ModeHighSegment = (UINT16)ExchangeInfo->CodeSegment; > } > > /** > Reviewed-by: Ruiyu Ni -- Thanks, Ray