From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.151; helo=mga17.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 77BA221159819 for ; Wed, 17 Oct 2018 20:29:55 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Oct 2018 20:29:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,395,1534834800"; d="scan'208";a="98404660" Received: from ray-dev.ccr.corp.intel.com (HELO [10.239.9.11]) ([10.239.9.11]) by fmsmga004.fm.intel.com with ESMTP; 17 Oct 2018 20:29:53 -0700 To: Eric Dong , edk2-devel@lists.01.org Cc: Laszlo Ersek References: <20181017021635.14972-1-eric.dong@intel.com> <20181017021635.14972-3-eric.dong@intel.com> From: "Ni, Ruiyu" Message-ID: <222d0350-f086-fa0d-a52a-8df88e11e069@Intel.com> Date: Thu, 18 Oct 2018 11:31:06 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <20181017021635.14972-3-eric.dong@intel.com> Subject: Re: [Patch v2 2/6] UefiCpuPkg/RegisterCpuFeaturesLib.h: Add new dependence types. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Oct 2018 03:29:55 -0000 Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit On 10/17/2018 10:16 AM, Eric Dong wrote: > Add new core/package dependence types which consumed by different MSRs. > > Cc: Ruiyu Ni > Cc: Laszlo Ersek > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Eric Dong > --- > .../Include/Library/RegisterCpuFeaturesLib.h | 25 ++++++++++++++++++---- > 1 file changed, 21 insertions(+), 4 deletions(-) > > diff --git a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h > index 9331e49d13..e6f0ebe4bc 100644 > --- a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h > +++ b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h > @@ -73,10 +73,17 @@ > #define CPU_FEATURE_PPIN (32+11) > #define CPU_FEATURE_PROC_TRACE (32+12) > > -#define CPU_FEATURE_BEFORE_ALL BIT27 > -#define CPU_FEATURE_AFTER_ALL BIT28 > -#define CPU_FEATURE_BEFORE BIT29 > -#define CPU_FEATURE_AFTER BIT30 > +#define CPU_FEATURE_BEFORE_ALL BIT23 > +#define CPU_FEATURE_AFTER_ALL BIT24 We could add comments to emphasize that CPU_FEATURE_BEFORE and CPU_FEATURE_AFTER only mean Thread scope before and Thread scope after. And after the whole patch serials are checked in, I prefer to mark the below two macros as deprecated and avoid using them in core code any more. > +#define CPU_FEATURE_BEFORE BIT25 > +#define CPU_FEATURE_AFTER BIT26 > + > +#define CPU_FEATURE_THREAD_BEFORE CPU_FEATURE_BEFORE > +#define CPU_FEATURE_THREAD_AFTER CPU_FEATURE_AFTER > +#define CPU_FEATURE_CORE_BEFORE BIT27 > +#define CPU_FEATURE_CORE_AFTER BIT28 > +#define CPU_FEATURE_PACKAGE_BEFORE BIT29 > +#define CPU_FEATURE_PACKAGE_AFTER BIT30 > #define CPU_FEATURE_END MAX_UINT32 > /// @} > > @@ -116,6 +123,16 @@ typedef struct { > CPUID_VERSION_INFO_EDX CpuIdVersionInfoEdx; > } REGISTER_CPU_FEATURE_INFORMATION; > > +// > +// Describe the dependency type for different features. Can you add comments to say like below? "The value set to CPU_REGISTER_TABLE_ENTRY.Value when the REGISTER_TYPE is Semaphore." And maybe move the enum definition to AcpiCpuData.h because the definition of CPU_REGISTER_TABLE_ENTRY and REGISTER_TYPE are all defined there. > +// > +typedef enum { > + NoneDepType, > + ThreadDepType, > + CoreDepType, > + PackageDepType > +} CPU_FEATURE_DEPENDENCE_TYPE; > + > /** > Determines if a CPU feature is enabled in PcdCpuFeaturesSupport bit mask. > If a CPU feature is disabled in PcdCpuFeaturesSupport then all the code/data > -- Thanks, Ray