From: "Alexander D" <aenv067@gmail.com>
To: "Arminder Singh" <arminders208@outlook.com>, devel@edk2.groups.io
Subject: Re: [edk2-devel] [Question] How do you set PCIe host bridge address space granularity for a PCI host bridge defined with PciHostBridgeLib?
Date: Mon, 29 Jul 2024 19:35:21 -0700 [thread overview]
Message-ID: <22372.1722306921287461697@groups.io> (raw)
In-Reply-To: <4791.1722298751229097446@groups.io>
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>
> 1) when implementing PciHostBridgeLib, are we supposed to put host
> addresses (address the CPU uses after translation) in the Mem/MemAbove4G
> apertures or PCI/device addresses? (address the device uses before
> translation)
PCI_ROOT_BRIDGE_APERTURE is defined here: edk2/MdeModulePkg/Include/ Library/PciHostBridgeLib.h at master · tianocore/edk2 (github.com) ( https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Include/Library/PciHostBridgeLib.h#L13 )
Base = Device Address
Translation = Device Address - Host Address.
Also worth noting that in an ACPI memory resource descriptor (DWordMemory, QWordMemory, ...), AddressTranslation (_TRA) is actually the opposite of above = Host Address - Device Address.
>
> 2) Does the 'Mem' aperture have to be a 32 bit address/limit from host
> perspective?
From PCI device perspective. Host could have it mapped above 4 GB, and this is where you need translation.
>
> 3) Does translation have to be 0 for Mem/MemAbove4G apertures in the
> PCI_ROOT_BRIDGE struct? Most example platforms do that, but I'm not sure
> if that's a requirement for PciHostBridgeLib or just convention.
It depends on how your platform maps PCI apertures in the CPU address space.
If an identity mapping is used (Host Address == Device Address) - ideally, then Translation is 0.
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next prev parent reply other threads:[~2024-07-30 2:35 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-24 15:29 [edk2-devel] [Question] How do you set PCIe host bridge address space granularity for a PCI host bridge defined with PciHostBridgeLib? Arminder Singh
2024-07-24 20:28 ` Alexander D
2024-07-24 21:14 ` Alexander D
2024-07-30 0:19 ` Arminder Singh
2024-07-30 2:35 ` Alexander D [this message]
2024-08-05 17:58 ` Arminder Singh
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