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Received: from PH0PR01MB7287.prod.exchangelabs.com (2603:10b6:510:10a::21) by DM5PR01MB2778.prod.exchangelabs.com (2603:10b6:3:fe::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4951.18; Tue, 8 Feb 2022 03:46:45 +0000 Received: from PH0PR01MB7287.prod.exchangelabs.com ([fe80::2c2c:1dc:acb5:e313]) by PH0PR01MB7287.prod.exchangelabs.com ([fe80::2c2c:1dc:acb5:e313%6]) with mapi id 15.20.4951.019; Tue, 8 Feb 2022 03:46:45 +0000 Message-ID: <228c3387-6387-925f-f9e0-007e2d53599e@os.amperecomputing.com> Date: Tue, 8 Feb 2022 10:45:19 +0700 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.5.1 Subject: Re: [PATCH v2 14/17] Silicon/Ampere: Update ArmPlatformLib to work with changed ARM_CORE_INFO To: Ard Biesheuvel Cc: Rebecca Cran , edk2-devel-groups-io , Ard Biesheuvel , Samer El-Haj-Mahmoud , Leif Lindholm , Sami Mujawar , Wenyi Xie , Peng Xie , Ling Jia , Yiqi Shu , Vu Nguyen , Thang Nguyen , Chuong Tran , Pete Batard , Masami Hiramatsu , Graeme Gregory , Radoslaw Biernacki , Marcin Wojtas References: <20211216220800.9628-1-rebecca@nuviainc.com> <20211216220800.9628-15-rebecca@nuviainc.com> From: "Nhi Pham" In-Reply-To: X-ClientProxiedBy: HK0PR03CA0112.apcprd03.prod.outlook.com (2603:1096:203:b0::28) To PH0PR01MB7287.prod.exchangelabs.com (2603:10b6:510:10a::21) Return-Path: nhi@os.amperecomputing.com MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: c29c74c5-8dd6-42b1-aa92-08d9eab5a0b5 X-MS-TrafficTypeDiagnostic: DM5PR01MB2778:EE_ X-LD-Processed: 3bc2b170-fd94-476d-b0ce-4229bdc904a7,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:10000; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 30/01/2022 17:36, Ard Biesheuvel wrote: > On Sun, 19 Dec 2021 at 04:36, Nhi Pham wrote: >> Hi Rebecca, >> >> Leif is merging the rest of Altra port to the edk2-platforms which has >> SRAT ACPI table consuming the CPU Core Info table. Therefore, we will >> need to fix the SRAT too. I would defer the fix until the Altra port is >> fully merged. >> > This seems to be stalled so to make progress, I am going to merge this. > >> On 17/12/2021 05:07, Rebecca Cran wrote: >>> The ARM_CORE_INFO struct has been updated so the MPIDR is now a single >>> field instead of separate cluster/core fields. Update ArmPlatformLib. >>> >>> Signed-off-by: Rebecca Cran >>> --- >>> Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c | 5 ++--- >>> 1 file changed, 2 insertions(+), 3 deletions(-) >>> >>> diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c >>> index 5b4be0e55516..f2ec923d6f8d 100644 >>> --- a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c >>> +++ b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c >>> @@ -108,9 +108,8 @@ PrePeiCoreGetMpCoreInfo ( >>> } >>> SocketId = SOCKET_ID (Index); >>> ClusterId = CLUSTER_ID (Index); >>> - mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].ClusterId = SocketId; >>> - mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].CoreId = >>> - (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM); >>> + mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].Mpidr = GET_MPID ( >>> + SocketId, (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM)); >> For Ampere Altra, the correct MPIDR encoding is SocketId << 32 | >> ClusterId << 16 | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM) << 8 >> >> It would be the same what >> Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c (not >> available yet - being merged in) is describing. >> > Feel free to follow up with a patch that changes this into the correct > representation, but this patch does not make it less correct than it > already is; it just stores the socket ID in the cluster ID field in a > different way. Thanks Ard. That's OK. Best regards, Nhi