From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0DC0421A16EF1 for ; Tue, 23 May 2017 04:00:48 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 May 2017 04:00:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,382,1491289200"; d="dat'59?scan'59,208,59";a="1133806718" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by orsmga001.jf.intel.com with ESMTP; 23 May 2017 04:00:42 -0700 Received: from fmsmsx124.amr.corp.intel.com (10.18.125.39) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 23 May 2017 04:00:40 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by fmsmsx124.amr.corp.intel.com (10.18.125.39) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 23 May 2017 04:00:40 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.117]) by shsmsx102.ccr.corp.intel.com ([169.254.2.246]) with mapi id 14.03.0319.002; Tue, 23 May 2017 19:00:36 +0800 From: "Guo, Mang" To: "edk2-devel@lists.01.org" CC: "Wei, David" Thread-Topic: [Patch][edk2-platforms/devel-MinnowBoard3-UDK2017] BroxtonSiPkg:Fix Debug image assert issue Thread-Index: AdLTs84iw7ex7+PCSrmsrm0501qwqw== Date: Tue, 23 May 2017 11:00:36 +0000 Message-ID: <22D2C85ED001C54AA20BFE3B0E4751D15250948A@SHSMSX103.ccr.corp.intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: <22D2C85ED001C54AA20BFE3B0E4751D15250948A@SHSMSX103.ccr.corp.intel.com> x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.22 Subject: [Patch][edk2-platforms/devel-MinnowBoard3-UDK2017] BroxtonSiPkg:Fix Debug image assert issue X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 May 2017 11:00:48 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang --- Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Smm/ScInitSmm.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Smm/ScInit= Smm.c b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Smm/ScInitSmm.c index c3c1756..176386e 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Smm/ScInitSmm.c +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Smm/ScInitSmm.c @@ -186,8 +186,6 @@ ScInitSmmEntryPoint ( Status =3D InitializeScPcieSmm (ImageHandle, SystemTable); ASSERT_EFI_ERROR (Status); =20 - FreePool (mPcieRpConfig); - return EFI_SUCCESS; } =20 --=20 2.10.1.windows.1