From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8273921D2E623 for ; Wed, 23 Aug 2017 20:11:30 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 Aug 2017 20:14:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,419,1498546800"; d="dat'59?scan'59,208,59";a="1209726155" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga002.fm.intel.com with ESMTP; 23 Aug 2017 20:14:04 -0700 Received: from FMSMSX109.amr.corp.intel.com (10.18.116.9) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 23 Aug 2017 20:14:04 -0700 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by fmsmsx109.amr.corp.intel.com (10.18.116.9) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 23 Aug 2017 20:14:03 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.183]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.117]) with mapi id 14.03.0319.002; Thu, 24 Aug 2017 11:14:02 +0800 From: "Guo, Mang" To: "edk2-devel@lists.01.org" Thread-Topic: [Patch][edk2-platforms/devel-MinnowBoard3-UDK2017 01/1 BroxtonPlatformPkg: Add SueCreek.asl Thread-Index: AdMchwgeeY6z8vsvT46HRNJErmGgSQ== Date: Thu, 24 Aug 2017 03:14:00 +0000 Message-ID: <22D2C85ED001C54AA20BFE3B0E4751D15253FBF0@shsmsx102.ccr.corp.intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: <22D2C85ED001C54AA20BFE3B0E4751D15253FBF0@shsmsx102.ccr.corp.intel.com> x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.22 Subject: [Patch][edk2-platforms/devel-MinnowBoard3-UDK2017 01/1 BroxtonPlatformPkg: Add SueCreek.asl X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 Aug 2017 03:11:30 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang --- .../Common/Acpi/AcpiTablesPCAT/Platform.asl | 10 +++--- .../AcpiTablesPCAT/PlatformSsdt/PlatformSsdt.asl | 3 +- .../PlatformSsdt/SueCreek/SueCreek.asl | 42 ++++++++++++++++++= ++++ 3 files changed, 50 insertions(+), 5 deletions(-) create mode 100644 Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/= PlatformSsdt/SueCreek/SueCreek.asl diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Platfor= m.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Platform.asl index 5c3b726..4674f70 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Platform.asl +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Platform.asl @@ -708,10 +708,12 @@ Scope(\_SB) Return (RBUF) } =20 - Method (_STA, 0x0, NotSerialized) - { - - Return (0xF) + Method (_STA, 0x0, NotSerialized) { + If (LEqual (OSYS, 2015)) { + Return (0x0) + } else { + Return (0xF) + } } } }//end scope diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Platfor= mSsdt/PlatformSsdt.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTables= PCAT/PlatformSsdt/PlatformSsdt.asl index 0455c4b..1f9da76 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/P= latformSsdt.asl +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/P= latformSsdt.asl @@ -1,5 +1,5 @@ /** @file - Copyright (c) 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -65,5 +65,6 @@ DefinitionBlock ( include ("Nfc/Nfc.asl") =20 include ("Fingerprint/Fingerprint_FPC.asl") + include ("SueCreek/SueCreek.asl") } =20 diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Platfor= mSsdt/SueCreek/SueCreek.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiT= ablesPCAT/PlatformSsdt/SueCreek/SueCreek.asl new file mode 100644 index 0000000..d67b3c4 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/S= ueCreek/SueCreek.asl @@ -0,0 +1,42 @@ +/** @file + +Copyright (c) 2017 Intel Corporation. + +This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD = License +which accompanies this distribution. The full text of the license may be = found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLI= ED. + +**/ + +Scope (\_SB.PCI0.SPI1) { + Device (TP0) { + Name (_HID, "SPT0001") + Name (_DDN, "SueCreek - SPI0, CS0") + Name (_CRS, ResourceTemplate () { + SpiSerialBus ( + 0, // Chip select (0, 1, 2) + PolarityLow, // Chip select is active low + FourWireMode, // Full duplex + 8, // Bits per word is 8 (byte) + ControllerInitiated, // Don't care + 1000000, // 1 MHz + ClockPolarityLow, // SPI mode 0 + ClockPhaseFirst, // SPI mode 0 + "\\_SB.PCI0.SPI1", // SPI host controller + 0 // Must be 0 + ) + }) + Method (_STA, 0x0, NotSerialized) { + If (LEqual (OSYS, 2015)) { + Return (0x0) + } else { + Return (0xF) + } + } + } +} + --=20 2.10.1.windows.1